- 22 7月, 2013 1 次提交
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由 Laurent Pinchart 提交于
Add a pfc node to the r8a73a4 device tree. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> [g.liakhovetski+renesas@gmail.com use 2 nodes for address and size] Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 17 7月, 2013 2 次提交
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由 Guennadi Liakhovetski 提交于
This adds DT templates for all MMCIF and SDHI controllers on r8a73a4. They are added with status="disabled". To use them platform-specific DTs have to enable the required ones. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
Add Device Tree nodes for the 9 I2C controllers on r8a73a4, compatible with the i2c-sh_mobile.c driver. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 6月, 2013 1 次提交
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由 Magnus Damm 提交于
Remove unused GIC CPU interface DT bits for r8a73a4. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 02 4月, 2013 4 次提交
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由 Takashi Yoshii 提交于
The r8a73a4 SoC supports LPAE and has memory window up to 0x2ffffffff. Convert to 64-bit addresses by enlarging #addr-cells and #size-cells to 2. Signed-off-by: NTakashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
You can get current thermal by > cat /sys/class/thermal/thermal_zone?/temp Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add IRQC interrupt controller support to r8a73a4 by hooking up two IRQC instances to handle 58 external IRQ signals. There IRQC controllers are tied to SPIs of the GIC. On r8a73a4 exact IRQ pin routing is handled by the PFC which is excluded from this patch. Both platform devices and DT devices are added in this patch. The platform device versions are used to provide a static interrupt map configuration for board code written in C. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
V3 of initial support for the r8a73a4 SoC including: - Single Cortex-A15 CPU Core - GIC - Architecture timer No static virtual mappings are used, all the components make use of ioremap(). DT_MACHINE_START is still wrapped in CONFIG_USE_OF to match other mach-shmobile code. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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