- 21 11月, 2011 1 次提交
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由 Javi Merino 提交于
When the manager is running non-secure, the only channels that can issue interrupts are the ones that have a 1 in their corresponding bit in Configuration Register 3. The other ones will generate an abort when trying to signal the end of the transaction so they are useless in non-secure mode. Reference: <1320244259-10496-2-git-send-email-javi.merino@arm.com> Signed-off-by: NJavi Merino <javi.merino@arm.com> Acked-by: NJassi Brar <jassisinghbrar@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 10月, 2011 1 次提交
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由 Javi Merino 提交于
If two requests have been submitted and one of them is running, if you call pl330_chan_ctrl(ch_id, PL330_OP_START), there's a window of time between the spin_lock_irqsave() and the _state() check in which the running transaction may finish. In that case, we don't receive the interrupt (because they are disabled), but _start() sees that the DMA is stopped, so it starts it. The problem is that it sends the transaction that has just finished again, because pl330_update() hasn't mark it as done yet. This patch fixes this race condition by not calling _start() if the DMA is already executing transactions. When interrupts are reenabled, pl330_update() will call _start(). Reference: <1317892206-3600-1-git-send-email-javi.merino@arm.com> Signed-off-by: NJavi Merino <javi.merino@arm.com> Acked-by: NJassi Brar <jassi.brar@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 12 10月, 2010 1 次提交
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由 Jassi Brar 提交于
The driver can handle different revisions of the core which vary only minorly. Signed-off-by: NJassi Brar <jassi.brar@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 5月, 2010 1 次提交
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由 Jassi Brar 提交于
PL330 is a configurable DMA controller PrimeCell device. The register map of the device is well defined. The configuration of a particular implementation can be read from the six configuration registers CR0-4,Dn. This patch implements a driver for the specification:- http://infocenter.arm.com/help/topic/com.arm.doc.ddi0424a/DDI0424A_dmac_pl330_r0p0_trm.pdf The exported interface should be sufficient to implement a driver for any DMA API. Signed-off-by: NJassi Brar <jassisinghbrar@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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