1. 06 1月, 2016 1 次提交
  2. 05 1月, 2016 1 次提交
    • C
      tile: provide CONFIG_PAGE_SIZE_64KB etc for tilepro · c1b27ab5
      Chris Metcalf 提交于
      This allows the build system to know that it can't attempt to
      configure the Lustre virtual block device, for example, when tilepro
      is using 64KB pages (as it does by default).  The tilegx build
      already provided those symbols.
      
      Previously we required that the tilepro hypervisor be rebuilt with
      a different hardcoded page size in its headers, and then Linux be
      rebuilt using the updated hypervisor header.  Now we allow each of
      the hypervisor and Linux to be built independently.  We still check
      at boot time to ensure that the page size provided by the hypervisor
      matches what Linux expects.
      Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
      Cc: stable@vger.kernel.org [3.19+]
      c1b27ab5
  3. 01 1月, 2016 2 次提交
  4. 30 12月, 2015 5 次提交
  5. 28 12月, 2015 1 次提交
  6. 25 12月, 2015 5 次提交
    • R
      sparc64: fix FP corruption in user copy functions · a7c5724b
      Rob Gardner 提交于
      Short story: Exception handlers used by some copy_to_user() and
      copy_from_user() functions do not diligently clean up floating point
      register usage, and this can result in a user process seeing invalid
      values in floating point registers. This sometimes makes the process
      fail.
      
      Long story: Several cpu-specific (NG4, NG2, U1, U3) memcpy functions
      use floating point registers and VIS alignaddr/faligndata to
      accelerate data copying when source and dest addresses don't align
      well. Linux uses a lazy scheme for saving floating point registers; It
      is not done upon entering the kernel since it's a very expensive
      operation. Rather, it is done only when needed. If the kernel ends up
      not using FP regs during the course of some trap or system call, then
      it can return to user space without saving or restoring them.
      
      The various memcpy functions begin their FP code with VISEntry (or a
      variation thereof), which saves the FP regs. They conclude their FP
      code with VISExit (or a variation) which essentially marks the FP regs
      "clean", ie, they contain no unsaved values. fprs.FPRS_FEF is turned
      off so that a lazy restore will be triggered when/if the user process
      accesses floating point regs again.
      
      The bug is that the user copy variants of memcpy, copy_from_user() and
      copy_to_user(), employ an exception handling mechanism to detect faults
      when accessing user space addresses, and when this handler is invoked,
      an immediate return from the function is forced, and VISExit is not
      executed, thus leaving the fprs register in an indeterminate state,
      but often with fprs.FPRS_FEF set and one or more dirty bits. This
      results in a return to user space with invalid values in the FP regs,
      and since fprs.FPRS_FEF is on, no lazy restore occurs.
      
      This bug affects copy_to_user() and copy_from_user() for NG4, NG2,
      U3, and U1. All are fixed by using a new exception handler for those
      loads and stores that are done during the time between VISEnter and
      VISExit.
      
      n.b. In NG4memcpy, the problematic code can be triggered by a copy
      size greater than 128 bytes and an unaligned source address.  This bug
      is known to be the cause of random user process memory corruptions
      while perf is running with the callgraph option (ie, perf record -g).
      This occurs because perf uses copy_from_user() to read user stacks,
      and may fault when it follows a stack frame pointer off to an
      invalid page. Validation checks on the stack address just obscure
      the underlying problem.
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a7c5724b
    • R
      sparc64: Perf should save/restore fault info · 83352694
      Rob Gardner 提交于
      There have been several reports of random processes being killed with
      a bus error or segfault during userspace stack walking in perf.  One
      of the root causes of this problem is an asynchronous modification to
      thread_info fault_address and fault_code, which stems from a perf
      counter interrupt arriving during kernel processing of a "benign"
      fault, such as a TSB miss. Since perf_callchain_user() invokes
      copy_from_user() to read user stacks, a fault is not only possible,
      but probable. Validity checks on the stack address merely cover up the
      problem and reduce its frequency.
      
      The solution here is to save and restore fault_address and fault_code
      in perf_callchain_user() so that the benign fault handler is not
      disturbed by a perf interrupt.
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      83352694
    • R
      sparc64: Ensure perf can access user stacks · 3f74306a
      Rob Gardner 提交于
      When an interrupt (such as a perf counter interrupt) is delivered
      while executing in user space, the trap entry code puts ASI_AIUS in
      %asi so that copy_from_user() and copy_to_user() will access the
      correct memory. But if a perf counter interrupt is delivered while the
      cpu is already executing in kernel space, then the trap entry code
      will put ASI_P in %asi, and this will prevent copy_from_user() from
      reading any useful stack data in either of the perf_callchain_user_X
      functions, and thus no user callgraph data will be collected for this
      sample period. An additional problem is that a fault is guaranteed
      to occur, and though it will be silently covered up, it wastes time
      and could perturb state.
      
      In perf_callchain_user(), we ensure that %asi contains ASI_AIUS
      because we know for a fact that the subsequent calls to
      copy_from_user() are intended to read the user's stack.
      
      [ Use get_fs()/set_fs() -DaveM ]
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      3f74306a
    • R
      sparc64: Don't set %pil in rtrap_nmi too early · 1ca04a4c
      Rob Gardner 提交于
      Commit 28a1f533 delays setting %pil to avoid potential
      hardirq stack overflow in the common rtrap_irq path.
      Setting %pil also needs to be delayed in the rtrap_nmi
      path for the same reason.
      Signed-off-by: NRob Gardner <rob.gardner@oracle.com>
      Signed-off-by: NDave Aldridge <david.j.aldridge@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1ca04a4c
    • K
      sparc64: Add ADI capability to cpu capabilities · 82924e54
      Khalid Aziz 提交于
      Add ADI (Application Data Integrity) capability to cpu capabilities list.
      ADI capability allows virtual addresses to be encoded with a tag in
      bits 63-60. This tag serves as an access control key for the regions
      of virtual address with ADI enabled and a key set on them. Hypervisor
      encodes this capability as "adp" in "hwcap-list" property in machine
      description.
      Signed-off-by: NKhalid Aziz <khalid.aziz@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      82924e54
  7. 24 12月, 2015 1 次提交
  8. 23 12月, 2015 2 次提交
    • J
      ARM: tegra: Fix suspend hang on Tegra124 Chromebooks · 80373d37
      Jon Hunter 提交于
      Enabling CPUFreq support for Tegra124 Chromebooks is causing the Tegra124
      to hang when resuming from suspend.
      
      When CPUFreq is enabled, the CPU clock is changed from the PLLX clock to
      the DFLL clock during kernel boot. When resuming from suspend the CPU
      clock is temporarily changed back to the PLLX clock before switching back
      to the DFLL. If the DFLL is operating at a much lower frequency than the
      PLLX when we enter suspend, and so the CPU voltage rail is at a voltage
      too low for the CPUs to operate at the PLLX frequency, then the device
      will hang.
      
      Please note that the PLLX is used in the resume sequence to switch the CPU
      clock from the very slow 32K clock to a faster clock during early resume
      to speed up the resume sequence before the DFLL is resumed.
      
      Ideally, we should fix this by setting the suspend frequency so that it
      matches the PLLX frequency, however, that would be a bigger change. For
      now simply disable CPUFreq support for Tegra124 Chromebooks to avoid the
      hang when resuming from suspend.
      
      Fixes: 9a0baee9 ("ARM: tegra: Enable CPUFreq support for Tegra124
      		      Chromebooks")
      Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      80373d37
    • M
      um: Fix pointer cast · de379379
      Mickaël Salaün 提交于
      Fix a pointer cast typo introduced in v4.4-rc5 especially visible for
      the i386 subarchitecture where it results in a kernel crash.
      
      [ Also removed pointless cast as per Al Viro - Linus ]
      
      Fixes: 8090bfd2 ("um: Fix fpstate handling")
      Signed-off-by: NMickaël Salaün <mic@digikod.net>
      Cc: Jeff Dike <jdike@addtoit.com>
      Acked-by: NRichard Weinberger <richard@nod.at>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      de379379
  9. 22 12月, 2015 10 次提交
    • A
      KVM: x86: Reload pit counters for all channels when restoring state · 0185604c
      Andrew Honig 提交于
      Currently if userspace restores the pit counters with a count of 0
      on channels 1 or 2 and the guest attempts to read the count on those
      channels, then KVM will perform a mod of 0 and crash.  This will ensure
      that 0 values are converted to 65536 as per the spec.
      
      This is CVE-2015-7513.
      Signed-off-by: NAndy Honig <ahonig@google.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      0185604c
    • P
      KVM: MTRR: treat memory as writeback if MTRR is disabled in guest CPUID · e24dea2a
      Paolo Bonzini 提交于
      Virtual machines can be run with CPUID such that there are no MTRRs.
      In that case, the firmware will never enable MTRRs and it is obviously
      undesirable to run the guest entirely with UC memory.  Check out guest
      CPUID, and use WB memory if MTRR do not exist.
      
      Cc: qemu-stable@nongnu.org
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=107561Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      e24dea2a
    • P
      KVM: MTRR: observe maxphyaddr from guest CPUID, not host · fa7c4ebd
      Paolo Bonzini 提交于
      Conversion of MTRRs to ranges used the maxphyaddr from the boot CPU.
      This is wrong, because var_mtrr_range's mask variable then is discontiguous
      (like FF00FFFF000, where the first run of 0s corresponds to the bits
      between host and guest maxphyaddr).  Instead always set up the masks
      to be full 64-bit values---we know that the reserved bits at the top
      are zero, and we can restore them when reading the MSR.  This way
      var_mtrr_range gets a mask that just works.
      
      Fixes: a13842dc
      Cc: qemu-stable@nongnu.org
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=107561Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      fa7c4ebd
    • A
      KVM: MTRR: fix fixed MTRR segment look up · a7f2d786
      Alexis Dambricourt 提交于
      This fixes the slow-down of VM running with pci-passthrough, since some MTRR
      range changed from MTRR_TYPE_WRBACK to MTRR_TYPE_UNCACHABLE.  Memory in the
      0K-640K range was incorrectly treated as uncacheable.
      
      Fixes: f7bfb57b
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=107561
      Cc: qemu-stable@nongnu.org
      Signed-off-by: NAlexis Dambricourt <alexis.dambricourt@gmail.com>
      [Use correct BZ for "Fixes" annotation.  - Paolo]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      a7f2d786
    • R
      MIPS: Fix build error due to unused variables. · ec7b9720
      Ralf Baechle 提交于
      c861519f ("MIPS: Fix delay loops which may
      be removed by GCC.") which made it upstream was an outdated version of the
      patch and is lacking some the removal of two variables that became unused
      thus resulting in further warnings and build breakage.  The commit
      from ae878615d7cee5d7346946cf1ae1b60e427013c2 was correct however.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      ec7b9720
    • Q
      MIPS: VDSO: Fix build error · 2a037f31
      Qais Yousef 提交于
      Commit ebb5e78c ("MIPS: Initial implementation of a VDSO") introduced a
      build error.
      
      For MIPS VDSO to be compiled it requires binutils version 2.25 or above but
      the check in the Makefile had inverted logic causing it to be compiled in if
      binutils is below 2.25.
      
      This fixes the following compilation error:
      
      CC      arch/mips/vdso/gettimeofday.o
      /tmp/ccsExcUd.s: Assembler messages:
      /tmp/ccsExcUd.s:62: Error: can't resolve `_start' {*UND* section} - `L0' {.text section}
      /tmp/ccsExcUd.s:467: Error: can't resolve `_start' {*UND* section} - `L0' {.text section}
      make[2]: *** [arch/mips/vdso/gettimeofday.o] Error 1
      make[1]: *** [arch/mips/vdso] Error 2
      make: *** [arch/mips] Error 2
      
      [ralf@linux-mips: Fixed Sergei's complaint on the formatting of the
      cited commit and generally reformatted the log message.]
      Signed-off-by: NQais Yousef <qais.yousef@imgtec.com>
      Cc: alex@alex-smith.me.uk
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/11745/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      2a037f31
    • P
      MIPS: CPS: drop .set mips64r2 directives · f3575e23
      Paul Burton 提交于
      Commit 977e043d ("MIPS: kernel: cps-vec: Replace mips32r2 ISA level
      with mips64r2") leads to .set mips64r2 directives being present in 32
      bit (ie. CONFIG_32BIT=y) kernels. This is incorrect & leads to MIPS64
      instructions being emitted by the assembler when expanding
      pseudo-instructions. For example the "move" instruction can legitimately
      be expanded to a "daddu". This causes problems when the kernel is run on
      a MIPS32 CPU, as CONFIG_32BIT kernels of course often are...
      
      Fix this by dropping the .set <ISA> directives entirely now that Kconfig
      should be ensuring that kernels including this code are built with a
      suitable -march= compiler flag.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: <stable@vger.kernel.org> # 3.16+
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/10869/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      f3575e23
    • J
      MIPS: uaccess: Take EVA into account in [__]clear_user · d6a428fb
      James Hogan 提交于
      __clear_user() (and clear_user() which uses it), always access the user
      mode address space, which results in EVA store instructions when EVA is
      enabled even if the current user address limit is KERNEL_DS.
      
      Fix this by adding a new symbol __bzero_kernel for the normal kernel
      address space bzero in EVA mode, and call that from __clear_user() if
      eva_kernel_access().
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/10844/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      d6a428fb
    • J
      MIPS: uaccess: Take EVA into account in __copy_from_user() · 6f06a2c4
      James Hogan 提交于
      When EVA is in use, __copy_from_user() was unconditionally using the EVA
      instructions to read the user address space, however this can also be
      used for kernel access. If the address isn't a valid user address it
      will cause an address error or TLB exception, and if it is then user
      memory may be read instead of kernel memory.
      
      For example in the following stack trace from Linux v3.10 (changes since
      then will prevent this particular one still happening) kernel_sendmsg()
      set the user address limit to KERNEL_DS, and tcp_sendmsg() goes on to
      use __copy_from_user() with a kernel address in KSeg0.
      
      [<8002d434>] __copy_fromuser_common+0x10c/0x254
      [<805710e0>] tcp_sendmsg+0x5f4/0xf00
      [<804e8e3c>] sock_sendmsg+0x78/0xa0
      [<804e8f28>] kernel_sendmsg+0x24/0x38
      [<804ee0f8>] sock_no_sendpage+0x70/0x7c
      [<8017c820>] pipe_to_sendpage+0x80/0x98
      [<8017c6b0>] splice_from_pipe_feed+0xa8/0x198
      [<8017cc54>] __splice_from_pipe+0x4c/0x8c
      [<8017e844>] splice_from_pipe+0x58/0x78
      [<8017e884>] generic_splice_sendpage+0x20/0x2c
      [<8017d690>] do_splice_from+0xb4/0x110
      [<8017d710>] direct_splice_actor+0x24/0x30
      [<8017d394>] splice_direct_to_actor+0xd8/0x208
      [<8017d51c>] do_splice_direct+0x58/0x7c
      [<8014eaf4>] do_sendfile+0x1dc/0x39c
      [<8014f82c>] SyS_sendfile+0x90/0xf8
      
      Add the eva_kernel_access() check in __copy_from_user() like the one in
      copy_from_user().
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/10843/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      6f06a2c4
    • J
      MIPS: uaccess: Fix strlen_user with EVA · 5dc62fdd
      James Hogan 提交于
      The strlen_user() function calls __strlen_kernel_asm in both branches of
      the eva_kernel_access() conditional. For EVA it should be calling
      __strlen_user_eva for user accesses, otherwise it will load from the
      kernel address space instead of the user address space, and the access
      checking will likely be ineffective at preventing it due to EVA's
      overlapping user and kernel address spaces.
      
      This was found after extending the test_user_copy module to cover user
      string access functions, which gave the following error with EVA:
      
      test_user_copy: illegal strlen_user passed
      
      Fortunately the use of strlen_user() has been all but eradicated from
      the mainline kernel, so only out of tree modules could be affected.
      
      Fixes: e3a9b07a ("MIPS: asm: uaccess: Add EVA support for str*_user operations")
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: Paul Burton <paul.burton@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 3.15.x-
      Patchwork: https://patchwork.linux-mips.org/patch/10842/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      5dc62fdd
  10. 21 12月, 2015 7 次提交
    • H
      parisc: Fix syscall restarts · 71a71fb5
      Helge Deller 提交于
      On parisc syscalls which are interrupted by signals sometimes failed to
      restart and instead returned -ENOSYS which in the worst case lead to
      userspace crashes.
      A similiar problem existed on MIPS and was fixed by commit e967ef02
      ("MIPS: Fix restart of indirect syscalls").
      
      On parisc the current syscall restart code assumes that all syscall
      callers load the syscall number in the delay slot of the ble
      instruction. That's how it is e.g. done in the unistd.h header file:
      	ble 0x100(%sr2, %r0)
      	ldi #syscall_nr, %r20
      Because of that assumption the current code never restored %r20 before
      returning to userspace.
      
      This assumption is at least not true for code which uses the glibc
      syscall() function, which instead uses this syntax:
      	ble 0x100(%sr2, %r0)
      	copy regX, %r20
      where regX depend on how the compiler optimizes the code and register
      usage.
      
      This patch fixes this problem by adding code to analyze how the syscall
      number is loaded in the delay branch and - if needed - copy the syscall
      number to regX prior returning to userspace for the syscall restart.
      Signed-off-by: NHelge Deller <deller@gmx.de>
      Cc: stable@vger.kernel.org
      Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
      71a71fb5
    • V
      ARC: dw2 unwind: Catch Dwarf SNAFUs early · 6b538db7
      Vineet Gupta 提交于
      Instead of seeing empty stack traces, let kernel fail early so dwarf
      issues can be fixed sooner
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      6b538db7
    • V
      ARC: dw2 unwind: Don't bail for CIE.version != 1 · 6d0d5060
      Vineet Gupta 提交于
      The rudimentary CIE.version == 3 handling is already present in code
      (for return address register specification)
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      6d0d5060
    • V
      Revert "ARC: dw2 unwind: Ignore CIE version !=1 gracefully instead of bailing" · 2d64affc
      Vineet Gupta 提交于
      Blingly ignoring CIE.version != 1 was a bad idea.
      It still leaves "desirability" when running perf with callgraphing where libgcc
      symbols might show in hotspot.
      
      More importantly, basic CIE.version == 3 support already exists in code:
      
      |
      |   retAddrReg = state.version <= 1 ? *ptr++ : get_uleb128(&ptr, end);
      |
      
      Next commit with simply add continue-not-bail for CIE.version != 1
      
      This reverts commit 323f41f9.
      2d64affc
    • V
      ARC: Fix linking errors with CONFIG_MODULE + CONFIG_CC_OPTIMIZE_FOR_SIZE · 07fd7d4b
      Vineet Gupta 提交于
      At -Os, ARC gcc generates millicode thunk for function prologue/epilogue,
      which are served by libgcc.
      
      Modules historically are NOT linked with libgcc to avoid code bloat, reducing
      runtime relocation fixups etc. I even once tried doing that but got lost
      in makefile intricacies.
      
      This means modules at -Os don't get the millicode thunks, causing build
      failures below:
      
      | MODPOST 5 modules
      | ERROR: "__ld_r13_to_r18" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__ld_r13_to_r18_ret" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__st_r13_to_r18" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__ld_r13_to_r17_ret" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__st_r13_to_r17" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__ld_r13_to_r16_ret" [crypto/sha256_generic.ko] undefined!
      | ERROR: "__st_r13_to_r16" [crypto/sha256_generic.ko] undefined!
      |....
      |....
      
      Workaround that by inhibiting millicode thunks for loadable modules
      
      Fixes STAR 9000641864:
      ("Linux built with optimizations for size emits errors for modules")
      Reported-by: NAnton Kolesov <akolesov@synosys.com>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      07fd7d4b
    • A
      ARC: mm: fix building for MMU v2 · 4b32e89a
      Alexey Brodkin 提交于
      ARC700 cores with MMU v2 don't have IC_PTAG AUX register and so we only
      define ARC_REG_IC_PTAG for MMU versions >= 3.
      
      But current implementation of cache_line_loop_vX() routines assumes
      availability of all of them (v2, v3 and v4) simultaneously.
      
      And given undefined ARC_REG_IC_PTAG if CONFIG_MMU_VER=2 we're seeing
      compilation problem:
      ---------------------------------->8-------------------------------
        CC      arch/arc/mm/cache.o
      arch/arc/mm/cache.c: In function '__cache_line_loop_v3':
      arch/arc/mm/cache.c:270:13: error: 'ARC_REG_IC_PTAG' undeclared (first use in this function)
         aux_tag = ARC_REG_IC_PTAG;
                   ^
      arch/arc/mm/cache.c:270:13: note: each undeclared identifier is reported only once for each function it appears in
      scripts/Makefile.build:258: recipe for target 'arch/arc/mm/cache.o' failed
      ---------------------------------->8-------------------------------
      
      The simples fix is to have ARC_REG_IC_PTAG defined regardless MMU
      version being used.
      
      We don't use it in cache_line_loop_v2() anyways so who cares.
      Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      4b32e89a
    • V
      ARC: mm: HIGHMEM: Fix section mismatch splat · 899cfd2b
      Vineet Gupta 提交于
      | WARNING: vmlinux.o(.text+0xd6c2): Section mismatch in reference from the function alloc_kmap_pgtable() to the function
      | .init.text:__alloc_bootmem_low()
      The function alloc_kmap_pgtable() references the function __init __alloc_bootmem_low().
      This is often because alloc_kmap_pgtable lacks a __init annotation or the annotation of __alloc_bootmem_low is wrong.
      Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
      899cfd2b
  11. 19 12月, 2015 1 次提交
  12. 18 12月, 2015 4 次提交
    • M
      s390/dis: Fix handling of format specifiers · 272fa59c
      Michael Holzheu 提交于
      The print_insn() function returns strings like "lghi %r1,0". To escape the
      '%' character in sprintf() a second '%' is used. For example "lghi %%r1,0"
      is converted into "lghi %r1,0".
      
      After print_insn() the output string is passed to printk(). Because format
      specifiers like "%r" or "%f" are ignored by printk() this works by chance
      most of the time. But for instructions with control registers like
      "lctl %c6,%c6,780" this fails because printk() interprets "%c" as
      character format specifier.
      
      Fix this problem and escape the '%' characters twice.
      
      For example "lctl %%%%c6,%%%%c6,780" is then converted by sprintf()
      into "lctl %%c6,%%c6,780" and by printk() into "lctl %c6,%c6,780".
      Signed-off-by: NMichael Holzheu <holzheu@linux.vnet.ibm.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      272fa59c
    • A
      powerpc/opal-irqchip: Fix deadlock introduced by "Fix double endian conversion" · 036592fb
      Alistair Popple 提交于
      Commit 25642e14 ("powerpc/opal-irqchip: Fix double endian
      conversion") fixed an endian bug by calling opal_handle_events() in
      opal_event_unmask().
      
      However this introduced a deadlock if we find an event is active
      during unmasking and call opal_handle_events() again. The bad call
      sequence is:
      
        opal_interrupt()
        -> opal_handle_events()
           -> generic_handle_irq()
              -> handle_level_irq()
                 -> raw_spin_lock(&desc->lock)
                    handle_irq_event(desc)
                    unmask_irq(desc)
                    -> opal_event_unmask()
                       -> opal_handle_events()
                          -> generic_handle_irq()
                             -> handle_level_irq()
                                -> raw_spin_lock(&desc->lock)	(BOOM)
      
      When generating multiple opal events in quick succession this would lead
      to the following stall warnings:
      
      EEH: Fenced PHB#0 detected, location: U78C9.001.WZS09XA-P1-C32
      INFO: rcu_sched detected stalls on CPUs/tasks:
      
               12-...: (1 GPs behind) idle=68f/140000000000001/0 softirq=860/861 fqs=2065
               15-...: (1 GPs behind) idle=be5/140000000000001/0 softirq=1142/1143 fqs=2065
               (detected by 13, t=2102 jiffies, g=1325, c=1324, q=602)
      NMI watchdog: BUG: soft lockup - CPU#18 stuck for 22s! [irqbalance:2696]
      INFO: rcu_sched detected stalls on CPUs/tasks:
               12-...: (1 GPs behind) idle=68f/140000000000001/0 softirq=860/861 fqs=8371
               15-...: (1 GPs behind) idle=be5/140000000000001/0 softirq=1142/1143 fqs=8371
               (detected by 20, t=8407 jiffies, g=1325, c=1324, q=1290)
      
      This patch corrects the problem by queuing the work if an event is
      active during unmasking, which is similar to the pre-endian fix
      behaviour.
      
      Fixes: 25642e14 ("powerpc/opal-irqchip: Fix double endian conversion")
      Signed-off-by: NAlistair Popple <alistair@popple.id.au>
      Reported-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      036592fb
    • F
      ARM: OMAP2+: AM43xx: select ARM TWD timer · 54011103
      Felipe Balbi 提交于
      Make sure to tell the kernel that AM437x devices have ARM TWD timer.
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      [grygorii.strashko@ti.com: drop ARM Global timer selection, because
       it's incompatible with PM (cpuidle/cpufreq). So, it's unsafe to enable
       it unconditionally]
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      54011103
    • G
      ARM: OMAP2+: am43xx: enable GENERIC_CLOCKEVENTS_BROADCAST · 0b3e6fca
      Grygorii Strashko 提交于
      System will misbehave in the following case:
      - AM43XX only build (UP);
      - CONFIG_CPU_IDLE=y
      - ARM TWD timer enabled and selected as clockevent device.
      
      In the above case, It's expected that broadcast timer will be used as
      backup timer when CPUIdle will put MPU in low power states where ARM
      TWD will stop and lose its context. But, the CONFIG_SMP might not be
      selected when kernel is built for AM43XX SoC only and, as result,
      GENERIC_CLOCKEVENTS_BROADCAST option will not be selected also. This
      will break CPUIdle and System will stuck in low power states.
      
      Hence, fix it by selecting GENERIC_CLOCKEVENTS_BROADCAST option for
      AM43XX SoCs always and add empty tick_broadcast() function
      implementation - no need to send any IPI on UP. After this change
      timer1 will be selected as broadcast timer the same way as for SMP,
      and CPUIdle will work properly.
      Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      0b3e6fca