1. 20 8月, 2008 1 次提交
  2. 04 8月, 2008 1 次提交
  3. 23 5月, 2008 2 次提交
  4. 28 12月, 2007 2 次提交
    • O
      [POWERPC] pasemi: Distribute interrupts evenly across cpus · d87bf3be
      Olof Johansson 提交于
      By default the OpenPIC on PWRficient will bias to one core (since that
      will improve changes of the other core being able to stay idle/powered
      down). However, this conflicts with most irq load balancing schemes,
      since setting an interrupt to be delivered to either core doesn't really
      result in the load being shared. It also doesn't work well with the
      soft irq disable feature of PPC, since EE will stay on until the first
      interrupt is taken while soft disabled.
      
      Set the gconf0 config bit that enables even distribution of interrupts
      among the two cores.
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      d87bf3be
    • O
      [POWERPC] pasemi: Implement NMI support · f365355e
      Olof Johansson 提交于
      Some PWRficient-based boards have a NMI button that's wired up to a GPIO
      as interrupt source. By configuring the openpic accordingly, these get
      delivered as a machine check with high priority, instead of as an external
      interrupt.
      
      The device tree contains a property "nmi-source" in the openpic node
      for these systems, and it's the (hwirq) source for the input.
      
      Also, for these interrupts, the IACK is read from another register than
      the regular (MCACK instead), but they are EOI'd as usual. So implement
      said function for the mpic driver.
      
      Finally, move a couple of external function defines to include/ instead
      of local under sysdev. Being able to mask/unmask and eoi directly saves
      us from setting up a dummy irq handler that will never be called.
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      f365355e
  5. 03 10月, 2007 1 次提交
  6. 13 9月, 2007 2 次提交
  7. 22 7月, 2007 1 次提交
    • B
      [POWERPC] MPIC protected sources · 7fd72186
      Benjamin Herrenschmidt 提交于
      Some HW platforms, such as the new cell blades, requires some MPIC sources
      to be left alone by the operating system. This implements support for
      a "protected-sources" property in the mpic controller node containing a list
      of source numbers to be protected against operating system interference.
      
      For those interested in the gory details, the MPIC on the southbridge of
      those blades has some of the processor outputs routed to the cell, and
      at least one routed as a GPIO to the service processor. It will be used
      in the GA product for routing some of the southbridge error interrupts
      to the service processor which implements some of the RAS stuff, such
      as checkstopping when fatal errors occurs before they can propagate.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Acked-by: NArnd Bergmann <arnd.bergmann@de.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      7fd72186
  8. 08 5月, 2007 1 次提交
  9. 07 5月, 2007 1 次提交
  10. 24 4月, 2007 1 次提交
  11. 07 2月, 2007 1 次提交
  12. 04 12月, 2006 2 次提交
    • B
      [POWERPC] Improve MPIC driver auto-configuration from DT · a959ff56
      Benjamin Herrenschmidt 提交于
      This patch applies on top of the MPIC DCR support. It makes the MPIC
      driver capable of a lot more auto-configuration based on the device-tree,
      for example, it can retreive it's own physical address if not passed as
      an argument, find out if it's DCR or MMIO mapped, and set the BIG_ENDIAN
      flag automatically in the presence of a "big-endian" property in the
      device-tree node.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a959ff56
    • B
      [POWERPC] Support for DCR based MPIC · fbf0274e
      Benjamin Herrenschmidt 提交于
      This patch implements support for DCR based MPIC implementations. Such
      implementations have the MPIC_USES_DCR flag set and don't use the phys_addr
      argument of mpic_alloc (they require a valid dcr mapping in the device node)
      
      This version of the patch can use a little bif of cleanup still (I can
      probably consolidate rb->dbase/doff, at least once I'm sure on how the
      hardware is actually supposed to work vs. possible simulator issues) and
      it should be possible to build a DCR-only version of the driver. I need
      to cleanup a bit the CONFIG_* handling for that and probably introduce
      CONFIG_MPIC_MMIO and CONFIG_MPIC_DCR.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fbf0274e
  13. 07 10月, 2006 1 次提交
  14. 30 8月, 2006 1 次提交
    • Z
      [POWERPC] Support for "weird" MPICs and fixup mpc7448_hpc2 · 7233593b
      Zang Roy-r61911 提交于
      This adds a new hardware information table for mpic. This enables
      the mpic code to deal with mpic controllers with different register
      layouts and hardware behaviours.
      
      This introduces CONFIG_MPIC_WEIRD.  For boards with non standard mpic
      controllers, select CONFIG_MPIC_WEIRD and add its hardware information
      in the mpic_infos[] array.
      
      TSI108/109 PIC takes the first index of weird hardware information
      table.  :)  The table can be extended. The Tsi108/109 PIC looks like
      standard OpenPIC but, in fact, is different in register mapping and
      behavior.
      
      The patch does not affect the behavior of standard mpic.  If
      CONFIG_MPIC_WEIRD is not defined, the code is essentially identical to
      the current code.
      
      [benh@kernel.crashing.org:
      This patch is a slightly cleaned up version of Zang Roy's support for
      the TSI108 MPIC variant. It also fixes up MPC7448_hpc2 to use the new
      version of the type macros and changes the way MPIC is selected in
      Kconfig to better match what is done for other system devices.
      ]
      Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      7233593b
  15. 03 7月, 2006 2 次提交
    • B
      [POWERPC] Add new interrupt mapping core and change platforms to use it · 0ebfff14
      Benjamin Herrenschmidt 提交于
      This adds the new irq remapper core and removes the old one.  Because
      there are some fundamental conflicts with the old code, like the value
      of NO_IRQ which I'm now setting to 0 (as per discussions with Linus),
      etc..., this commit also changes the relevant platform and driver code
      over to use the new remapper (so as not to cause difficulties later
      in bisecting).
      
      This patch removes the old pre-parsing of the open firmware interrupt
      tree along with all the bogus assumptions it made to try to renumber
      interrupts according to the platform. This is all to be handled by the
      new code now.
      
      For the pSeries XICS interrupt controller, a single remapper host is
      created for the whole machine regardless of how many interrupt
      presentation and source controllers are found, and it's set to match
      any device node that isn't a 8259.  That works fine on pSeries and
      avoids having to deal with some of the complexities of split source
      controllers vs. presentation controllers in the pSeries device trees.
      
      The powerpc i8259 PIC driver now always requests the legacy interrupt
      range. It also has the feature of being able to match any device node
      (including NULL) if passed no device node as an input. That will help
      porting over platforms with broken device-trees like Pegasos who don't
      have a proper interrupt tree.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      0ebfff14
    • B
      [POWERPC] Use the genirq framework · b9e5b4e6
      Benjamin Herrenschmidt 提交于
      This adapts the generic powerpc interrupt handling code, and all of
      the platforms except for the embedded 6xx machines, to use the new
      genirq framework.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      b9e5b4e6
  16. 21 6月, 2006 1 次提交
    • M
      [POWERPC] mpic: add support for serial mode interrupts · 868ea0c9
      Mark A. Greer 提交于
      On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote:
      > On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote:
      > > MPC10x-style interrupt controllers have a serial mode that allows
      > > several interrupts to be clocked in through one INT signal.
      > >
      > > This patch adds the software support for that mode.
      >
      > You hard code the clock ratio... why not add a separate call to be
      > called after mpic_init,
      > something like mpic_set_serial_int(int mpic, int enable, int
      > clock_ratio) ?
      
      How's this?
      --
      
      MPC10x-style interrupt controllers have a serial mode that allows
      several interrupts to be clocked in through one INT signal.
      
      This patch adds the software support for that mode.
      Signed-off-by: NMark A. Greer <mgreer@mvista.com>
      --
      
       arch/powerpc/sysdev/mpic.c |   20 ++++++++++++++++++++
       include/asm-powerpc/mpic.h |   10 ++++++++++
       2 files changed, 30 insertions(+)
      --
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      868ea0c9
  17. 09 1月, 2006 3 次提交
  18. 20 10月, 2005 1 次提交
  19. 27 9月, 2005 1 次提交
  20. 26 9月, 2005 1 次提交
    • P
      powerpc: Merge enough to start building in arch/powerpc. · 14cf11af
      Paul Mackerras 提交于
      This creates the directory structure under arch/powerpc and a bunch
      of Kconfig files.  It does a first-cut merge of arch/powerpc/mm,
      arch/powerpc/lib and arch/powerpc/platforms/powermac.  This is enough
      to build a 32-bit powermac kernel with ARCH=powerpc.
      
      For now we are getting some unmerged files from arch/ppc/kernel and
      arch/ppc/syslib, or arch/ppc64/kernel.  This makes some minor changes
      to files in those directories and files outside arch/powerpc.
      
      The boot directory is still not merged.  That's going to be interesting.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      14cf11af
  21. 05 8月, 2005 1 次提交
  22. 26 6月, 2005 1 次提交
    • R
      [PATCH] ppc64: kexec support for ppc64 · fce0d574
      R Sharada 提交于
      This patch implements the kexec support for ppc64 platforms.
      
      A couple of notes:
      
      1)  We copy the pages in virtual mode, using the full base kernel
          and a statically allocated stack.   At kexec_prepare time we
          scan the pages and if any overlap our (0, _end[]) range we
          return -ETXTBSY.
      
          On PowerPC 64 systems running in LPAR (logical partitioning)
          mode, only a small region of memory, referred to as the RMO,
          can be accessed in real mode.  Since Linux runs with only one
          zone of memory in the memory allocator, and it can be orders of
          magnitude more memory than the RMO, looping until we allocate
          pages in the source region is not feasible.  Copying in virtual
          means we don't have to write a hash table generation and call
          hypervisor to insert translations, instead we rely on the pinned
          kernel linear mapping.  The kernel already has move to linked
          location built in, so there is no requirement to load it at 0.
      
          If we want to load something other than a kernel, then a stub
          can be written to copy a linear chunk in real mode.
      
      2)  The start entry point gets passed parameters from the kernel.
          Slaves are started at a fixed address after copying code from
          the entry point.
      
          All CPUs get passed their firmware assigned physical id in r3
          (most calling conventions use this register for the first
          argument).
      
          This is used to distinguish each CPU from all other CPUs.
          Since firmware is not around, there is no other way to obtain
          this information other than to pass it somewhere.
      
          A single CPU, referred to here as the master and the one executing
          the kexec call, branches to start with the address of start in r4.
          While this can be calculated, we have to load it through a gpr to
          branch to this point so defining the register this is contained
          in is free.  A stack of unspecified size is available at r1
          (also common calling convention).
      
          All remaining running CPUs are sent to start at absolute address
          0x60 after copying the first 0x100 bytes from start to address 0.
          This convention was chosen because it matches what the kernel
          has been doing itself.  (only gpr3 is defined).
      
          Note: This is not quite the convention of the kexec bootblock v2
          in the kernel.  A stub has been written to convert between them,
          and we may adjust the kernel in the future to allow this directly
          without any stub.
      
      3)  Destination pages can be placed anywhere, even where they
          would not be accessible in real mode.  This will allow us to
          place ram disks above the RMO if we choose.
      Signed-off-by: NMilton Miller <miltonm@bga.com>
      Signed-off-by: NR Sharada <sharada@in.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      fce0d574
  23. 23 6月, 2005 1 次提交
  24. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4