1. 10 6月, 2015 1 次提交
  2. 02 6月, 2015 1 次提交
    • G
      gpio: Add GPIO support for Broadcom STB SoCs · 3b0213d5
      Gregory Fong 提交于
      This adds support for the GPIO IP "UPG GIO" used on
      Broadcom STB SoCs (BCM7XXX and some others). Uses
      basic_mmio_gpio to instantiate a gpio_chip for each bank.
      The driver assumes that it handles the base set of GPIOs
      on the system and that it can start its numbering sequence
      from 0, so any GPIO expanders used with it must dynamically
      assign GPIO numbers after this driver has finished
      registering its GPIOs.
      
      Does not implement the interrupt-controller portion yet,
      will be done in a future commit.
      
      v2:
      - change include to use <linux/gpio/driver.h> instead of
        <linux/gpio.h>
      - get rid of unnecessary imask member in struct bank
      - rename GPIO_PER_BANK -> MAX_GPIO_PER_BANK
      - always have 32 GPIOs per bank and add 'width' member in
        struct bank to hold actual number of GPIOs in use
      - mark of_match table as const
      List-usage-fixed-by: NBrian Norris <computersforpeace@gmail.com>
      Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b0213d5
  3. 06 5月, 2015 1 次提交
  4. 05 5月, 2015 1 次提交
  5. 07 4月, 2015 1 次提交
  6. 28 3月, 2015 1 次提交
  7. 08 3月, 2015 1 次提交
    • T
      drivers/gpio: Altera soft IP GPIO driver · c5abbba9
      Tien Hock Loh 提交于
      Adds a new driver for Altera soft GPIO IP. The driver is able to do
      read/write and allows GPIO to be a interrupt controller.
      
      Tested on Altera GHRD on interrupt handling and IO.
      
      v10:
      - Updated conflicting device tree parameters
      - Removed unused headers
      - Used macro instead of magic numbers for ngpio
      - Code readability cleanup using ?: and temporal variables
      - Removed leftover garbage and unnecessary function calls
      - Checked bgpio_init but unusable because Altera GPIO may not
        be a multiple of 8 bits
      
      v9:
      - Removed duplicated initialization on set_type using temporals
        to improve code readability in calling generic_handle_irq
      - Using ?: ternary to reduce code size
      
      v8:
      - Using for_each_set_bit
      - Added const for struct definition
      - Removed naggy pr_err
      - Sort alpha header
      - Remove unused macros
      - Use fixed width data types instead of unsigned long
      - Whitespace issue fixes
      - Removed _relaxed function for better compatibility across different
        CPU
      - Changed irq_create_mapping to platform_get_irq updated implementation
        to use gpiochip_irqchip_add
      - Reserve interrupt-cells number 2 in device tree binding for future
        use
      - Remove confusing sections on devicetree bindings
      - Added tristate Kconfig help text
      
      v7:
      - Used dev_warn instead of pr_warn
      - Clean up unnecesarry if else indentation
      
      v6:
      - Added irq_startup and irq_shutdown
      - Changed bitwise clamping style
      - Cleanup bitwise operation to improve readability change naming of
        mapped irqs from virq to mapped_irq
      
      v5:
      - Dispose irq_domain mapping correctly
      - Update optional binding description in binding docs
      
      v4:
      - Added vendor prefix to devicetree binding for IP specific properties
        using MMIO GPIO helper library instead of manually map PIO to memory
      - altera_gpio_chip inline struct documentation to kerneldoc
      - Using dev_ print to print a better failure message
      
      v2, v3:
      - Do not reference NO_IRQ
      - Updated irq_set_type to only allow the hardware configured irq type
      Signed-off-by: NTien Hock Loh <thloh@altera.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c5abbba9
  8. 20 1月, 2015 2 次提交
  9. 11 11月, 2014 1 次提交
  10. 24 10月, 2014 1 次提交
  11. 21 10月, 2014 1 次提交
  12. 28 8月, 2014 1 次提交
  13. 10 7月, 2014 1 次提交
  14. 09 7月, 2014 2 次提交
  15. 17 6月, 2014 1 次提交
  16. 29 4月, 2014 1 次提交
  17. 18 3月, 2014 1 次提交
  18. 05 3月, 2014 2 次提交
    • A
      gpio: remove obsolete tnetv107x driver · de15011a
      Arnd Bergmann 提交于
      The tnetv107x platform is getting removed, so this driver won't
      be needed any more.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: Alexandre Courbot <gnurou@gmail.com>
      Cc: linux-gpio@vger.kernel.org
      Acked-by: NSekhar Nori <nsekhar@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      de15011a
    • J
      gpio: add a driver for the Synopsys DesignWare APB GPIO block · 7779b345
      Jamie Iles 提交于
      The Synopsys DesignWare block is used in some ARM devices (picoxcell)
      and can be configured to provide multiple banks of GPIO pins.
      
      v12: - Add irq_startup/shutdown
           - do irq_create_mapping() in probe, irq_find_mapping() in to_irq()
           - Adjust mappings to show support for 1 gpio per port.
           - gpio-cells = <1>
      v11: - Use NULL when checking existence of 'interrupts' property
           - Bindings descriptions cleanup
      v10: - in documentation nr-gpio -> nr-gpios
      v9:  - cleanup in dt bindings doc
           - use of_get_child_count()
      v8:  - remove socfpga.dtsi changes
           - minor cleanup in devicetree documentation
      v7:  - use irq_generic_chip
           - support one irq per gpio line or one irq for many
           - s/bank/port/ and other cleanup
      v6:  - (atull) squash the set of patches
           - use linear irq domain
           - build fixes. Original driver was reviewed on v3.2.
           - Fix setting irq edge type for 'rising' and 'both'.
           - Support as a loadable module.
           - Use bgpio_chip's spinlock during register access.
           - Clean up register names to match spec
           - s/bank/port/ because register names use the word 'port'
           - s/nr-gpio/nr-gpios/
           - don't get/put the of_node
           - remove signoffs/acked-by's because of changes
           - other cleanup
      v5:  - handle sparse bank population correctly
      v3:  - depend on rather than select IRQ_DOMAIN
           - split IRQ support into a separate patch
      v2:  - use Rob Herring's irqdomain in generic irq chip patches
           - use reg property to indicate bank index
           - support irqs on both edges based on LinusW's u300 driver
      Signed-off-by: NJamie Iles <jamie@jamieiles.com>
      Signed-off-by: NAlan Tull <atull@altera.com>
      Reviewed-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      7779b345
  19. 27 2月, 2014 1 次提交
  20. 21 1月, 2014 1 次提交
    • M
      gpio: add LP3943 I2C GPIO expander driver · 0cc59b9d
      Milo Kim 提交于
      This is one of LP3943 MFD driver.
      LP3943 is configurable as a GPIO expander, up to 16 GPIOs.
      
      * Application note: how to configure LP3943 as a GPIO expander
        http://www.ti.com/lit/an/snva287a/snva287a.pdf
      
      * Supported GPIO controller operations
        request, free, direction_input, direction_output, get and set
      
      * GPIO direction register not supported
        LP3943 doesn't have the GPIO direction register. It only provides input and
        output status registers.
        So, private data for the direction should be handled manually.
        This variable is updated whenever the direction is changed and
        used in 'get' operation.
      
      * Pin assignment
        A driver data, 'pin_used' is checked when a GPIO is requested.
        If the GPIO is already assigned, then returns as failure.
        If the GPIO is available, 'pin_used' is set.
        When the GPIO is not used anymore, then it is cleared.
        It is defined as unsigned long type for atomic bit operation APIs,
        but only LSB 16bits are used because LP3943 has 16 outputs.
      Signed-off-by: NMilo Kim <milo.kim@ti.com>
      Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NLee Jones <lee.jones@linaro.org>
      0cc59b9d
  21. 26 12月, 2013 1 次提交
  22. 20 12月, 2013 1 次提交
  23. 12 12月, 2013 1 次提交
    • B
      gpio: driver for Xtensa GPIO32 · 3b31d0ec
      Baruch Siach 提交于
      GPIO32 is a standard optional extension to the Xtensa architecture
      core that provides preconfigured output and input ports for intra
      SoC signaling. The GPIO32 option is implemented as 32bit Tensilica
      Instruction Extension (TIE) output state called EXPSTATE, and 32bit
      input wire called IMPWIRE. This driver treats input and output
      states as two distinct devices.
      
      v3:
      * Use BUG() in xtensa_impwire_set_value() to indicate that
        it should never be called (Linus Walleij)
      v2:
      * Address the comments of Linus Walleij:
        - Add a few comments
        - Expand commit log message
        - Use the BIT() macro for bit offsets
        - Rewrite CPENABLE handling as static inlines
        - Use device_initcall()
      * Depend on !SMP for reason explained in the comments (Marc Gauthier)
      * Use XCHAL_CP_ID_XTIOP to enable/disable GPIO32 only
      Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b31d0ec
  24. 03 12月, 2013 1 次提交
  25. 26 10月, 2013 1 次提交
  26. 11 10月, 2013 1 次提交
  27. 21 9月, 2013 2 次提交
  28. 30 8月, 2013 1 次提交
    • S
      gpio: add GPIO support for F71882FG and F71889F · 6c17aa01
      Simon Guinot 提交于
      This patch adds support for the GPIOs found on the Fintek super-I/O
      chips F71882FG and F71889F.
      
      A super-I/O is a legacy I/O controller embedded on x86 motherboards. It
      is used to connect the low-bandwidth devices. Among others functions the
      F71882FG/F71889F provides: a parallel port, two serial ports, a keyboard
      controller, an hardware monitoring controller and some GPIO pins.
      
      Note that this super-I/Os are embedded on some Atom-based LaCie NASes.
      The GPIOs are used to control the LEDs and the hard drive power.
      
      Changes since v3:
      - Use request_muxed_region to protect the I/O ports against concurrent
        accesses.
      
      Changes since v2:
      - Remove useless NULL setters for driver data.
      
      Changes since v1:
      - Enhance the commit message by describing what is a Super-I/O.
      - Use self-explanatory names for the GPIO register macros.
      - Add a comment to explain the platform device and driver registration.
      - Fix gpio_get when GPIO is configured in input mode. I only had
        the hardware to check this mode recently...
      Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6c17aa01
  29. 26 8月, 2013 1 次提交
  30. 21 7月, 2013 3 次提交
    • G
      gpio: Kontron PLD gpio driver · d22fcde0
      Guenter Roeck 提交于
      Add gpio support for the on-board PLD found on some Kontron embedded modules.
      
      Originally-from: Michael Brunner <michael.brunner@kontron.com>
      Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: NKevin Strasser <kevin.strasser@linux.intel.com>
      Acked-by: NDarren Hart <dvhart@linux.intel.com>
      Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      d22fcde0
    • J
      gpio-tz1090-pdc: add TZ1090 PDC gpio driver · 79bb6460
      James Hogan 提交于
      Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
      TZ1090 SoC.
      
      The driver is instantiated by device tree and supports interrupts for
      the SysWake GPIOs only.
      
      Changes in v4:
       - fix typos in DT bindings compatible properties
       - reference Documentation/devicetree/bindings/gpio/gpio.txt in
         gpio-ranges description in DT bindings
       - fix gpio-ranges examples in DT bindings (it must now have 3 cells)
      
      Changes in v3:
       - separated from irq-imgpdc and removed arch/metag changes to allow
         these patches to go upstream separately via the pinctrl[/gpio] trees
         (particularly the pinctrl drivers depend on the new pinconf DT
         bindings).
       - some s/unsigned/unsigned int/.
       - gpio-tz1090*: refer to <dt-bindings/gpio/gpio.h> and
         <dt-bindings/interrupt-controller/irq.h> flags in bindings.
       - gpio-tz1090*: move initcall from postcore to subsys.
      
      Changes in v2:
       - gpio-tz1090-pdc: remove references to Linux flags in dt bindings
       - gpio-tz1090-pdc: make use of BIT() from linux/bitops.h
       - gpio-tz1090-pdc: make register accessors inline to match pinctrl
       - gpio-tz1090-pdc: update gpio-ranges to use 3 cells after recent ABI
         breakage
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Rob Landley <rob@landley.net>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-doc@vger.kernel.org
      Cc: devicetree-discuss@lists.ozlabs.org
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      79bb6460
    • J
      gpio-tz1090: add TZ1090 gpio driver · 9caf1f22
      James Hogan 提交于
      Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
      This doesn't include low-power GPIOs as they're controlled separately
      via the Powerdown Controller (PDC) registers.
      
      The driver is instantiated by device tree and supports interrupts for
      all GPIOs.
      
      Changes in v4:
       - fix typos in DT bindings compatible properties
       - reference Documentation/devicetree/bindings/gpio/gpio.txt in
         gpio-ranges description in DT bindings
       - fix gpio-ranges examples in DT bindings (it must now have 3 cells)
       - gpio-tz1090: use of_property_read_u32 instead of of_get_property
      
      Changes in v3:
       - separated from irq-imgpdc and removed arch/metag changes to allow
         these patches to go upstream separately via the pinctrl[/gpio] trees
         (particularly the pinctrl drivers depend on the new pinconf DT
         bindings).
       - some s/unsigned/unsigned int/.
       - some s/unsigned int/bool/ and use of BIT().
       - gpio-tz1090*: refer to <dt-bindings/gpio/gpio.h> and
         <dt-bindings/interrupt-controller/irq.h> flags in bindings.
       - gpio-tz1090*: move initcall from postcore to subsys.
       - gpio-tz1090: add REG_ prefix to some constants for consistency.
       - gpio-tz1090: add comment to explain tz1090_gpio_irq_next_edge
         cunningness.
      
      Changes in v2:
       - gpio-tz1090: remove references to Linux flags in dt bindings
       - gpio-tz1090: make use of BIT() from linux/bitops.h
       - gpio-tz1090: make register accessors inline to match pinctrl
       - gpio-tz1090: update gpio-ranges to use 3 cells after recent ABI
         breakage
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Rob Landley <rob@landley.net>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-doc@vger.kernel.org
      Cc: devicetree-discuss@lists.ozlabs.org
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      9caf1f22
  31. 19 6月, 2013 1 次提交
  32. 27 4月, 2013 1 次提交
    • O
      Revert "ARM: exynos: enable multiplatform support" · 4923ee44
      Olof Johansson 提交于
      This reverts commit bd51de53.
      
      Turns out that multiplatform breaks some uses cases, such as when you
      have an existing defconfig, since it adds the new EXYNOS_SINGLE config
      option as a dependecy. As a result, nearly all exynos config options
      will be disabled by default.
      
      Reverting instead of rebasing since this branch is pulled in as a
      dependency elsewhere.
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      4923ee44
  33. 26 4月, 2013 1 次提交
  34. 19 4月, 2013 1 次提交
    • A
      ARM: exynos: enable multiplatform support · bd51de53
      Arnd Bergmann 提交于
      This makes it possible to enable the exynos platform as part of a
      multiplatform kernel, in addition to keeping the single-platform
      exynos support.
      
      The multiplatform variant has a number of limitations at the moment:
      
      * It only supports DT-enabled machines. This is not a problem in
        the long run, as non-DT machines for exynos are going away.
        The main problem here is that the gpio code and the exynos_eint
        irqchip are not multiplatform capable but still required for
        ATAGS based boot.
      * The watchdog driver is still missing a conversion.
      * sparsemem and memory_holes are currently not supported in
        multiplatform.
      
      The the multiplatform aware ARCH_EXYNOS Kconfig symbol is disabled
      for now, as dependent patches are still pending in other
      subsystem trees. We will enable it once everything comes together.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      bd51de53