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  1. 08 2月, 2007 9 次提交
  3. 03 2月, 2007 1 次提交
    • T
      ahci/pata_jmicron: fix JMicron quirk · 77280989
      由 Tejun Heo 提交于 
      For all JMicrons except for 361 and 368, AHCI mode enable bits in the
Control(1) should be set.  This used to be done in both ahci and
pata_jmicron but while moving programming to PCI quirk, it was removed
from ahci part while still left in pata_jmicron.

The implemented JMicron PCI quirk was incorrect in that it didn't
program AHCI mode enable bits.  If pata_jmicron is loaded first and
programs those bits, the ahci ports work; otherwise, ahci device
detection fails miserably.

This patch makes JMicron PCI quirk clear SATA IDE mode bits and set
AHCI mode bits and remove the respective part from pata_jmicron.
Tested on JMB361, 363 and 368.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      77280989
  5. 02 2月, 2007 2 次提交
  7. 31 1月, 2007 1 次提交
  9. 23 1月, 2007 2 次提交
  11. 12 1月, 2007 1 次提交
    • B
      [PATCH] increment pos before looking for the next cap in __pci_find_next_ht_cap · 47a4d5be
      由 Brice Goglin 提交于 
      While testing 2.6.20-rc3 on a machine with some CK804 chipsets, we noticed
that quirk_nvidia_ck804_msi_ht_cap() was not detecting HT MSI capabilities
anymore.  It is actually caused by the MSI mapping on the root chipset
being the 2nd HT capability in the chain.  pci_find_ht_capability() does
not seem to find anything but the first HT cap correctly, because it
forgets to increment the position before looking for the next cap.  The
following patch seems to fix it.

At least, this proves that having a ttl is good idea since the machine
would have been stucked in an infinite loop if we didn't have a ttl :)

We have to pass pos + PCI_CAP_LIST_NEXT to __pci_find_next_cap_ttl to
get the next HT cap instead of the same one again.
Signed-off-by: NBrice Goglin <brice@myri.com>
Signed-off-by: NAndrew J. Gallatin <gallatin@myri.com>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      47a4d5be
  13. 11 1月, 2007 1 次提交
    • V
      [PATCH] x86-64: pci quirks MODPOST warning fix · 9d24a81e
      由 Vivek Goyal 提交于 
      o MODPOST generates warnings for i386 if kernel is compiled with
  CONFIG_RELOCATABLE=y

WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc_ich6' (at offset 0xc0217d58) and 'quirk_cardbus_legacy'
WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc' (at offset 0xc0217fd9) and 'pci_match_id'

o Two quirk functions which are non __init, are accessing data which is
  of type __init.
Signed-off-by: NVivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: NAndi Kleen <ak@suse.de>
      9d24a81e
  15. 10 1月, 2007 1 次提交
  17. 06 1月, 2007 2 次提交
  19. 31 12月, 2006 1 次提交
  21. 23 12月, 2006 1 次提交
    • A
      [PATCH] increase CARDBUS_MEM_SIZE · fe0e5c4d
      由 Andrew Morton 提交于 
      Linus sayeth:

Google knows everything, and finds, on MS own site no less:

  "Windows 2000 default resources:

   One 4K memory window

   One 2 MB memory window

   Two 256-byte I/O windows"

which is clearly utterly bogus and insufficient. But Microsoft apparently
realized this, and:

  "Windows XP default resources:

   Because one memory window of 4K and one window of 2 MB are not
   sufficient for CardBus controllers in many configurations, Windows XP
   allocates larger memory windows to CardBus controllers where possible.
   However, resource windows are static (that is, the operating system
   does not dynamically allocate larger memory windows if new devices
   appear.) Under Windows XP, CardBus controllers will be assigned the
   following resources:

   One 4K memory window, as in Windows 2000

   64 MB memory, if that amount of memory is available. If 64 MB is not
   available the controller will receive 32 MB; if 32 MB is not available,
   the controller will receive 16 MB; if 16 MB is not available, the
   bridge will receive 8 MB; and so on down to a minimum assignment of 1
   MB in configurations where memory is too constrained for the operating
   system to provide a larger window.

   Two 256-byte I/O windows"

So I think we have our answer. Windows uses one 4k window, and one 64MB
window. And they are no more dynamic than we are (we _could_ try to do it
dynamically, but let's face it, it's fairly painful to dynamically expand
PCI bus resources - you may need to reprogram everything up to the root,
so it would be absolutely crazy to do that unless you have some serious
masochistic tendencies).

So let's just increase our default value to 64M too.

Cc: Markus Rechberger <mrechberger@gmail.com>
Cc: Daniel Ritz <daniel.ritz@gmx.ch>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      fe0e5c4d
  23. 21 12月, 2006 18 次提交