1. 26 8月, 2013 1 次提交
  2. 20 8月, 2013 1 次提交
    • Y
      x86/ioapic/kcrash: Prevent crash_kexec() from deadlocking on ioapic_lock · 17405453
      Yoshihiro YUNOMAE 提交于
      Prevent crash_kexec() from deadlocking on ioapic_lock. When
      crash_kexec() is executed on a CPU, the CPU will take ioapic_lock
      in disable_IO_APIC(). So if the cpu gets an NMI while locking
      ioapic_lock, a deadlock will happen.
      
      In this patch, ioapic_lock is zapped/initialized before disable_IO_APIC().
      
      You can reproduce this deadlock the following way:
      
      1. Add mdelay(1000) after raw_spin_lock_irqsave() in
         native_ioapic_set_affinity()@arch/x86/kernel/apic/io_apic.c
      
         Although the deadlock can occur without this modification, it will increase
         the potential of the deadlock problem.
      
      2. Build and install the kernel
      
      3. Set up the OS which will run panic() and kexec when NMI is injected
          # echo "kernel.unknown_nmi_panic=1" >> /etc/sysctl.conf
          # vim /etc/default/grub
            add "nmi_watchdog=0 crashkernel=256M" in GRUB_CMDLINE_LINUX line
          # grub2-mkconfig
      
      4. Reboot the OS
      
      5. Run following command for each vcpu on the guest
          # while true; do echo <CPU num> > /proc/irq/<IO-APIC-edge or IO-APIC-fasteoi>/smp_affinitity; done;
         By running this command, cpus will get ioapic_lock for setting affinity.
      
      6. Inject NMI (push a dump button or execute 'virsh inject-nmi <domain>' if you
         use VM). After injecting NMI, panic() is called in an nmi-handler context.
         Then, kexec will normally run in panic(), but the operation will be stopped
         by deadlock on ioapic_lock in crash_kexec()->machine_crash_shutdown()->
         native_machine_crash_shutdown()->disable_IO_APIC()->clear_IO_APIC()->
         clear_IO_APIC_pin()->ioapic_read_entry().
      Signed-off-by: NYoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com>
      Cc: Andi Kleen <ak@linux.intel.com>
      Cc: Gleb Natapov <gleb@redhat.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Marcelo Tosatti <mtosatti@redhat.com>
      Cc: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com>
      Cc: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
      Cc: Zhang Yanfei <zhangyanfei@cn.fujitsu.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      Cc: yrl.pp-manager.tt@hitachi.com
      Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
      Cc: Seiji Aguchi <seiji.aguchi@hds.com>
      Link: http://lkml.kernel.org/r/20130820070107.28245.83806.stgit@yunodevelSigned-off-by: NIngo Molnar <mingo@kernel.org>
      17405453
  3. 28 1月, 2013 14 次提交
  4. 25 1月, 2013 1 次提交
    • A
      x86/MSI: Support multiple MSIs in presense of IRQ remapping · 51906e77
      Alexander Gordeev 提交于
      The MSI specification has several constraints in comparison with
      MSI-X, most notable of them is the inability to configure MSIs
      independently. As a result, it is impossible to dispatch
      interrupts from different queues to different CPUs. This is
      largely devalues the support of multiple MSIs in SMP systems.
      
      Also, a necessity to allocate a contiguous block of vector
      numbers for devices capable of multiple MSIs might cause a
      considerable pressure on x86 interrupt vector allocator and
      could lead to fragmentation of the interrupt vectors space.
      
      This patch overcomes both drawbacks in presense of IRQ remapping
      and lets devices take advantage of multiple queues and per-IRQ
      affinity assignments.
      Signed-off-by: NAlexander Gordeev <agordeev@redhat.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Matthew Wilcox <willy@linux.intel.com>
      Cc: Jeff Garzik <jgarzik@pobox.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Link: http://lkml.kernel.org/r/c8bd86ff56b5fc118257436768aaa04489ac0a4c.1353324359.git.agordeev@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      51906e77
  5. 27 11月, 2012 1 次提交
    • S
      x86, apic: Cleanup cfg->domain setup for legacy interrupts · 29c574c0
      Suresh Siddha 提交于
      Issues that need to be handled:
      * Handle PIC interrupts on any CPU irrespective of the apic mode
      * In the apic lowest priority logical flat delivery mode, be prepared to
        handle the interrupt on any CPU irrespective of what the IO-APIC RTE says.
      * Because of above, when the IO-APIC starts handling the legacy PIC interrupt,
        use the same vector that is being used by the PIC while programming the
        corresponding IO-APIC RTE.
      
      Start with all the cpu's in the legacy PIC interrupts cfg->domain.
      
      By the time IO-APIC starts taking over the PIC interrupts, apic driver
      model is finalized. So depend on the assign_irq_vector() to update the
      cfg->domain and retain the same vector that was used by PIC before.
      
      For the logical apic flat mode, cfg->domain is updated (during the first
      call to assign_irq_vector()) to contain all the possible online cpu's (0xff).
      Vector used for the legacy PIC interrupt doesn't change when the IO-APIC
      starts handling the interrupt. Any interrupt migration after that
      doesn't change the cfg->domain or the vector used.
      
      For other apic modes like physical mode, cfg->domain is updated
      (during the first call to assign_irq_vector()) to the boot cpu (cpu-0),
      with the same vector that is being used by the PIC. When that interrupt is
      migrated to a different cpu, cfg->domin and the vector assigned will change
      accordingly.
      Tested-by: NBorislav Petkov <bp@alien8.de>
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Link: http://lkml.kernel.org/r/1353970176.21070.51.camel@sbsiddha-desk.sc.intel.comSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      29c574c0
  6. 15 11月, 2012 1 次提交
  7. 03 11月, 2012 1 次提交
  8. 24 10月, 2012 1 次提交
    • D
      x86/irq/ioapic: Check for valid irq_cfg pointer in smp_irq_move_cleanup_interrupt · 94777fc5
      Dimitri Sivanich 提交于
      Posting this patch to fix an issue concerning sparse irq's that
      I raised a while back.  There was discussion about adding
      refcounting to sparse irqs (to fix other potential race
      conditions), but that does not appear to have been addressed
      yet.  This covers the only issue of this type that I've
      encountered in this area.
      
      A NULL pointer dereference can occur in
      smp_irq_move_cleanup_interrupt() if we haven't yet setup the
      irq_cfg pointer in the irq_desc.irq_data.chip_data.
      
      In create_irq_nr() there is a window where we have set
      vector_irq in __assign_irq_vector(), but not yet called
      irq_set_chip_data() to set the irq_cfg pointer.
      
      Should an IRQ_MOVE_CLEANUP_VECTOR hit the cpu in question during
      this time, smp_irq_move_cleanup_interrupt() will attempt to
      process the aforementioned irq, but panic when accessing
      irq_cfg.
      
      Only continue processing the irq if irq_cfg is non-NULL.
      Signed-off-by: NDimitri Sivanich <sivanich@sgi.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: Joerg Roedel <joerg.roedel@amd.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Alexander Gordeev <agordeev@redhat.com>
      Link: http://lkml.kernel.org/r/20121016125021.GA22935@sgi.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      94777fc5
  9. 15 8月, 2012 1 次提交
    • S
      x86, apic: fix broken legacy interrupts in the logical apic mode · f1c63001
      Suresh Siddha 提交于
      Recent commit 332afa65 cleaned up
      a workaround that updates irq_cfg domain for legacy irq's that
      are handled by the IO-APIC. This was assuming that the recent
      changes in assign_irq_vector() were sufficient to remove the workaround.
      
      But this broke couple of AMD platforms. One of them seems to be
      sending interrupts to the offline cpu's, resulting in spurious
      "No irq handler for vector xx (irq -1)" messages when those cpu's come online.
      And the other platform seems to always send the interrupt to the last logical
      CPU (cpu-7). Recent changes had an unintended side effect of using only logical
      cpu-0 in the IO-APIC RTE (during boot for the legacy interrupts) and this
      broke the legacy interrupts not getting routed to the cpu-7 on the AMD
      platform, resulting in a boot hang.
      
      For now, reintroduce the removed workaround, (essentially not allowing the
      vector to change for legacy irq's when io-apic starts to handle the irq. Which
      also addressed the uninteded sife effect of just specifying cpu-0 in the
      IO-APIC RTE for those irq's during boot).
      Reported-and-tested-by: NRobert Richter <robert.richter@amd.com>
      Reported-and-tested-by: NBorislav Petkov <bp@amd64.org>
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Link: http://lkml.kernel.org/r/1344453412.29170.5.camel@sbsiddha-desk.sc.intel.comSigned-off-by: NH. Peter Anvin <hpa@zytor.com>
      f1c63001
  10. 26 7月, 2012 1 次提交
    • T
      x86/ioapic: Fix NULL pointer dereference on CPU hotplug after disabling irqs · 1d44b30f
      Tomoki Sekiyama 提交于
      In the current kernel, percpu variable `vector_irq' is not always
      cleared when a CPU is offlined. If the CPU that has the disabled
      irqs in vector_irq is hotplugged again, __setup_vector_irq()
      hits invalid irq vector and may crash.
      
      This bug can be reproduced as following;
      
       # echo 0 > /sys/devices/system/cpu/cpu7/online
       # modprobe -r some_driver_using_interrupts     # vector_irq@cpu7 uncleared
       # echo 1 > /sys/devices/system/cpu/cpu7/online # kernel may crash
      
      To fix this problem, this patch clears vector_irq in
      __fixup_irqs() when the CPU is offlined.
      
      This also reverts commit f6175f5b, which partially fixes
      this bug by clearing vector in __clear_irq_vector(). But in
      environments with IOMMU IRQ remapper, it could fail because
      cfg->domain doesn't contain offlined CPUs. With this patch, the
      fix in __clear_irq_vector() can be reverted because every
      vector_irq is already cleared in __fixup_irqs() on offlined CPUs.
      Signed-off-by: NTomoki Sekiyama <tomoki.sekiyama.qu@hitachi.com>
      Acked-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: yrl.pp-manager.tt@hitachi.com
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Alexander Gordeev <agordeev@redhat.com>
      Link: http://lkml.kernel.org/r/20120726104732.2889.19144.stgit@kvmdevSigned-off-by: NIngo Molnar <mingo@kernel.org>
      1d44b30f
  11. 06 7月, 2012 2 次提交
  12. 15 6月, 2012 1 次提交
  13. 14 6月, 2012 1 次提交
  14. 08 6月, 2012 3 次提交
  15. 06 6月, 2012 4 次提交
  16. 25 5月, 2012 1 次提交
  17. 18 5月, 2012 1 次提交
    • P
      MCA: delete all remaining traces of microchannel bus support. · bb8187d3
      Paul Gortmaker 提交于
      Hardware with MCA bus is limited to 386 and 486 class machines
      that are now 20+ years old and typically with less than 32MB
      of memory.  A quick search on the internet, and you see that
      even the MCA hobbyist/enthusiast community has lost interest
      in the early 2000 era and never really even moved ahead from
      the 2.4 kernels to the 2.6 series.
      
      This deletes anything remaining related to CONFIG_MCA from core
      kernel code and from the x86 architecture.  There is no point in
      carrying this any further into the future.
      
      One complication to watch for is inadvertently scooping up
      stuff relating to machine check, since there is overlap in
      the TLA name space (e.g. arch/x86/boot/mca.c).
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: James Bottomley <JBottomley@Parallels.com>
      Cc: x86@kernel.org
      Acked-by: NIngo Molnar <mingo@elte.hu>
      Acked-by: NH. Peter Anvin <hpa@zytor.com>
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      bb8187d3
  18. 08 5月, 2012 1 次提交
  19. 07 5月, 2012 3 次提交