1. 19 6月, 2017 1 次提交
  2. 07 6月, 2017 1 次提交
  3. 12 4月, 2017 1 次提交
    • J
      ASoC: Intel: Skylake: Add support for deferred DSP module bind · b8c722dd
      Jeeja KP 提交于
      Module at the end of DSP pipeline that needs to be connected to a module
      in another pipeline are represented as a PGA(leaf node) and in PGA event
      handler these modules are bound/unbounded. Modules other than PGA leaf
      can be connected directly or via switch to a module in another pipeline.
      Example: reference path.
      
      To support the deferred DSP module bind, following changes are done:
      o When the path is enabled, the destination module that needs to be
      bound may not be initialized. If the module is not initialized, add
      these modules in a deferred bind list.
      o When the destination module is initialized, check for these modules
      in deferred bind list. If found, bind them.
      o When the destination module is deleted, Unbind the modules.
      o When the source module is deleted, remove the entry from the deferred
      bind list.
      Signed-off-by: NJeeja KP <jeeja.kp@intel.com>
      Acked-by: NVinod Koul <vinod.koul@intel.com>
      Signed-off-by: NMark Brown <broonie@kernel.org>
      b8c722dd
  4. 29 3月, 2017 2 次提交
  5. 07 1月, 2017 1 次提交
  6. 15 12月, 2016 2 次提交
  7. 25 11月, 2016 1 次提交
  8. 04 11月, 2016 3 次提交
  9. 25 9月, 2016 2 次提交
  10. 02 9月, 2016 1 次提交
  11. 08 8月, 2016 1 次提交
  12. 08 7月, 2016 1 次提交
  13. 07 6月, 2016 2 次提交
  14. 22 4月, 2016 1 次提交
  15. 28 3月, 2016 1 次提交
  16. 09 2月, 2016 2 次提交
  17. 09 12月, 2015 4 次提交
  18. 02 12月, 2015 3 次提交
  19. 16 11月, 2015 5 次提交
  20. 24 10月, 2015 2 次提交
  21. 07 10月, 2015 3 次提交