1. 07 8月, 2008 3 次提交
  2. 27 7月, 2008 1 次提交
  3. 13 7月, 2008 2 次提交
  4. 10 7月, 2008 2 次提交
  5. 08 5月, 2008 1 次提交
  6. 30 4月, 2008 1 次提交
  7. 19 4月, 2008 3 次提交
  8. 28 1月, 2008 1 次提交
    • R
      [NET] smc91x: Make smc91x use IRQ resource trigger flags · e7b3dc7e
      Russell King 提交于
      smc91x is shared between many different platforms.  Each platform needs
      to specify the interrupt type, and in some cases the irq type depends
      on more than just the build configuration - it depends on runtime
      checks.
      
      Rather than throwing this code into the SMC_IRQ_FLAGS definition, provide
      a way for these flags to be passed via the IRQ resource itself.
      
      Note that IRQF_TRIGGER_* constants are intentionally defined to correspond
      with the IORESOURCE_IRQ_* interrupt type flags, in much the same way that
      the low bits of PCI iomem resources correspond with the BAR flag bits.
      
      Also provide a way to configure smc91x to read the IRQ flags from the
      resource.  Once all platforms have been converted over (signified
      by all definitions of SMC_IRQ_FLAGS being -1) SMC_IRQ_FLAGS should
      be removed.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Acked-by: NNicolas Pitre <nico@cam.org>
      Acked-by: NJeff Garzik <jgarzik@redhat.com>
      e7b3dc7e
  9. 26 1月, 2008 3 次提交
  10. 25 1月, 2008 1 次提交
  11. 16 10月, 2007 1 次提交
  12. 12 7月, 2007 2 次提交
  13. 22 4月, 2007 1 次提交
    • E
      [ARM] 4304/1: removes the unnecessary bit number from CKENnn_XXXX · 7053acbd
      Eric Miao 提交于
      This patch removes the unnecessary bit number from CKENnn_XXXX
      definitions for PXA, so that
      
      	CKEN0_PWM0 --> CKEN_PWM0
      	CKEN1_PWM1 --> CKEN_PWM1
      	...
      	CKEN24_CAMERA --> CKEN_CAMERA
      
      The reasons for the change of these defitions are:
      
      1. they do not scale - they are currently valid for pxa2xx, but
      definitely not valid for pxa3xx, e.g., pxa3xx has bit 3 for camera
      instead of bit 24
      
      2. they are unnecessary - the peripheral name within the definition
      has already announced its usage, we don't need those bit numbers
      to know which peripheral we are going to enable/disable clock for
      
      3. they are inconvenient - think about this: a driver programmer
      for pxa has to remember which bit in the CKEN register to turn
      on/off
      
      Another change in the patch is to make the definitions equal to its
      clock bit index, so that
      
         #define CKEN_CAMERA  (24)
      
      instead of
      
         #define CKEN_CAMERA  (1 << 24)
      
      this change, however, will add a run-time bit shift operation in
      pxa_set_cken(), but the benefit of this change is that it scales
      when bit index exceeds 32, e.g., pxa3xx has two registers CKENA
      and CKENB, totally 64 bit for this, suppose CAMERA clock enabling
      bit is CKENB:10, one can simply define CKEN_CAMERA to be (32 + 10)
      and so that pxa_set_cken() need minimum change to adapt to that.
      Signed-off-by: Neric miao <eric.y.miao@gmail.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      7053acbd
  14. 30 11月, 2006 1 次提交
  15. 15 10月, 2006 1 次提交
  16. 09 10月, 2006 1 次提交
    • D
      IRQ: Use the new typedef for interrupt handler function pointers · 40220c1a
      David Howells 提交于
      Use the new typedef for interrupt handler function pointers rather than
      actually spelling out the full thing each time.  This was scripted with the
      following small shell script:
      
      #!/bin/sh
      egrep -nHrl -e 'irqreturn_t[ 	]*[(][*]' $* |
      while read i
      do
          echo $i
          perl -pi -e 's/irqreturn_t\s*[(]\s*[*]\s*([_a-zA-Z0-9]*)\s*[)]\s*[(]\s*int\s*,\s*void\s*[*]\s*[)]/irq_handler_t \1/g' $i || exit $?
      done
      Signed-Off-By: NDavid Howells <dhowells@redhat.com>
      40220c1a
  17. 07 10月, 2006 1 次提交
  18. 02 10月, 2006 1 次提交
  19. 02 8月, 2006 1 次提交
  20. 03 7月, 2006 1 次提交
  21. 18 6月, 2006 1 次提交
  22. 14 1月, 2006 1 次提交
  23. 05 11月, 2005 1 次提交
  24. 02 11月, 2005 1 次提交
  25. 30 10月, 2005 1 次提交
  26. 28 10月, 2005 2 次提交
  27. 15 9月, 2005 1 次提交
  28. 05 9月, 2005 1 次提交
  29. 04 7月, 2005 2 次提交