1. 11 5月, 2009 2 次提交
    • D
      intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing. · 1f0ef2aa
      David Woodhouse 提交于
      As we just did for context cache flushing, clean up the logic around
      whether we need to flush the iotlb or just the write-buffer, depending
      on caching mode.
      
      Fix the same bug in qi_flush_iotlb() that qi_flush_context() had -- it
      isn't supposed to be returning an error; it's supposed to be returning a
      flag which triggers a write-buffer flush.
      
      Remove some superfluous conditional write-buffer flushes which could
      never have happened because they weren't for non-present-to-present
      mapping changes anyway.
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      1f0ef2aa
    • D
      intel-iommu: Clean up handling of "caching mode" vs. context flushing. · 4c25a2c1
      David Woodhouse 提交于
      It really doesn't make a lot of sense to have some of the logic to
      handle caching vs. non-caching mode duplicated in qi_flush_context() and
      __iommu_flush_context(), while the return value indicates whether the
      caller should take other action which depends on the same thing.
      
      Especially since qi_flush_context() thought it was returning something
      entirely different anyway.
      
      This patch makes qi_flush_context() and __iommu_flush_context() both
      return void, removes the 'non_present_entry_flush' argument and makes
      the only call site which _set_ that argument to 1 do the right thing.
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      4c25a2c1
  2. 10 5月, 2009 1 次提交
  3. 01 5月, 2009 1 次提交
  4. 29 4月, 2009 1 次提交
    • F
      Intel IOMMU Pass Through Support · 4ed0d3e6
      Fenghua Yu 提交于
      The patch adds kernel parameter intel_iommu=pt to set up pass through
      mode in context mapping entry. This disables DMAR in linux kernel; but
      KVM still runs on VT-d and interrupt remapping still works.
      
      In this mode, kernel uses swiotlb for DMA API functions but other VT-d
      functionalities are enabled for KVM. KVM always uses multi level
      translation page table in VT-d. By default, pass though mode is disabled
      in kernel.
      
      This is useful when people don't want to enable VT-d DMAR in kernel but
      still want to use KVM and interrupt remapping for reasons like DMAR
      performance concern or debug purpose.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Acked-by: NWeidong Han <weidong@intel.com>
      Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
      4ed0d3e6
  5. 22 4月, 2009 35 次提交
新手
引导
客服 返回
顶部