1. 28 9月, 2016 2 次提交
    • M
      sparc64 mm: Fix more TSB sizing issues · 1e953d84
      Mike Kravetz 提交于
      Commit af1b1a9b ("sparc64 mm: Fix base TSB sizing when hugetlb
      pages are used") addressed the difference between hugetlb and THP
      pages when computing TSB sizes.  The following additional issues
      were also discovered while working with the code.
      
      In order to save memory, THP makes use of a huge zero page.  This huge
      zero page does not count against a task's RSS, but it does consume TSB
      entries.  This is similar to hugetlb pages.  Therefore, count huge
      zero page entries in hugetlb_pte_count.
      
      Accounting of THP pages is done in the routine set_pmd_at().
      Unfortunately, this does not catch the case where a THP page is split.
      To handle this case, decrement the count in pmdp_invalidate().
      pmdp_invalidate is only called when splitting a THP.  However, 'sanity
      checks' are added in case it is ever called for other purposes.
      
      A more general issue exists with HPAGE_SIZE accounting.
      hugetlb_pte_count tracks the number of HPAGE_SIZE (8M) pages.  This
      value is used to size the TSB for HPAGE_SIZE pages.  However,
      each HPAGE_SIZE page consists of two REAL_HPAGE_SIZE (4M) pages.
      The TSB contains an entry for each REAL_HPAGE_SIZE page.  Therefore,
      the number of REAL_HPAGE_SIZE pages should be used to size the huge
      page TSB.  A new compile time constant REAL_HPAGE_PER_HPAGE is used
      to multiply hugetlb_pte_count before sizing the TSB.
      
      Changes from V1
      - Fixed build issue if hugetlb or THP not configured
      Signed-off-by: NMike Kravetz <mike.kravetz@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1e953d84
    • P
      sparc64: fix section mismatch in find_numa_latencies_for_group · bdf2f59e
      Paul Gortmaker 提交于
      To fix:
      
        WARNING: vmlinux.o(.text.unlikely+0x580): Section mismatch in
        reference from the function find_numa_latencies_for_group() to the
        function .init.text:find_mlgroup()
      
        The function find_numa_latencies_for_group() references the
        function __init find_mlgroup().  This is often because
        find_numa_latencies_for_group lacks a __init annotation or the
        annotation of find_mlgroup is wrong.
      
      It turns out find_numa_latencies_for_group is only called from:
          static int __init numa_parse_mdesc(void)
      and hence we can tag find_numa_latencies_for_group with __init.
      
      In doing so we see that find_best_numa_node_for_mlgroup is only
      called from within __init and hence can also be marked with __init.
      
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Nitin Gupta <nitin.m.gupta@oracle.com>
      Cc: Chris Hyser <chris.hyser@oracle.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@oracle.com>
      Cc: sparclinux@vger.kernel.org
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bdf2f59e
  2. 25 9月, 2016 2 次提交
  3. 24 9月, 2016 1 次提交
    • P
      MIPS: Fix pre-r6 emulation FPU initialisation · 7e956304
      Paul Burton 提交于
      In the mipsr2_decoder() function, used to emulate pre-MIPSr6
      instructions that were removed in MIPSr6, the init_fpu() function is
      called if a removed pre-MIPSr6 floating point instruction is the first
      floating point instruction used by the task. However, init_fpu()
      performs varous actions that rely upon not being migrated. For example
      in the most basic case it sets the coprocessor 0 Status.CU1 bit to
      enable the FPU & then loads FP register context into the FPU registers.
      If the task were to migrate during this time, it may end up attempting
      to load FP register context on a different CPU where it hasn't set the
      CU1 bit, leading to errors such as:
      
          do_cpu invoked from kernel context![#2]:
          CPU: 2 PID: 7338 Comm: fp-prctl Tainted: G      D         4.7.0-00424-g49b0c82 #2
          task: 838e4000 ti: 88d38000 task.ti: 88d38000
          $ 0   : 00000000 00000001 ffffffff 88d3fef8
          $ 4   : 838e4000 88d38004 00000000 00000001
          $ 8   : 3400fc01 801f8020 808e9100 24000000
          $12   : dbffffff 807b69d8 807b0000 00000000
          $16   : 00000000 80786150 00400fc4 809c0398
          $20   : 809c0338 0040273c 88d3ff28 808e9d30
          $24   : 808e9d30 00400fb4
          $28   : 88d38000 88d3fe88 00000000 8011a2ac
          Hi    : 0040273c
          Lo    : 88d3ff28
          epc   : 80114178 _restore_fp+0x10/0xa0
          ra    : 8011a2ac mipsr2_decoder+0xd5c/0x1660
          Status: 1400fc03	KERNEL EXL IE
          Cause : 1080002c (ExcCode 0b)
          PrId  : 0001a920 (MIPS I6400)
          Modules linked in:
          Process fp-prctl (pid: 7338, threadinfo=88d38000, task=838e4000, tls=766527d0)
          Stack : 00000000 00000000 00000000 88d3fe98 00000000 00000000 809c0398 809c0338
          	  808e9100 00000000 88d3ff28 00400fc4 00400fc4 0040273c 7fb69e18 004a0000
          	  004a0000 004a0000 7664add0 8010de18 00000000 00000000 88d3fef8 88d3ff28
          	  808e9100 00000000 766527d0 8010e534 000c0000 85755000 8181d580 00000000
          	  00000000 00000000 004a0000 00000000 766527d0 7fb69e18 004a0000 80105c20
          	  ...
          Call Trace:
          [<80114178>] _restore_fp+0x10/0xa0
          [<8011a2ac>] mipsr2_decoder+0xd5c/0x1660
          [<8010de18>] do_ri+0x90/0x6b8
          [<80105c20>] ret_from_exception+0x0/0x10
      
      Fix this by disabling preemption around the call to init_fpu(), ensuring
      that it starts & completes on one CPU.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Fixes: b0a668fb ("MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6")
      Cc: linux-mips@linux-mips.org
      Cc: stable@vger.kernel.org # v4.0+
      Patchwork: https://patchwork.linux-mips.org/patch/14305/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      7e956304
  4. 23 9月, 2016 2 次提交
    • A
      arm64: kgdb: handle read-only text / modules · 67787b68
      AKASHI Takahiro 提交于
      Handle read-only cases when CONFIG_DEBUG_RODATA (4.0) or
      CONFIG_DEBUG_SET_MODULE_RONX (3.18) are enabled by using
      aarch64_insn_write() instead of probe_kernel_write() as introduced by
      commit 2f896d58 ("arm64: use fixmap for text patching") in 4.0.
      
      Fixes: 11d91a77 ("arm64: Add CONFIG_DEBUG_SET_MODULE_RONX support")
      Signed-off-by: NAKASHI Takahiro <takahiro.akashi@linaro.org>
      Reviewed-by: NMark Rutland <mark.rutland@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Jason Wessel <jason.wessel@windriver.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      67787b68
    • D
      arm64: Call numa_store_cpu_info() earlier. · c18df0ad
      David Daney 提交于
      The wq_numa_init() function makes a private CPU to node map by calling
      cpu_to_node() early in the boot process, before the non-boot CPUs are
      brought online.  Since the default implementation of cpu_to_node()
      returns zero for CPUs that have never been brought online, the
      workqueue system's view is that *all* CPUs are on node zero.
      
      When the unbound workqueue for a non-zero node is created, the
      tsk_cpus_allowed() for the worker threads is the empty set because
      there are, in the view of the workqueue system, no CPUs on non-zero
      nodes.  The code in try_to_wake_up() using this empty cpumask ends up
      using the cpumask empty set value of NR_CPUS as an index into the
      per-CPU area pointer array, and gets garbage as it is one past the end
      of the array.  This results in:
      
      [    0.881970] Unable to handle kernel paging request at virtual address fffffb1008b926a4
      [    1.970095] pgd = fffffc00094b0000
      [    1.973530] [fffffb1008b926a4] *pgd=0000000000000000, *pud=0000000000000000, *pmd=0000000000000000
      [    1.982610] Internal error: Oops: 96000004 [#1] SMP
      [    1.987541] Modules linked in:
      [    1.990631] CPU: 48 PID: 295 Comm: cpuhp/48 Tainted: G        W       4.8.0-rc6-preempt-vol+ #9
      [    1.999435] Hardware name: Cavium ThunderX CN88XX board (DT)
      [    2.005159] task: fffffe0fe89cc300 task.stack: fffffe0fe8b8c000
      [    2.011158] PC is at try_to_wake_up+0x194/0x34c
      [    2.015737] LR is at try_to_wake_up+0x150/0x34c
      [    2.020318] pc : [<fffffc00080e7468>] lr : [<fffffc00080e7424>] pstate: 600000c5
      [    2.027803] sp : fffffe0fe8b8fb10
      [    2.031149] x29: fffffe0fe8b8fb10 x28: 0000000000000000
      [    2.036522] x27: fffffc0008c63bc8 x26: 0000000000001000
      [    2.041896] x25: fffffc0008c63c80 x24: fffffc0008bfb200
      [    2.047270] x23: 00000000000000c0 x22: 0000000000000004
      [    2.052642] x21: fffffe0fe89d25bc x20: 0000000000001000
      [    2.058014] x19: fffffe0fe89d1d00 x18: 0000000000000000
      [    2.063386] x17: 0000000000000000 x16: 0000000000000000
      [    2.068760] x15: 0000000000000018 x14: 0000000000000000
      [    2.074133] x13: 0000000000000000 x12: 0000000000000000
      [    2.079505] x11: 0000000000000000 x10: 0000000000000000
      [    2.084879] x9 : 0000000000000000 x8 : 0000000000000000
      [    2.090251] x7 : 0000000000000040 x6 : 0000000000000000
      [    2.095621] x5 : ffffffffffffffff x4 : 0000000000000000
      [    2.100991] x3 : 0000000000000000 x2 : 0000000000000000
      [    2.106364] x1 : fffffc0008be4c24 x0 : ffffff0ffffada80
      [    2.111737]
      [    2.113236] Process cpuhp/48 (pid: 295, stack limit = 0xfffffe0fe8b8c020)
      [    2.120102] Stack: (0xfffffe0fe8b8fb10 to 0xfffffe0fe8b90000)
      [    2.125914] fb00:                                   fffffe0fe8b8fb80 fffffc00080e7648
      .
      .
      .
      [    2.442859] Call trace:
      [    2.445327] Exception stack(0xfffffe0fe8b8f940 to 0xfffffe0fe8b8fa70)
      [    2.451843] f940: fffffe0fe89d1d00 0000040000000000 fffffe0fe8b8fb10 fffffc00080e7468
      [    2.459767] f960: fffffe0fe8b8f980 fffffc00080e4958 ffffff0ff91ab200 fffffc00080e4b64
      [    2.467690] f980: fffffe0fe8b8f9d0 fffffc00080e515c fffffe0fe8b8fa80 0000000000000000
      [    2.475614] f9a0: fffffe0fe8b8f9d0 fffffc00080e58e4 fffffe0fe8b8fa80 0000000000000000
      [    2.483540] f9c0: fffffe0fe8d10000 0000000000000040 fffffe0fe8b8fa50 fffffc00080e5ac4
      [    2.491465] f9e0: ffffff0ffffada80 fffffc0008be4c24 0000000000000000 0000000000000000
      [    2.499387] fa00: 0000000000000000 ffffffffffffffff 0000000000000000 0000000000000040
      [    2.507309] fa20: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
      [    2.515233] fa40: 0000000000000000 0000000000000000 0000000000000000 0000000000000018
      [    2.523156] fa60: 0000000000000000 0000000000000000
      [    2.528089] [<fffffc00080e7468>] try_to_wake_up+0x194/0x34c
      [    2.533723] [<fffffc00080e7648>] wake_up_process+0x28/0x34
      [    2.539275] [<fffffc00080d3764>] create_worker+0x110/0x19c
      [    2.544824] [<fffffc00080d69dc>] alloc_unbound_pwq+0x3cc/0x4b0
      [    2.550724] [<fffffc00080d6bcc>] wq_update_unbound_numa+0x10c/0x1e4
      [    2.557066] [<fffffc00080d7d78>] workqueue_online_cpu+0x220/0x28c
      [    2.563234] [<fffffc00080bd288>] cpuhp_invoke_callback+0x6c/0x168
      [    2.569398] [<fffffc00080bdf74>] cpuhp_up_callbacks+0x44/0xe4
      [    2.575210] [<fffffc00080be194>] cpuhp_thread_fun+0x13c/0x148
      [    2.581027] [<fffffc00080dfbac>] smpboot_thread_fn+0x19c/0x1a8
      [    2.586929] [<fffffc00080dbd64>] kthread+0xdc/0xf0
      [    2.591776] [<fffffc0008083380>] ret_from_fork+0x10/0x50
      [    2.597147] Code: b00057e1 91304021 91005021 b8626822 (b8606821)
      [    2.603464] ---[ end trace 58c0cd36b88802bc ]---
      [    2.608138] Kernel panic - not syncing: Fatal exception
      
      Fix by moving call to numa_store_cpu_info() for all CPUs into
      smp_prepare_cpus(), which happens before wq_numa_init().  Since
      smp_store_cpu_info() now contains only a single function call,
      simplify by removing the function and out-lining its contents.
      Suggested-by: NRobert Richter <rric@kernel.org>
      Fixes: 1a2db300 ("arm64, numa: Add NUMA support for arm64 platforms.")
      Cc: <stable@vger.kernel.org> # 4.7.x-
      Signed-off-by: NDavid Daney <david.daney@cavium.com>
      Reviewed-by: NRobert Richter <rrichter@cavium.com>
      Tested-by: NYisheng Xie <xieyisheng1@huawei.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      c18df0ad
  5. 22 9月, 2016 2 次提交
  6. 21 9月, 2016 2 次提交
    • J
      MIPS: vDSO: Fix Malta EVA mapping to vDSO page structs · 554af0c3
      James Hogan 提交于
      The page structures associated with the vDSO pages in the kernel image
      are calculated using virt_to_page(), which uses __pa() under the hood to
      find the pfn associated with the virtual address. The vDSO data pointers
      however point to kernel symbols, so __pa_symbol() should really be used
      instead.
      
      Since there is no equivalent to virt_to_page() which uses __pa_symbol(),
      fix init_vdso_image() to work directly with pfns, calculated with
      __phys_to_pfn(__pa_symbol(...)).
      
      This issue broke the Malta Enhanced Virtual Addressing (EVA)
      configuration which has a non-default implementation of __pa_symbol().
      This is because it uses a physical alias so that the kernel executes
      from KSeg0 (VA 0x80000000 -> PA 0x00000000), while RAM is provided to
      the kernel in the KUSeg range (VA 0x00000000 -> PA 0x80000000) which
      uses the same underlying RAM.
      
      Since there are no page structures associated with the low physical
      address region, some arbitrary kernel memory would be interpreted as a
      page structure for the vDSO pages and badness ensues.
      
      Fixes: ebb5e78c ("MIPS: Initial implementation of a VDSO")
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: <stable@vger.kernel.org> # 4.4.x-
      Patchwork: https://patchwork.linux-mips.org/patch/14229/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      554af0c3
    • R
      powerpc/powernv/pci: Fix m64 checks for SR-IOV and window alignment · b79331a5
      Russell Currey 提交于
      Commit 5958d19a checks for prefetchable m64 BARs by comparing the
      addresses instead of using resource flags.  This broke SR-IOV as the m64
      check in pnv_pci_ioda_fixup_iov_resources() fails.
      
      The condition in pnv_pci_window_alignment() also changed to checking
      only IORESOURCE_MEM_64 instead of both IORESOURCE_MEM_64 and
      IORESOURCE_PREFETCH.
      
      Revert these cases to the previous behaviour, adding a new helper function
      to do so.  This is named pnv_pci_is_m64_flags() to make it clear this
      function is only looking at resource flags and should not be relied on for
      non-SRIOV resources.
      
      Fixes: 5958d19a ("Fix incorrect PE reservation attempt on some 64-bit BARs")
      Reported-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NRussell Currey <ruscur@russell.cc>
      Tested-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      b79331a5
  7. 20 9月, 2016 4 次提交
    • S
      perf/x86/intel/bts: Make sure debug store is valid · f1e1c9e5
      Sebastian Andrzej Siewior 提交于
      Since commit 4d4c4741 ("perf/x86/intel/bts: Fix BTS PMI detection")
      my box goes boom on boot:
      
      | .... node  #0, CPUs:      #1 #2 #3 #4 #5 #6 #7
      | BUG: unable to handle kernel NULL pointer dereference at 0000000000000018
      | IP: [<ffffffff8100c463>] intel_bts_interrupt+0x43/0x130
      | Call Trace:
      |  <NMI> d [<ffffffff8100b341>] intel_pmu_handle_irq+0x51/0x4b0
      |  [<ffffffff81004d47>] perf_event_nmi_handler+0x27/0x40
      
      This happens because the code introduced in this commit dereferences the
      debug store pointer unconditionally. The debug store is not guaranteed to
      be available, so a NULL pointer check as on other places is required.
      
      Fixes: 4d4c4741 ("perf/x86/intel/bts: Fix BTS PMI detection")
      Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
      Reviewed-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: vince@deater.net
      Cc: eranian@google.com
      Link: http://lkml.kernel.org/r/20160920131220.xg5pbdjtznszuyzb@breakpoint.ccSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      f1e1c9e5
    • M
      x86/efi: Only map RAM into EFI page tables if in mixed-mode · 12976670
      Matt Fleming 提交于
      Waiman reported that booting with CONFIG_EFI_MIXED enabled on his
      multi-terabyte HP machine results in boot crashes, because the EFI
      region mapping functions loop forever while trying to map those
      regions describing RAM.
      
      While this patch doesn't fix the underlying hang, there's really no
      reason to map EFI_CONVENTIONAL_MEMORY regions into the EFI page tables
      when mixed-mode is not in use at runtime.
      Reported-by: NWaiman Long <waiman.long@hpe.com>
      Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      CC: Theodore Ts'o <tytso@mit.edu>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Scott J Norton <scott.norton@hpe.com>
      Cc: Douglas Hatch <doug.hatch@hpe.com>
      Cc: <stable@vger.kernel.org> # v4.6+
      Signed-off-by: NMatt Fleming <matt@codeblueprint.co.uk>
      12976670
    • M
      x86/mm/pat: Prevent hang during boot when mapping pages · e535ec08
      Matt Fleming 提交于
      There's a mixture of signed 32-bit and unsigned 32-bit and 64-bit data
      types used for keeping track of how many pages have been mapped.
      
      This leads to hangs during boot when mapping large numbers of pages
      (multiple terabytes, as reported by Waiman) because those values are
      interpreted as being negative.
      
      commit 74256377 ("x86/mm/pat: Avoid truncation when converting
      cpa->numpages to address") fixed one of those bugs, but there is
      another lurking in __change_page_attr_set_clr().
      
      Additionally, the return value type for the populate_*() functions can
      return negative values when a large number of pages have been mapped,
      triggering the error paths even though no error occurred.
      
      Consistently use 64-bit types on 64-bit platforms when counting pages.
      Even in the signed case this gives us room for regions 8PiB
      (pebibytes) in size whilst still allowing the usual negative value
      error checking idiom.
      Reported-by: NWaiman Long <waiman.long@hpe.com>
      Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      CC: Theodore Ts'o <tytso@mit.edu>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Scott J Norton <scott.norton@hpe.com>
      Cc: Douglas Hatch <doug.hatch@hpe.com>
      Signed-off-by: NMatt Fleming <matt@codeblueprint.co.uk>
      e535ec08
    • M
      MIPS: Select HAVE_REGS_AND_STACK_ACCESS_API · 08bccf43
      Marcin Nowakowski 提交于
      Add lost Kconfig symbol.  This should have been part of 40e084a5
      ('MIPS: Add uprobes support.').
      
      Fixes: 40e084a5 ('MIPS: Add uprobes support.')
      Signed-off-by: NMarcin Nowakowski <marcin.nowakowski@imgtec.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      08bccf43
  8. 19 9月, 2016 3 次提交
    • A
      MIPS: Octeon: Fix platform bus probing · 8074d782
      Aaro Koskinen 提交于
      Commit 44a7185c ("of/platform: Add common method to populate
      default bus") added new arch_initcall of_platform_default_populate_init()
      that will override device_initcall octeon_publish_devices(). This broke
      many OCTEON boards as important devices are not getting probed anymore
      (e.g. on EdgeRouter Lite the USB mass storage/rootfs is missing).
      
      Fix by changing octeon_publish_devices() to arch_initcall.
      
      Fixes: 44a7185c ("of/platform: Add common method to populate default bus")
      Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
      Acked-by: NRob Herring <robh@kernel.org>
      Cc: David Daney <ddaney@caviumnetworks.com>
      Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/14041/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      8074d782
    • A
      MIPS: Octeon: mangle-port: fix build failure with VDSO code · 3312eca5
      Aaro Koskinen 提交于
      Commit 1685ddbe ("MIPS: Octeon: Changes to support readq()/writeq()
      usage.") added bitwise shift operations that assume that unsigned long
      is always 64-bits. This broke the build of VDSO code, as it gets compiled
      also in "faked" 32-bit mode. Althought the failing inline functions are
      never executed in 32-bit mode, they still need to pass the compilation.
      Fix by using 64-bit types explicitly.
      
      The patch fixes the following build failure:
      
        CC      arch/mips/vdso/gettimeofday-o32.o
      In file included from los/git/devel/linux/arch/mips/include/asm/io.h:32:0,
                       from los/git/devel/linux/arch/mips/include/asm/page.h:194,
                       from los/git/devel/linux/arch/mips/vdso/vdso.h:26,
                       from los/git/devel/linux/arch/mips/vdso/gettimeofday.c:11:
      los/git/devel/linux/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h: In function '__should_swizzle_bits':
      los/git/devel/linux/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h:19:40: error: right shift count >= width of type [-Werror=shift-count-overflow]
        unsigned long did = ((unsigned long)a >> 40) & 0xff;
                                              ^~
      
      Fixes: 1685ddbe ("MIPS: Octeon: Changes to support readq()/writeq() usage.")
      Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
      Acked-by: NDavid Daney <ddaney@caviumnetworks.com>
      Cc: David Daney <david.daney@cavium.com>
      Cc: Steven J. Hill <steven.hill@cavium.com>
      Cc: Alex Smith <alex.smith@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/14039/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      3312eca5
    • M
      MIPS: Avoid a BUG warning during prctl(PR_SET_FP_MODE, ...) · b244614a
      Marcin Nowakowski 提交于
      cpu_has_fpu macro uses smp_processor_id() and is currently executed
      with preemption enabled, that triggers the warning at runtime.
      
      It is assumed throughout the kernel that if any CPU has an FPU, then all
      CPUs would have an FPU as well, so it is safe to perform the check with
      preemption enabled - change the code to use raw_ variant of the check to
      avoid the warning.
      Signed-off-by: NMarcin Nowakowski <marcin.nowakowski@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: stable@vger.kernel.org  # 4.0+
      Patchwork: https://patchwork.linux-mips.org/patch/14125/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b244614a
  9. 18 9月, 2016 2 次提交
  10. 16 9月, 2016 6 次提交
  11. 15 9月, 2016 6 次提交
  12. 14 9月, 2016 8 次提交