The presence of the MIPS Virtualization Application-Specific Extension
is indicated by CP0_Config3[23].  Probe for this and report it in
/proc/cpuinfo.
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4904/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Register platfom devices for the built-in USB
controllers of the SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4952/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Add SoC specific PCI IRQ map, and register platform
devices for the two built-in PCIe RCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4951/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The SoC has a built-in wireless MAC. Register a platform
device for that to make it usable with the ath9k driver.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4956/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The ath79_device_reset_* are causing BUG when
those are used on the QCA955x SoCs. The patch
adds the required code to avoid that.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4948/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The existing code can handle the GPIO controller of
the QCA955x SoCs. Add a minimal glue code to make it
working.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4947/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The IRQ routing in the QCA955x SoCs is slightly
different from the routing implemented in the
already supported SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4955/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The patch adds code to get various clock frequencies
from the PLLs used in the QCA955x SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4945/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Also add 'soc_is_qca955[68x]' helper functions
and a Kconfig symbol for the SoC family.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4943/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The patch allows to see kernel messages on the
QCA955X SoCs in early boot stage.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4944/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Use the ATH79_MISC_IRQ() macro instead.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4930/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Remove the individual ATH79_CPU_IRQ_* constants and
use the new macro instead of those.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4929/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The command register of the PCI controller is
not initialized correctly by the bootloader on
some boards and this leads to non working PCI
bus.

Add code to initialize the command register
from the Linux code to avoid this.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4916/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The pci_load_of_ranges function is only available if
CONFIG_OF is selected. If the function is used without
CONFIG_OF being enabled it will cause a build error.

Add a dummy inline function to avoid this.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4911/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The functions are unused now, so remove them.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4909/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The constants will be used by a subsequent patch.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4907/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Add code to load a irq_domain for the MIPS IRQ controller from a devicetree
file.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Acked-by: NDavid Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4902/

Add support code for rt3050, rt3052, rt3350, rt3352 and rt5350 SOC.

The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4896/

Before we start adding the platform code we add the common include files.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4893/

The current code uses multiple if statements for
demultiplexing the different interrupt sources.
Additionally, the MISC interrupt controller has
32 interrupt sources and the current code does not
handles all of them.

Get rid of the if statements and process all interrupt
sources in a loop to fix these issues.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4874/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

GPIO function selection is not working on the AR934x
SoCs because the offset of the function selection
register is different on those.

Add a helper routine which returns the correct
register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4870/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Add new clocksource that uses the counter present on the MIPS
Global Interrupt Controller.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4681/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Simplify the DSP macros for vanilla (non-microMIPS) kernels and
toolchains that do not support the DSP ASEs.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4687/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Add macros to support the DSP ASE with microMIPS kernels when the
toolchain does not have support.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4686/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Newer toolchains support the DSP and DSP Rev2 instructions. This patch
performs a check for that support and adds compiler and assembler
flags for only the files that need use those instructions.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4752/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4682/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Clean up standard header text and remove unused #define.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4703/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

TLB and COP0 hazards are handled in hardware for Netlogic XLR/XLS
SoCs. Update hazards.h to pick more optimal set of definitions when
compiling for XLR/XLS.
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4788/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC
frequencey. One of these can be used as a clocksource to provide
timestamps that is common across cores. This can be used in place
of the count/compare clocksource which is per-CPU.

On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits
of the PIC counter. On XLP, the whole 64-bit can be used.

Provide common macros and functions for PIC timer registers on XLR/XLS
and XLP, and use them to register a PIC clocksource.
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4786/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Since we now use r4k cache code for Netlogic XLP, it is
better to split L1 icache among the active threads, so that
threads won't step on each other while flushing icache.

The L1 dcache is already split among the threads in the core.
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4787/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Provide functions ack_c0_eirr(), set_c0_eimr(), clear_c0_eimr()
and read_c0_eirr_and_eimr() that do the EIMR and EIRR operations
and update the interrupt handling code to use these functions.
Also, use the EIMR register functions to mask interrupts in the
irq code.

The 64-bit interrupt request and mask registers (EIRR and EIMR) are
accessed when the interrupts are off, and the common operations are
to set or clear a bit in these registers. Using the 64-bit c0 access
functions for these operations is not optimal in 32-bit, because it
will disable/restore interrupts and split/join the 64-bit value during
each register access.
Signed-off-by: NJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4790/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

This code makes the irqs used by the EIU loadable from the DT. Additionally we
add a helper that allows the pinctrl layer to map external irqs to real irq
numbers.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4818/

The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.
Signed-off-by: NJohn Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/

The nvram functions are exported and used by some normal drivers. To
prevent name clashes with ofter parts of the kernel code add a bcm47xx_
prefix in front of the function names and the header file name.
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4744/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

Instead of using our own error codes use some common codes.
Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4739/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The DSP bit mask for the RDDSP and WRDSP instructions was wrong.

[ralf@linux-mips.org: The mask field of the RDDSP and WRDSP instructions
is 10 bits long.  DSP_MASK had all these fields which according to the
architecture specification may result in UNPREDICTABLE operation.]
Signed-off-by: NSteven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/4683/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

With CONFIG_TRANSPARENT_HUGEPAGE=y and CONFIG_HUGETLBFS=y we get the
following build failure:

  CC      mm/huge_memory.o
mm/huge_memory.c: In function 'set_huge_zero_page':
mm/huge_memory.c:780:2: error: implicit declaration of function 'pfn_pmd' [-Werror=implicit-function-declaration]
mm/huge_memory.c:780:8: error: incompatible types when assigning to type 'pmd_t' from type 'int'

Add a definition of pfn_pmd() for 64-bit kernels (the only place huge
pages are currently supported).
Signed-off-by: NDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4813/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It always should have been ...
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>