- 10 1月, 2018 1 次提交
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由 Geert Uytterhoeven 提交于
Since commit f11a0446 ("i2c: gpio: Enable working over slow can_sleep GPIOs"), probing the i2c RTC connected to an i2c-gpio bus on r8a7740/armadillo fails with: rtc-s35390a 0-0030: error resetting chip rtc-s35390a: probe of 0-0030 failed with error -5 More debug code reveals: i2c i2c-0: master_xfer[0] R, addr=0x30, len=1 i2c i2c-0: NAK from device addr 0x30 msg #0 s35390a_get_reg: ret = -6 Commit 02e47980 ("gpio: Alter semantics of *raw* operations to actually be raw") moved open drain/source handling from gpiod_set_raw_value_commit() to gpiod_set_value(), but forgot to take into account that gpiod_set_value_cansleep() also needs this handling. The i2c protocol mandates that i2c signals are open drain, hence i2c communication fails. Fix this by adding the missing handling to gpiod_set_value_cansleep(), using a new common helper gpiod_set_value_nocheck(). Fixes: 02e47980 ("gpio: Alter semantics of *raw* operations to actually be raw") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> [removed underscore syntax, added kerneldoc] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 12月, 2017 1 次提交
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由 Thomas Gleixner 提交于
The 'early' argument of irq_domain_activate_irq() is actually used to denote reservation mode. To avoid confusion, rename it before abuse happens. No functional change. Fixes: 72491643 ("genirq/irqdomain: Update irq_domain_ops.activate() signature") Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Alexandru Chirvasitu <achirvasub@gmail.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Dou Liyang <douly.fnst@cn.fujitsu.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: Mikael Pettersson <mikpelinux@gmail.com> Cc: Josh Poulson <jopoulso@microsoft.com> Cc: Mihai Costache <v-micos@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-pci@vger.kernel.org Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Dexuan Cui <decui@microsoft.com> Cc: Simon Xiao <sixiao@microsoft.com> Cc: Saeed Mahameed <saeedm@mellanox.com> Cc: Jork Loeser <Jork.Loeser@microsoft.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: devel@linuxdriverproject.org Cc: KY Srinivasan <kys@microsoft.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Sakari Ailus <sakari.ailus@intel.com>, Cc: linux-media@vger.kernel.org
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- 29 12月, 2017 1 次提交
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由 Thomas Gleixner 提交于
The recent extension of irq_set_lockdep_class() with a second argument added the new lockdep class to the mrcmstb driver, but used the already existing lockdep class as second argument, which leaves the new lockdep class defined but unused. Use the new lockdep class as that's what the change intended to do. Fixes: 39c3fd58 ("kernel/irq: Extend lockdep class for request mutex") Reported-by: NIngo Molnar <mingo@kernel.org> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: linus.walleij@linaro.org
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- 28 12月, 2017 1 次提交
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由 Andrew Lunn 提交于
The IRQ code already has support for lockdep class for the lock mutex in an interrupt descriptor. Extend this to add a second class for the request mutex in the descriptor. Not having a class is resulting in false positive splats in some code paths. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: linus.walleij@linaro.org Cc: grygorii.strashko@ti.com Cc: f.fainelli@gmail.com Link: https://lkml.kernel.org/r/1512234664-21555-1-git-send-email-andrew@lunn.ch
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- 22 12月, 2017 2 次提交
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由 Christophe Leroy 提交于
Following commit 9427ecbe ("gpio: Rework of_gpiochip_set_names() to use device property accessors"), "gpio-line-names" DT property is not retrieved anymore when chip->parent is not set by the driver. This is due to OF based property reads having been replaced by device based property reads. This patch fixes that by making use of fwnode_property_read_string_array() instead of device_property_read_string_array() and handing over either of_fwnode_handle(chip->of_node) or dev_fwnode(chip->parent) to that function. Fixes: 9427ecbe ("gpio: Rework of_gpiochip_set_names() to use device property accessors") Cc: stable@vger.kernel.org Signed-off-by: NChristophe Leroy <christophe.leroy@c-s.fr> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Grygorii Strashko 提交于
Revert changes introduced by commit f0fbe7bc ("gpio: Move irqdomain into struct gpio_irq_chip") as they are not aplicable to this driver. Reported-by: NRussell King - ARM Linux <linux@armlinux.org.uk> Fixes: f0fbe7bc ("gpio: Move irqdomain into struct gpio_irq_chip") Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 12月, 2017 1 次提交
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由 Sergei Shtylyov 提交于
Despite commit 55020c80 ("of: Add vendor prefix for ON Semiconductor Corp.") was made long ago, the latter commit 9f49f6dd ("gpio: pca953x: add onsemi,pca9654 id") made use of another, undocumented vendor prefix. Since such prefix doesn't seem to be used in any device trees, I think we can just fix the "compatible" string in the driver and the bindings and be done with that... Fixes: 9f49f6dd ("gpio: pca953x: add onsemi,pca9654 id") Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 11月, 2017 2 次提交
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由 Keerthy 提交于
As per the re-design assign the first bank regs for unbanked irq case. This was missed out in the original patch. Signed-off-by: NKeerthy <j-keerthy@ti.com> Fixes: b5cf3fd8 ("gpio: davinci: Redesign driver to accommodate ngpios in one gpio chip") Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
Commit 7ebc194d ("gpio: 74x164: Introduce 'enable-gpios' property") added a new member gpiod_oe to the end of the struct gen_74x164_chip, after the zero-length buffer array. However, this buffer is a flexible array, allocated together with the structure during .probe(). As the buffer is no longer the last member, writing to it corrupts the newly added member after it. During device removal, the corrupted member will be used as a pointer, leading to a crash. This went unnoticed, as the flexible array was declared as "buffer[0]" instead of "buffer[]", and thus did not trigger a "flexible array member not at end of struct" error from gcc. Move the gpiod_oe field up to fix this, and drop the zero from the array size to prevent future similar bugs. Fixes: 7ebc194d ("gpio: 74x164: Introduce 'enable-gpios' property") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 11月, 2017 1 次提交
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由 Axel Lin 提交于
This is no longer required after commit 959bc7b2 ("gpio: Automatically add lockdep keys") Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 11月, 2017 1 次提交
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由 Linus Walleij 提交于
The struct is wrong, this is named lock_class_key. Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 11月, 2017 14 次提交
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由 Thierry Reding 提交于
In order to avoid lockdep boilerplate in individual drivers, turn the gpiochip_add_data() function into a macro that creates a unique class key for each driver. Note that this has the slight disadvantage of adding a key for each driver registered with the system. However, these keys are 8 bytes in size, which is negligible and a small price to pay for generic infrastructure. Suggested-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> [renane __gpiochip_add_data() to gpiochip_add_data_with_key] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
Some GPIO chips cannot support sparse IRQ numbering and therefore need to manually allocate their interrupt descriptors statically. For these cases, a driver can pass the first allocated IRQ via the struct gpio_irq_chip's "first" field and thereby cause the IRQ domain to map all IRQs during initialization. Suggested-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
The nested field in struct gpio_irq_chip currently has two meanings. On one hand it marks an IRQ chip as being nested (as opposed to chained), while on the other hand it also means that an IRQ chip uses nested thread handlers. However, nested IRQ chips can already be identified by the fact that they don't pass a parent handler (the driver would instead already have installed a nested handler using request_irq()). Therefore, the only use for the nested attribute is to inform gpiolib that an IRQ chip uses nested thread handlers (as opposed to regular, non-threaded handlers). To clarify its purpose, rename the field to "threaded". Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
Tegra186 has two GPIO controllers that are largely register compatible between one another but are completely different from the controller found on earlier generations. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
Export these functions so that drivers can explicitly use these when setting up their IRQ domain. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
Currently GPIO drivers are required to add the GPIO chip and its corresponding IRQ chip separately, which can result in a lot of boilerplate. Use the newly introduced struct gpio_irq_chip, embedded in struct gpio_chip, that drivers can fill in if they want the GPIO core to automatically register the IRQ chip associated with a GPIO chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 11月, 2017 1 次提交
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由 Greg Kroah-Hartman 提交于
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 31 10月, 2017 10 次提交
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由 Ard Biesheuvel 提交于
Commit fd9c963c ("gpio: mb86s70: Return error if requesting an already assigned gpio") adds code that infers from the state of the GPIO Pin Function Register (PFR) whether a GPIO has been assigned already. This assumes that the pin functions are set to 'peripheral' when the driver is loaded, which is not guaranteed. Also, the GPIO layer is perfectly capable of keeping track of which GPIOs have been assigned already, so we shouldn't need this check in the first place. This reverts commit fd9c963c. Cc: Axel Lin <axel.lin@ingics.com> Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Ard Biesheuvel 提交于
In order to reuse this driver for the Socionext Synquacer SC2A11 SoC, which inherited this IP from Fujitsu, remove the ARCH_MB86S7X Kconfig dependency, and revert the changes that prevent it from being built as a module. This reverts commits d65aa4b6 and d5610e51. Cc: Geliang Tang <geliangtang@gmail.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> [Folded in module_platform_driver() fixup] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Berger 提交于
This commit corrects problems with the previous wake implementation by implementing suspend and resume power management operations and the driver shutdown operation. Wake masks are used to keep track of which GPIO should wake the device. On suspend the GPIO state is saved and the possible wakeup sources are explicitly unmasked in the hardware. Non-wakeup sources are explicitly masked so IRQCHIP_MASK_ON_SUSPEND is no longer necessary. The saved state of the GPIO is restored upon resume. It is important not to write to the GPIO status register since this has the effect of clearing bits. The status register is explicitly removed from the register save and restore to ensure this. The shutdown operation allows the hardware to be put into the same quiesced state as the suspend operation and removes the need for the reboot notifier. Unfortunately, there appears to be some confusion about whether a pending disabled wake interrupt should wake the system. If a wake capable interrupt is disabled using the default "lazy disable" behavior and it is triggered before the suspend_device_irq call the interrupt hardware will be acknowledged by mask_ack_irq and the IRQS_PENDING flag is added to its state. However, the IRQS_PENDING flag of wake interrupts is not checked to prevent the transition to suspend and the hardware has been acked which prevents its wakeup. If the lazy disabled interrupt is triggered after the call to suspend_device_irqs then the wakeup logic will abort the suspend. The irq_disable method is defined by this GPIO driver to prevent lazy disable so that the pending hardware state remains asserted allowing the hardware to wake and providing a consistent behavior. In addition, the IRQ_DISABLE_UNLAZY flag is set for the non-wake parent interrupt as a convenience to prevent the need to add code to the brcmstb_gpio_irq_handler to support "lazy disable" of the non-wake parent interrupt when it is disabled during suspend and resume. Chained interrupt parents are not normally disabled, but these GPIO devices have different parent interrupts for wake and non-wake handling. It is convenient to mask the non-wake parent when suspending to preserve the hardware state for proper wakeup accounting when the driver is resumed. Signed-off-by: NDoug Berger <opendmb@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Berger 提交于
The GPIOLIB IRQ chip helpers were very appealing, but badly broke the 1:1 mapping between a GPIO controller's device_node and its interrupt domain. When another device-tree node references a GPIO device as its interrupt parent, the irq_create_of_mapping() function looks for the irq domain of the GPIO device and since all bank irq domains reference the same GPIO device node it always resolves to the irq domain of the first bank regardless of which bank the number of the GPIO should resolve. This domain can only map hwirq numbers 0-31 so interrupts on GPIO above that can't be mapped by the device-tree. This commit effectively reverts the patch from Gregory Fong [1] that was accepted upstream and replaces it with a consolidated irq domain implementation with one larger interrupt domain per GPIO controller instance spanning multiple GPIO banks based on an earlier patch [2] also submitted by Gregory Fong. [1] https://patchwork.kernel.org/patch/6921561/ [2] https://patchwork.kernel.org/patch/6347811/ Fixes: 19a7b694 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: NDoug Berger <opendmb@gmail.com> Reviewed-by: NGregory Fong <gregory.0xf0@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Berger 提交于
This commit corrects a bug when configuring the GPIO hardware for IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_LEVEL_HIGH interrupt types. The hardware is now correctly configured to support those types. Fixes: 19a7b694 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: NDoug Berger <opendmb@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Berger 提交于
Reading and writing the gpio bank status register each time a pending interrupt bit is serviced could cause new pending bits to be cleared without servicing the associated interrupts. By using the handle_level_irq flow instead of the handle_simple_irq flow we get proper handling of interrupt masking as well as acking of interrupts. The irq_ack method is added to support this. Fixes: 19a7b694 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: NDoug Berger <opendmb@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Berger 提交于
The basic memory-mapped GPIO controller lock must be released before calling the registered GPIO interrupt handlers to allow the interrupt handlers to access the hardware. Examples of why a GPIO interrupt handler might want to access the GPIO hardware include an interrupt that is configured to trigger on rising and falling edges that needs to read the current level of the input to know how to respond, or an interrupt that causes a change in a GPIO output in the same bank. If the lock is not released before enterring the handler the hardware accesses will deadlock when they attempt to grab the lock. Since the lock is only needed to protect the calculation of unmasked pending interrupts create a dedicated function to perform this and hide the complexity. Fixes: 19a7b694 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: NDoug Berger <opendmb@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Doug Berger 提交于
This commit allows a wakeup parent interrupt to be shared between instances. It also removes the redundant can_wake member of the private data structure by using whether the parent_wake_irq has been defined to indicate that the GPIO device can wake. Fixes: 19a7b694 ("gpio: brcmstb: Add interrupt and wakeup source support") Signed-off-by: NDoug Berger <opendmb@gmail.com> Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com> Acked-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Markus Elfring 提交于
Add a jump target so that a bit of exception handling can be better reused at the end of this function. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Sergei Shtylyov 提交于
Using devm_ioremap_resource() has several advantages over devm_ioremap(): - it checks the passed resource's validity; - it calls devm_request_mem_region() to check for the resource overlap; - it prints an error message in case of error. We can call devm_ioremap_resource() instead of devm_ioremap_nocache() as ioremap() and ioremap_nocache() are implemented identically on ARM. Doing this saves 2 LoCs and 80 bytes (AArch64 gcc 4.8.5). Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 10月, 2017 2 次提交
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由 Linus Walleij 提交于
Some busses, like I2C, strictly need to have the line handled as open drain, i.e. not actively driven high. For this reason the i2c-gpio.c bit-banged I2C driver is reimplementing open drain handling outside of gpiolib. This is not very optimal. Instead make it possible for a consumer to explcitly express that the line must be handled as open drain instead of allowing local hacks papering over this issue. The descriptor tables, whether DT, ACPI or board files, should of course have flagged these lines as open drain. E.g.: enum gpio_lookup_flags GPIO_OPEN_DRAIN for a board file, or gpios = <&foo 42 GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN>; in a device tree using <dt-bindings/gpio/gpio.h> But more often than not, these descriptors are wrong. So we need to make it possible for consumers to enforce this open drain behaviour. We now have two new enumerated GPIO descriptor config flags: GPIOD_OUT_LOW_OPEN_DRAIN and GPIOD_OUT_HIGH_OPEN_DRAIN that will set up the lined enforced as open drain as output low or high, using open drain (if the driver supports it) or using open drain emulation (setting the line as input to drive it high) from the gpiolib core. Cc: linux-gpio@vger.kernel.org Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
It is possible to read all lines of a generic MMIO GPIO chip with a single register read so support this if we are in native endianness. Add an especially quirky callback to read multiple lines for the variants that require you to read values from the output registers if and only if the line is set as output. We managed to do that with a maximum of two register reads, and just one read if the requested lines are all input or all output. Cc: Anton Vorontsov <anton@enomsg.org> Cc: Lukas Wunner <lukas@wunner.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 10月, 2017 2 次提交
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由 Linus Walleij 提交于
The vtable call pin2mask() was introducing a vtable function call in every gpiochip callback for a generic MMIO GPIO chip. This was not exactly efficient. (Maybe link-time optimization could get rid of it, I don't know.) After removing all external calls into this API we can make it a boolean flag in the struct gpio_chip call and sink the function into the gpio-mmio driver yielding encapsulation and potential speedups. Cc: Anton Vorontsov <anton@enomsg.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The MPC8xxx driver is always instantiating its generic GPIO functions with the flag BGPIOF_BIG_ENDIAN. This means "big-endian bit order" and means the bits representing the GPIO lines in the registers are reversed around 31 bits so line 0 is at bit 31 and so forth down to line 31 in bit 0. Instead of looping into the generic MMIO gpio to do the simple calculation of a bitmask, through a vtable call with two parameters likely using stack frames etc (unless the compiler optimize it) and obscuring the view for the programmer, let's just open-code what the call does. This likely executes faster, saves space and makes the code easier to read. Cc: Liu Gang <Gang.Liu@nxp.com> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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