Now that all of the controllers have been fixed up, we can finally select
GENERIC_HARDIRQS_NO_DEPRECATED.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Presently the irq chip is found through the irq_desc, but as this is
going away convert over to an irq_data lookup instead.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

irq_32.c was updated for the new API, while irq_64.c was overlooked. This
syncs them up and gets things building again.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

The introduction of MAX_PHYSMEM_BITS in to the initial cpuinfo struct
causes a build error when sparsemem is disabled and asm/sparsemem.h is
not brought in by other means. Include it explicitly.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now that the genirq code provides an IRQ bitmap of its own and the
necessary API to manipulate it, there's no need to keep our own version
around anymore.

In the process we kill off some unused IRQ reservation code, with future
users now having to tie in to the genirq API as normal.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Now that there's a HAVE_GENERIC_HARDIRQS, switch over.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Switch over to the new allocator functions.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

CPUs can be in either the legacy 29-bit or 32-bit physical addressing
modes. This follows the x86 approach of tracking the phys bits in cpuinfo
and exposing it to userspace through procfs.

This change was requested to permit kexec-tools to detect the physical
addressing mode in order to determine the appropriate address mangling.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

In the MN10300 arch, we occasionally see an assertion being tripped in
alloc_cwqs() at the following line:

        /* just in case, make sure it's actually aligned */
  --->  BUG_ON(!IS_ALIGNED(wq->cpu_wq.v, align));
        return wq->cpu_wq.v ? 0 : -ENOMEM;

The values are:

        wa->cpu_wq.v => 0x902776e0
        align => 0x100

and align is calculated by the following:

        const size_t align = max_t(size_t, 1 << WORK_STRUCT_FLAG_BITS,
                                   __alignof__(unsigned long long));

This is because the pointer in question (wq->cpu_wq.v) loses some of its
lower bits to control flags, and so the object it points to must be
sufficiently aligned to avoid the need to use those bits for pointing to
things.

Currently, 4 control bits and 4 colour bits are used in normal
circumstances, plus a debugging bit if debugging is set.  This requires
the cpu_workqueue_struct struct to be at least 256 bytes aligned (or 512
bytes aligned with debugging).

PERCPU() alignment on MN13000, however, is only 32 bytes as set in
vmlinux.lds.S.  So we set this to PAGE_SIZE (4096) to match most other
arches and stick a comment in alloc_cwqs() for anyone else who triggers
the assertion.
Reported-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NMark Salter <msalter@redhat.com>
Cc: Tejun Heo <tj@kernel.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

No one uses these MMRs so we didn't notice when the anomaly handling
logic was inverted.
Reported-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This code was useful during early port development when our icache code
wasn't solid, but that ship has sailed long ago, and no code calls this
function anymore (irq_panic).  So punt it.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NSimon Guinot <sguinot@lacie.com>
Acked-by: NNicolas Pitre <nico@fluxnic.net>
Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>

Commit b40827fa ("x86-32, mm: Add an initial page table for core
bootstrapping") added an include directive which is needless and is
taken care of by a previous one.  Remove it.
Caught-by: NJaswinder Singh Rajput <jaswinderlinux@gmail.com>
Signed-off-by: NBorislav Petkov <bp@alien8.de>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Commit b0ae1981 ("security: remove unused parameter from
security_task_setscheduler()") broke the build of
arch/mips/kernel/mips-mt-fpaff.c.  The function arguments were
unnecessary, not the semicolon ...
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
Acked-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Acked-by: NJames Morris <jmorris@namei.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Export the cpu configuration topology via sysinfo. Two new lines are
introduced:

CPU Topology HW:      0 0 0 4 6 4
CPU Topology SW:      0 0 0 0 4 24

The HW line describes the cpu topology nesting levels when the maximum
nesting level is used to get the corresponding SYSIB.
The SW line describes what Linux is actually using. In this case it
supports only two levels (CONFIG_SCHED_BOOK off) and therefore the
hardware folded the two lower levels in the SYSIB response block.
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Move the topology sysinfo SYSIB definitions to the proper place in
asm/sysinfo.h where they should be.
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Move cpu topology facility detection to early setup code where it
should be.
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Store the facility list once at system startup with stfl/stfle and
reuse the result for all facility tests.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Enable PFPO, floating point extension, distinct-operands,
fast-BCR-serialization, high-word, interlocked-access, load/store-
on-condition, and population-count facilities for guests.
(bits 37, 44 and 45).
Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

commit 050eef36
    [S390] fix tlb flushing vs. concurrent /proc accesses
broke KVM on s390x. On every schedule a
Badness at include/asm/mmu_context.h:83 appears. s390_enable_sie
replaces the mm on the __running__ task, therefore, we have to
increase the attach count of the new mm.
Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Switch default value of the kernel parameter 'topology' from off to on.
Various performance measurements have finally shown that there are no
(known) regressions anywhere.
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Up to now print_cpu_info() uses the cpu address stored in it's local
lowcore to print a message to the console. The cpu address in the
lowcore is (in this case) however not the physical cpu address of the
local cpu. It's the address of the cpu that issued the sigp restart
which started the local cpu.
Fix this by using the store cpu address instruction instead.
It's not that anybody really cares since this is broken since more than
ten years...
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

The ieee_instruction_pointer can not be read from user space anymore
since git commit 613e1def, the ptrace
interface always returns zero. Remove it from the thread_struct. It
is still present in the user_regs_struct for compatability reasons.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Do the setup of the stack overflow argument for the sixth system
call parameter right before the branch to the system call function.
That simplifies the system call parameter access code.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

The store-cpu-id instruction has a minimum alignment of 8. Reflect
that in the definition of struct cpuid.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Read external interrupts parameters from the lowcore in the first
level interrupt handler in entry[64].S.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Read all required fields for program checks from the lowcore in the
first level interrupt handler in entry[64].S. If the context that
caused the fault was enabled for interrupts we can now re-enable the
irqs in entry[64].S.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

All architectures besides s390 have pte_mkhuge() defined in pgtable.h.
So move the function to pgtable.h on s390 as well.
Fixes a compile error introduced with "hugetlb: hugepage migration core"
in linux-next which only happens on s390.
Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

Raise SIGBUS with a siginfo structure. Deliver BUS_ADRERR as si_code and
the address of the fault in the si_addr field.
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>