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  1. 30 7月, 2013 1 次提交
    • N
      ARM: b.L: core switcher code · 1c33be57
      由 Nicolas Pitre 提交于 
      This is the core code implementing big.LITTLE switcher functionality.
Rationale for this code is available here:

http://lwn.net/Articles/481055/

The main entry point for a switch request is:

void bL_switch_request(unsigned int cpu, unsigned int new_cluster_id)

If the calling CPU is not the wanted one, this wrapper takes care of
sending the request to the appropriate CPU with schedule_work_on().

At the moment the core switch operation is handled by bL_switch_to()
which must be called on the CPU for which a switch is requested.

What this code does:

  * Return early if the current cluster is the wanted one.

  * Close the gate in the kernel entry vector for both the inbound
    and outbound CPUs.

  * Wake up the inbound CPU so it can perform its reset sequence in
    parallel up to the kernel entry vector gate.

  * Migrate all interrupts in the GIC targeting the outbound CPU
    interface to the inbound CPU interface, including SGIs. This is
    performed by gic_migrate_target() in drivers/irqchip/irq-gic.c.

  * Call cpu_pm_enter() which takes care of flushing the VFP state to
    RAM and save the CPU interface config from the GIC to RAM.

  * Modify the cpu_logical_map to refer to the inbound physical CPU.

  * Call cpu_suspend() which saves the CPU state (general purpose
    registers, page table address) onto the stack and store the
    resulting stack pointer in an array indexed by the updated
    cpu_logical_map, then call the provided shutdown function.
    This happens in arch/arm/kernel/sleep.S.

At this point, the provided shutdown function executed by the outbound
CPU ungates the inbound CPU. Therefore the inbound CPU:

  * Picks up the saved stack pointer in the array indexed by its MPIDR
    in arch/arm/kernel/sleep.S.

  * The MMU and caches are re-enabled using the saved state on the
    provided stack, just like if this was a resume operation from a
    suspended state.

  * Then cpu_suspend() returns, although this is on the inbound CPU
    rather than the outbound CPU which called it initially.

  * The function cpu_pm_exit() is called which effect is to restore the
    CPU interface state in the GIC using the state previously saved by
    the outbound CPU.

  * Exit of bL_switch_to() to resume normal kernel execution on the
    new CPU.

However, the outbound CPU is potentially still running in parallel while
the inbound CPU is resuming normal kernel execution, hence we need
per CPU stack isolation to execute bL_do_switch().  After the outbound
CPU has ungated the inbound CPU, it calls mcpm_cpu_power_down() to:

  * Clean its L1 cache.

  * If it is the last CPU still alive in its cluster (last man standing),
    it also cleans its L2 cache and disables cache snooping from the other
    cluster.

  * Power down the CPU (or whole cluster).

Code called from bL_do_switch() might end up referencing 'current' for
some reasons.  However, 'current' is derived from the stack pointer.
With any arbitrary stack, the returned value for 'current' and any
dereferenced values through it are just random garbage which may lead to
segmentation faults.

The active page table during the execution of bL_do_switch() is also a
problem.  There is no guarantee that the inbound CPU won't destroy the
corresponding task which would free the attached page table while the
outbound CPU is still running and relying on it.

To solve both issues, we borrow some of the task space belonging to
the init/idle task which, by its nature, is lightly used and therefore
is unlikely to clash with our usage.  The init task is also never going
away.

Right now the logical CPU number is assumed to be equivalent to the
physical CPU number within each cluster. The kernel should also be
booted with only one cluster active.  These limitations will be lifted
eventually.
Signed-off-by: NNicolas Pitre <nico@linaro.org>
      1c33be57
  3. 24 7月, 2013 1 次提交
    • S
      ARM: EXYNOS: Update CONFIG_ARCH_NR_GPIO for Exynos · 53302bf6
      由 Sachin Kamat 提交于 
      With the recent cleanup in Exynos platform code notably commits
17859bec ("ARM: EXYNOS: Do not select legacy Kconfig symbols any
more") and b9222210 ("ARM: EXYNOS: Remove mach/gpio.h"), the definition
of ARCH_NR_GPIOS got removed. This started causing problems on SoCs like
Exynos4412 which have more than the default number of GPIOs. Thus define
this number in KConfig file which takes care of current SoC requirements
and provides scope for GPIO expanders. Without this patch we get the
following errors during boot:

gpiochip_add: gpios 251..258 (gpv0) failed to register
samsung-pinctrl 106e0000.pinctrl: failed to register gpio_chip gpv0, error code: -22
samsung-pinctrl: probe of 106e0000.pinctrl failed with error -22
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
      53302bf6
  5. 10 7月, 2013 2 次提交
  7. 27 6月, 2013 1 次提交
  9. 26 6月, 2013 1 次提交
  11. 25 6月, 2013 1 次提交
    • S
      ARM: msm: Migrate to common clock framework · 8cc7f533
      由 Stephen Boyd 提交于 
      Move the existing clock code in mach-msm to the common clock
framework. We lose our capability to set the rate of and enable a
clock through debugfs. This is ok though because the debugfs
features are mainly used for testing and development of new clock
code.

To maintain compatibility with the original MSM clock code we
make a wrapper for clk_reset() that calls the struct msm_clk
specific reset function. This is necessary for the usb and sdcc
devices on MSM until a better suited API is made available.

Cc: Saravana Kannan <skannan@codeaurora.org>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
      8cc7f533
  13. 24 6月, 2013 2 次提交
    • A
      ARM: multiplatform: always pick one CPU type · 24e860fb
      由 Arnd Bergmann 提交于 
      With the new default platform code, we can always boot using DT
without requiring a board file, but we cannot build a kernel
unless we select at least one CPU core, which breaks some
"randconfig" builds.

This adapts the ARCH_MULTI_V4T and ARCH_MULTI_V5 options so we
always default to a common CPU core if no platform was enabled
that picks something else. The default we pick for ARMv4T is
ARM920T, while for ARMv5 we pick ARM926T.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      24e860fb
    • G
      ARM: 7773/1: PJ4B: Add support for errata 4742 · 3e0a07f8
      由 Gregory CLEMENT 提交于 
      This commit fixes the regression on Armada 370 (the kernal hang during
boot) introduced by the commit: "ARM: 7691/1: mm: kill unused
TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".

When coming out of either a Wait for Interrupt (WFI) or a Wait for
Event (WFE) IDLE states, a specific timing sensitivity exists between
the retiring WFI/WFE instructions and the newly issued subsequent
instructions. This sensitivity can result in a CPU hang scenario.  The
workaround is to insert either a Data Synchronization Barrier (DSB) or
Data Memory Barrier (DMB) command immediately after the WFI/WFE
instruction.

This commit was based on the work of Lior Amsalem, but heavily
modified to apply the errata fix dynamically according to the
processor type thanks to the suggestions of Russell King and Nicolas
Pitre.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: NWill Deacon <will.deacon@arm.com>
Acked-by: NNicolas Pitre <nico@linaro.org>
Tested-by: NWilly Tarreau <w@1wt.eu>
Cc: <stable@vger.kernel.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3e0a07f8
  15. 22 6月, 2013 1 次提交
  17. 21 6月, 2013 1 次提交
  19. 19 6月, 2013 5 次提交
  21. 18 6月, 2013 3 次提交
    • M
      ARM: davinci: move private EDMA API to arm/common · 3ad7a42d
      由 Matt Porter 提交于 
      Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well.
Signed-off-by: NMatt Porter <mporter@ti.com>
Acked-by: Chris Ball <cjb@laptop.org> # davinci_mmc.c
Acked-by: NMark Brown <broonie@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>
[nsekhar@ti.com: dropped davinci sffsdr changes]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      3ad7a42d
    • S
      ARM: keystone: Add minimal TI Keystone platform support · 828989ad
      由 Santosh Shilimkar 提交于 
      Texas Instruments Keystone family of multi-core devices are
based on ARM Cortex A15. Patch adds basic definitions for a
new Keystone sub-architecture in ARM.

The TCI66xxK2H Communications Infrastructure Keystone SoCs
are member of the C66x family based on TI's new KeyStone 2
multi-core SoC Architecture designed specifically for high
performance wireless and networking infrastructure applications.
The SOCs contains many subsystems like Cortex A15 ARM CorePacs,
C66XX DSP CorePacs, MSMC memory controller, Tera Net bus,
IP Network, Navigator, Hyperlink, 1G/10G Ethernet, Radio layers
and queue based communication systems.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: arm@kernel.org
Acked-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      828989ad
    • S
      ARM: 7759/1: decouple CPU offlining from reboot/shutdown · 19ab428f
      由 Stephen Warren 提交于 
      Add comments to machine_shutdown()/halt()/power_off()/restart() that
describe their purpose and/or requirements re: CPUs being active/not.

In machine_shutdown(), replace the call to smp_send_stop() with a call to
disable_nonboot_cpus(). This completely disables all but one CPU, thus
satisfying the requirement that only a single CPU be active for kexec.
Adjust Kconfig dependencies for this change.

In machine_halt()/power_off()/restart(), call smp_send_stop() directly,
rather than via machine_shutdown(); these functions don't need to
completely de-activate all CPUs using hotplug, but rather just quiesce
them.

Remove smp_kill_cpus(), and its call from smp_send_stop().
smp_kill_cpus() was indirectly calling smp_ops.cpu_kill() without calling
smp_ops.cpu_die() on the target CPUs first. At least some implementations
of smp_ops had issues with this; it caused cpu_kill() to hang on Tegra,
for example. Since smp_send_stop() is only used for shutdown, halt, and
power-off, there is no need to attempt any kind of CPU hotplug here.

Adjust Kconfig to reflect that machine_shutdown() (and hence kexec)
relies upon disable_nonboot_cpus(). However, this alone doesn't guarantee
that hotplug will work, or even that hotplug is implemented for a
particular piece of HW that a multi-platform zImage runs on. Hence, add
error-checking to machine_kexec() to determine whether it did work.
Suggested-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NWill Deacon <will.deacon@arm.com>
Tested-by: NZhangfei Gao <zhangfei.gao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      19ab428f
  23. 17 6月, 2013 6 次提交
  25. 15 6月, 2013 2 次提交
  27. 13 6月, 2013 1 次提交
  29. 12 6月, 2013 3 次提交
  31. 05 6月, 2013 1 次提交
  33. 04 6月, 2013 3 次提交
  35. 31 5月, 2013 1 次提交
    • L
      ARM: u300: device tree support for the timer · 5a5056cc
      由 Linus Walleij 提交于 
      This adds device tree support for the U300 timer, by making
the memory base offset and IRQ dynamically assigned, then
optionally looking them up from the device tree.

Since the timer needs to be registered before any platform
devices are created, we will go into the device tree and look
up the "/timer@c0014000" node and read our base address and
IRQ from there.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      5a5056cc
  37. 30 5月, 2013 1 次提交
  39. 20 5月, 2013 1 次提交
  41. 07 5月, 2013 1 次提交
  43. 04 5月, 2013 1 次提交