1. 05 8月, 2016 6 次提交
  2. 26 3月, 2016 1 次提交
  3. 22 3月, 2016 2 次提交
  4. 18 3月, 2016 5 次提交
  5. 22 1月, 2016 2 次提交
  6. 18 1月, 2016 1 次提交
    • D
      ntb: ntb perf tool · 8a7b6a77
      Dave Jiang 提交于
      Providing raw performance data via a tool that directly access data from
      NTB w/o any software overhead. This allows measurement of the hardware
      performance limit. In revision one we are only doing single direction
      CPU and DMA writes. Eventually we will provide bi-directional writes.
      
      The measurement using DMA engine for NTB performance measure does
      not measure the raw performance of DMA engine over NTB due to software
      overhead. But it should provide the peak performance through the Linux DMA
      driver.
      Signed-off-by: NDave Jiang <dave.jiang@intel.com>
      Tested-by: NAllen Hubbe <Allen.Hubbe@emc.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      8a7b6a77
  7. 11 1月, 2016 3 次提交
  8. 09 11月, 2015 6 次提交
  9. 08 9月, 2015 8 次提交
    • A
      NTB: Fix range check on memory window index · 9a07826f
      Allen Hubbe 提交于
      The range check must exclude the upper bound.
      Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      9a07826f
    • A
      NTB: Improve index handling in B2B MW workaround · 2aa2a77a
      Allen Hubbe 提交于
      Check that b2b_mw_idx is in range of the number of memory windows when
      initializing the device.  The workaround is considered to be in effect
      only if the device b2b_idx is exactly UINT_MAX, instead of any index
      past the last memory window.
      
      Only print B2B MW workaround information in debugfs if the workaround is
      in effect.
      Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      2aa2a77a
    • D
      NTB: Use unique DMA channels for TX and RX · 569410ca
      Dave Jiang 提交于
      Allocate two DMA channels, one for TX operation and one for RX
      operation, instead of having one DMA channel for everything. This
      provides slightly better performance, and also will make error handling
      cleaner later on.
      Signed-off-by: NDave Jiang <dave.jiang@intel.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      569410ca
    • A
      NTB: Remove dma_sync_wait from ntb_async_rx · 905921e7
      Allen Hubbe 提交于
      The dma_sync_wait can hurt the performance of workloads mixed with both
      large and small frames.  Large frames will be copied using the dma
      engine.  Small frames will be copied by the cpu.  The dma_sync_wait
      prevents the cpu and dma engine copying in parallel.
      
      In the period where the cpu is copying, the dma engine is stopped.  The
      dma engine is not doing any useful work to copy large frames during that
      time, and the additional time to restart the dma engine for the next
      large frame.  This will decrease the throughput for the portion of a
      workload with large frames.
      
      In the period where the dma engine is copying, the cpu is held up
      waiting for dma to complete.  The small frames processing will be
      delayed until the dma is complete.  The RX frames are completed
      in-order, and the processing of small frames takes very little time, so
      dma_sync_wait may have an insignificant impact on the respose time of
      frames.  The more significant impact is to the system, because the delay
      in dma_sync_wait is implemented as busy non-blocking wait.  This can
      prevent the delayed core from doing any useful work, even if it could be
      processing work for other drivers, unrelated to transport RX processing.
      
      After applying the earlier patch to fix out-of-order RX acknoledgement,
      the dma_sync_wait is no longer necessary.  Remove it, so that cpu memcpy
      will proceed immediately for small frames, in parallel with ongoing dma
      for large frames.  Do not hold up the cpu from doing work while dma is
      in progress.  The prior fix will continue to ensure in-order completion
      of the RX frames to the upper layer, and in-order delivery of the RX
      acknoledgement.
      Signed-off-by: NAllen Hubbe <Allen.Hubbe@emc.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      905921e7
    • D
      NTB: Clean up QP stats info · d98ef99e
      Dave Jiang 提交于
      Make QP stats info more readable for debugging purposes.  Also add an
      entry to indicate whether DMA is being used.
      Signed-off-by: NDave Jiang <dave.jiang@intel.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      d98ef99e
    • D
      NTB: Make the transport list in order of discovery · 31510000
      Dave Jiang 提交于
      The list should be added from the bottom and not the top in order to
      ensure the transport is provided in the same order to clients as ntb
      devices are discovered.
      Signed-off-by: NDave Jiang <dave.jiang@intel.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      31510000
    • D
      NTB: Add PCI Device IDs for Broadwell Xeon · 0a5d19d9
      Dave Jiang 提交于
      Adding PCI Device IDs for B2B (back to back), RP (root port, primary),
      and TB (transparent bridge, secondary) devices.
      Signed-off-by: NDave Jiang <dave.jiang@intel.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      0a5d19d9
    • D
      NTB: Add flow control to the ntb_netdev · e74bfeed
      Dave Jiang 提交于
      Right now if we push the NTB really hard, we start dropping packets due
      to not able to process the packets fast enough. We need to st:qop the
      upper layer from flooding us when that happens.
      
      A timer is necessary in order to restart the queue once the resource has
      been processed on the receive side. Due to the way NTB is setup, the
      resources on the tx side are tied to the processing of the rx side and
      there's no async way to know when the rx side has released those
      resources.
      Signed-off-by: NDave Jiang <dave.jiang@intel.com>
      Signed-off-by: NJon Mason <jdmason@kudzu.us>
      e74bfeed
  10. 10 8月, 2015 6 次提交