- 19 1月, 2011 13 次提交
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由 Alexander Lam 提交于
I changed 945's self refresh to work without the need for the driver to enable/disable self refresh manually based on the idle state of the gpu. This is much better than enabling/disabling self refresh for various reasons, including staying in a lower power state for more time and avoiding the need for cpu cycles. This was originally done manually to workaround issues with the hardware hanging. However, since 94400120: drm/i915: enable low power render writes on GEN3 hardware, automatic CxSR seems stable. Signed-off-by: NAlexander Lam <lambchop468@gmail.com> Acked-by : Li Peng <peng.li@linux.intel.com> [ickle: play safe with the ordering and disable CxSR before tweaking any watermark and enable afterwards.] Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
945 class hardware has an interesting quirk in which the vblank interrupt is not raised if the CPU is in a low power state. (We also suspect that the memory bus is clocked to the CPU/c-state and not the GPU so there are secondary starvation issues.) In order to prevent the most obvious issue of the low of the vblank interrupt (stuttering compositing that only updates when the mouse is moving) is to install a PM QoS request to prevent low c-states whilst the GPU is active. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
eDP on the CPU doesn't need the PCH set up at all, it can in fact cause problems. So avoid FDI training and PCH PLL enabling in that case. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Tested-by: NYuanhan Liu <yuanhan.liu@linux.intel.com> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
We need to unlock the phase sync pointer enable bit before we can actually enable the phase sync pointer workaround on Ironlake. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
Factor out the FDI disable function (make it a mirror of ironlake_fdi_enable) and add some FDI related assertions to the FDI training code (we need an active pipe & plane before we start transmitting bits). Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
Along with assertion checks for the FDI transmitters and receivers (including PLLs). Modify the pipe enable function to check for FDI PLL status as well, when driving PCH ports. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
Otherwise our writes will be silently ignored. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
With assertions to check transcoder and reference clock state. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
For pre-ILK only. Saves some code in the CRTC enable/disable functions and allows us to check for pipe and panel status at enable/disable time. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
When PLLs or timing regs are changed, we need to make sure the panel lock will allow it. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
Add plane enable/disable functions to prevent duplicated code and allow us to easily check for plane enable/disable requirements (such as pipe enable, plane status, pll status etc). Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Jesse Barnes 提交于
On Ironlake+ we need to enable these in a specific order. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Admittedly, trusting ACPI or the BIOS at all to be correct is littered with numerous examples where it is wrong. Maybe, just maybe, we will have better luck using the ACPI OpRegion lid status... Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 17 1月, 2011 9 次提交
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由 Alex Deucher 提交于
First, we were calling mc_stop() at the top of the function which turns off all MC (memory controller) clients, then checking if the GPU is idle. If it was idle we returned without re-enabling the MC clients which would lead to a blank screen, etc. This patch checks if the GPU is idle before calling mc_stop(). Second, if the reset failed, we were returning without re-enabling the MC clients. This patch re-enables the MC clients before returning regardless of whether the reset was successful or not. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Cc: Jerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Use the common one for all asics. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Switching to pcie gen2 causes problems on some boards. Add a module option to turn it on/off. There are gen2 compatability issues with some motherboards it seems. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=33027Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Ben Skeggs 提交于
The switch to separate BAR and channel address spaces made the fbcon memory address calculation incorrect on NV50+ boards, this commit fixes that. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Reviewed-by: NFrancisco Jerez <currojerez@riseup.net> Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Somehow missed this in the original merge of the nvc0 code. Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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由 Ben Skeggs 提交于
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
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- 15 1月, 2011 2 次提交
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由 Dave Airlie 提交于
This reverts commit dfe63bb0. This commit was causing nouveau not to work properly, for -rc1 I'd prefer it worked and we can look if this is useful for 2.6.39. Cc: James Simmons <jsimmons@infradead.org> Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Knut Petersen 提交于
Signed-off-by: NKnut Petersen <knut_petersen@t-online.de> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
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- 14 1月, 2011 5 次提交
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由 Chris Wilson 提交于
Hopefully, this is a temporary measure whilst the root cause is understood. At the moment, we experience a hard hang whilst looping urbanterror that has been identified as a result of the use of semaphores, but so far only on SNB mobile. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32752 Tested-by: mengmeng.meng@intel.com Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
After reordering the sequence of relocating objects, commit 6fe4f140, we can no longer rely on seeing all reloc targets prior to performing the relocation. As a result we were ignoring the need to flush objects from the render cache and invalidate the sampler caches, resulting in rendering glitches. So we need to clear the relocation domains earlier. Reported-by: NLinus Torvalds <torvalds@linux-foundation.org> Tested-by: NLinus Torvalds <torvalds@linux-foundation.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
On the fault path, commit 6fe4f140 introduction a regression whereby it changed the sequence of the objects but continued to use the original ordering of relocation entries. The result was that incorrect GTT offsets were being fed into the execbuffer causing lots of misrendering and potential hangs. Reported-by: NLinus Torvalds <torvalds@linux-foundation.org> Tested-by: NLinus Torvalds <torvalds@linux-foundation.org> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Whilst we had no older batches on the active list, everything was fine. However, if the GPU is free running and the requests are only being reaped by the periodic retirer, than the current seqno may not be at the start of the list. In this case we need to select the first batch after the last seqno written by the gpu and not inclusive of the seqno. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
In order to workaround the issue with LVDS not working on the Lenovo U160 apparently due to using the wrong SSC frequency, add an option to disable SSC. Suggested-by: NLukács, Árpád <lukacs.arpad@gmail.com> Bugzillla: https://bugs.freedesktop.org/show_bug.cgi?id=32748Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
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- 13 1月, 2011 2 次提交
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由 Indan Zupancic 提交于
... and not if the maximum is non-zero. This fixes the typo introduced in 47356eb6 and preserves the backlight value from boot. [ickle: My thanks also to Indan Zupancic for diagnosing the original regression and suggesting the appropriate fix.] Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org # after 47356eb6
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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- 12 1月, 2011 9 次提交
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由 Chris Wilson 提交于
As the mappable portion of the aperture is always a small subset at the start of the GTT, it is allocated preferentially by drm_mm. This is useful in case we ever need to map an object later. However, if you have a large object that can consume the entire mappable region of the GTT this prevents the batchbuffer from fitting and so causing an error. Instead allocate all those that require a mapping up front in order to improve the likelihood of finding sufficient space to bind them. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Rather than evicting an object at random, which is unlikely to alleviate the memory pressure sufficient to allow us to continue, zap the entire aperture. That should give the system long enough to recover and reap some pages from the evicted objects, forestalling the allocation error for the new object. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
... and not leave the objects in a inconsistent state. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
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由 Chris Wilson 提交于
Before releasing the lock in order to copy the relocation list from user pages, we need to drop all the object references as another thread may usurp and execute another batchbuffer before we reacquire the lock. However, the code was buggy and failed to clear the list... Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
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由 Chris Wilson 提交于
Useful for determining the layout. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
In order to retire active buffers whilst no client is active, we need to insert our own flush requests onto the ring. This is useful for servers that queue up some rendering and then go to sleep as it allows us to the complete processing of those requests, potentially making that memory available again much earlier. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Dave Airlie spotted that his ILK laptop with DMAR enabled was generating the occasional DMAR warning. "The ordering in the previous code was to rewrite the GTT table before unmapping the pages and that makes sense to me." This is his stable patch ported to d-i-n. Reported-by: NDave Airlie <airlied@redhat.com> Original-patch-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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由 Chris Wilson 提交于
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
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