- 16 4月, 2012 1 次提交
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由 Dave Airlie 提交于
My rv515 card is very flaky with msi enabled. Every so often it loses a rearm and never comes back, manually banging the rearm brings it back. Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 23 1月, 2012 1 次提交
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由 Alex Deucher 提交于
Interrupts only work with MSIs. https://bugs.freedesktop.org/show_bug.cgi?id=37679Reported-by: NDmitry Podgorny <pasis.uax@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 21 12月, 2011 1 次提交
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 04 11月, 2011 4 次提交
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由 Alex Deucher 提交于
Allow the user to override whether MSIs are enabled or not on supported ASICs. MSIs are disabled by default on IGP chips as they tend not to work. However certain IGP chips only seem to work with MSIs enabled. I suspect this is a chipset or bios issue, but I'm not sure what the proper fix is. This will at least make diagnosing and working around the problem much easier. See: https://bugs.freedesktop.org/show_bug.cgi?id=37679Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Some Dell laptops only seem to work with MSIs. This looks like a platform/bios bug. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=37679Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Some HP laptops only seem to work with MSIs. This looks like a platform/bios bug. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=37679Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
This makes it easier to add quirks for certain systems. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 02 11月, 2011 1 次提交
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由 Ilija Hadzic 提交于
radeon_driver_irq_preinstall_kms and radeon_driver_irq_uninstall_kms hard code the loop to 6 which happens to be the current maximum number of crtcs and hpd pins; if one day an ASIC with more crtcs (or hpd pins) comes out, this is a trouble waiting to happen. introduce constants for maximum CRTC count, maximum HPD pins count and maximum HDMI blocks count (per FIXME in radeon_irq structure) and correct the loops in radeon_driver_irq_preinstall_kms and radeon_driver_irq_uninstall_kms v2: take care of goofs pointed out by Alex Deucher Signed-off-by: NIlija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 24 1月, 2011 1 次提交
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由 Michel Dänzer 提交于
I'm amazed but not really surprised this worked on x86... Signed-off-by: NMichel Dänzer <daenzer@vmware.com> Signed-off-by: NDave Airlie <airlied@gmail.com>
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- 06 1月, 2011 1 次提交
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由 Tejun Heo 提交于
With cmwq, there's no reason for radeon to use a dedicated workqueue. Drop dev_priv->wq and use system_wq instead. Because radeon_driver_irq_uninstall_kms() may be called from unsleepable context, the work items can't be flushed from there. Instead, init and flush from radeon_irq_kms_init/fini(). While at it, simplify canceling/flushing of rdev->pm.dynpm_idle_work. Always initialize and sync cancel instead of being unnecessarily smart about it. Signed-off-by: NTejun Heo <tj@kernel.org> Acked-by: NAlex Deucher <alexdeucher@gmail.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 23 11月, 2010 1 次提交
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 22 11月, 2010 1 次提交
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由 Alex Deucher 提交于
This adds support for dri2 pageflipping. v2: precision updates from Mario Kleiner. v3: Multihead fixes from Mario Kleiner; missing crtc offset add note about update pending bit on pre-avivo chips Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NMario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 20 8月, 2010 1 次提交
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由 Alex Deucher 提交于
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=29327Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 18 5月, 2010 2 次提交
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由 Alex Deucher 提交于
Useful for certain power management operations. You need to wait for the GUI engine (2D, 3D, CP, etc.) to be idle before changing clocks or adjusting engine parameters. (v2) Fix gui idle enable on pre-r6xx asics (v3) The gui idle interrrupt status bit is permanently asserted on pre-r6xx chips, but the interrrupt is still generated. workaround it in the driver. (v4) Add support for evergreen Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
After thinking it over a lot it made more sense for the core to deal with the output polling especially so it can notify X. v2: drop plans for fake connector - per Michel's comments - fix X patch sent to xorg-devel, add intel polled/hpd setting, add initial nouveau polled/hpd settings. v3: add config lock take inside polling, add intel/nouveau poll init/fini calls v4: config lock was a bit agressive, only needed around connector list reading. otherwise it could re-enter. glisse: discard drm_helper_hpd_irq_event v3: Reviewed-by: Michel Dänzer <michel@daenzer.net> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 07 4月, 2010 2 次提交
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由 Dave Airlie 提交于
When we are running in a headless environment we have no idea what output the user might plug in later, we only have hotplug detect from the digital outputs. So if we detect no connected outputs at initialisation, start a slow work operation to poll every 5 seconds for an output. this is only hooked up for radeon so far, on hw where we have full hotplug detection there is no need for this. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
The fbdev layer in the kms code should act like a consumer of the kms services and avoid having relying on information being store in the kms core structures in order for it to work. This patch a) removes the info pointer/psuedo palette from the core drm_framebuffer structure and moves it to the fbdev helper layer, it also removes the core drm keeping a list of kernel kms fbdevs. b) migrated all the fb helper functions out of the crtc helper file into the fb helper file. c) pushed the fb probing/hotplug control into the driver d) makes the surface sizes into a structure for ease of passing This changes the intel/radeon/nouveau drivers to use the new helper. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 31 3月, 2010 2 次提交
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由 Alex Deucher 提交于
Doesn't seem to work reliably and the pci quirks don't always work. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Replace hardcoded numbers with rdev->num_crtc. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 25 3月, 2010 1 次提交
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由 Clemens Ladisch 提交于
AMD says in section 2.5.4 (GFX MSI Enable) of #43291 (AMD 780G Family Register Programming Requirements): The SBIOS must enable internal graphics MSI capability in GCCFG by setting the following: NBCFG.NB_CNTL.STRAP_MSI_ENABLE='1' Quite a few BIOS writers misinterpret this sentence and think that enabling MSI is an optional feature. However, clearing that bit just prevents delivery of MSI messages but does not remove the MSI PCI capabilities registers, and so leaves these devices unusable for any driver that attempts to use MSI. Setting that bit is not possible after the BIOS has locked down the configuration registers, so we have to manually disable MSI for the affected devices. This fixes the codec communication errors in the HDA driver when accessing the HDMI audio device, and allows us to get rid of the overcautious quirk in radeon_irq_kms.c. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Tested-by: NAlex Deucher <alexdeucher@gamil.com> Cc: <stable@kernel.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 08 1月, 2010 1 次提交
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由 Jerome Glisse 提交于
If for any reason we haven't installed handler we shouldn't try to enable IRQ/MSI on the hw so we don't get unhandled IRQ/MSI which makes the kernel sad. Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 08 12月, 2009 1 次提交
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由 Alex Deucher 提交于
This enabled interrupt driven hpd support for all radeon chips. Assuming the hpd pin is wired up correctly, the driver will generate uevents on digital monitor connect and disconnect and retrain DP monitors automatically. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 02 12月, 2009 2 次提交
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由 Dave Airlie 提交于
We really don't need to process every irq that comes in, we only really want to do SW irq processing when we are actually waiting for a fence to pass. I'm not 100% sure this is race free esp on non-MSI systems so it needs some testing. Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
This enables the use of interrupts on r6xx/r7xx hardware. Interrupts are implemented via a ring buffer. The GPU adds interrupts vectors to the ring and the host reads them off in the interrupt handler. The interrupt controller requires firmware like the CP. This firmware must be installed and accessble to the firmware loader for interrupts to function. MSIs don't seem to work on my RS780. They work fine on all my discrete cards. I'm not sure about other RS780s or RS880s. I've disabled MSIs on RS780 and RS880, but it would probably be worth checking on some other systems. v2 - fix some checkpatch.pl problems; re-read the disp int status reg if we restart the ih; v3 - remove the irq handler if r600_irq_init() fails; remove spinlock in r600_ih_ring_fini(); move ih rb overflow check to r600_get_ih_wptr(); move irq ack to separate function; Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 26 10月, 2009 1 次提交
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由 Alex Deucher 提交于
Try to enable msi on chips that support it. Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 05 10月, 2009 1 次提交
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由 Dave Airlie 提交于
Also add single crtc for RN50 chips. changes in v2: fix vblank init to respect single crtc flag fix r100 mode bandwidth to respect single crtc flag Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 31 8月, 2009 1 次提交
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由 Ben Hutchings 提交于
Loosely based on a patch by Jaswinder Singh Rajput <jaswinderlinux@gmail.com>. KMS support by Dave Airlie <airlied@redhat.com>. For Radeon 100- to 500-series, firmware blobs look like: struct { __be32 datah; __be32 datal; } cp_ucode[256]; For Radeon 600-series, there are two separate firmware blobs: __be32 me_ucode[PM4_UCODE_SIZE * 3]; __be32 pfp_ucode[PFP_UCODE_SIZE]; For Radeon 700-series, likewise: __be32 me_ucode[R700_PM4_UCODE_SIZE]; __be32 pfp_ucode[R700_PFP_UCODE_SIZE]; Signed-off-by: NBen Hutchings <ben@decadent.org.uk> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 16 8月, 2009 1 次提交
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由 Michel Dänzer 提交于
Fixes 3D apps timing out in the WAIT_VBLANK ioctl. AVIVO bits compile-tested only. Signed-off-by: NMichel Dänzer <daenzer@vmware.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 15 6月, 2009 1 次提交
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由 Jerome Glisse 提交于
Add kernel modesetting support to radeon driver, use the ttm memory manager to manage memory and DRM/GEM to provide userspace API. In order to avoid backward compatibility issue and to allow clean design and code the radeon kernel modesetting use different code path than old radeon/drm driver. When kernel modesetting is enabled the IOCTL of radeon/drm driver are considered as invalid and an error message is printed in the log and they return failure. KMS enabled userspace will use new API to talk with the radeon/drm driver. The new API provide functions to create/destroy/share/mmap buffer object which are then managed by the kernel memory manager (here TTM). In order to submit command to the GPU the userspace provide a buffer holding the command stream, along this buffer userspace have to provide a list of buffer object used by the command stream. The kernel radeon driver will then place buffer in GPU accessible memory and will update command stream to reflect the position of the different buffers. The kernel will also perform security check on command stream provided by the user, we want to catch and forbid any illegal use of the GPU such as DMA into random system memory or into memory not owned by the process supplying the command stream. This part of the code is still incomplete and this why we propose that patch as a staging driver addition, future security might forbid current experimental userspace to run. This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX (radeon up to X1950). Works is underway to provide support for R6XX, R7XX and newer hardware (radeon from HD2XXX to HD4XXX). Authors: Jerome Glisse <jglisse@redhat.com> Dave Airlie <airlied@redhat.com> Alex Deucher <alexdeucher@gmail.com> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com> Signed-off-by: NAlex Deucher <alexdeucher@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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