This patch converts kcalloc(1, ...) calls to use the new kzalloc() function.
Signed-off-by: NPekka Enberg <penberg@cs.helsinki.fi>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Some IA64 spinlocks are not being initialized, make it so.
Signed-off-by: NKeith Owens <kaos@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

The main issue is that bus_fixup calls may potentially call
functions that require a valid bus->sysdata pointer.  Since
this is the case, we must set the bus->sysdata pointer before
calling the bus_fixup functions.  The remaining changes are
simple fixes to make sure memory is cleaned up in the function.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

Altix patch to add an SN pci provider for TIOCE, which is SGI's 
PCI Express implementation.
Signed-off-by: NMark Maule <maule@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

This patch enables PCI Domain numbering on Altix.
Signed-off-by: NColin Ngam <cngam@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

The Altix subarch does not provide node information via ACPI. Instead hooks
are used to fixup pci structures. This patch determines the nodes for Altix
PCI busses.

Remote Bridges:
---------------
Altix supports remote I/O nodes without memory or processors but with bridges.
The TIOCA type of bridge is an AGP bridge and the PROM provides information
about the closest node. That information will be returned by pcibus_to_node.

The TIOCP remote bridge type is a PCI bridge but the PROM does not provide a
closest node id. pcibus_to_node will return -1 for devices on those bridges
meaning that device control structures may be allocated on any node.

Safeguard:
----------
Should the fixups result in invalid node information for a pci controller then
a warning will be printed and pcibus_to_node will return -1.


This patch also fixes the "FIXME" in sn_dma_alloc_coherent. This means that
dma_alloc_coherent will now use alloc_pages_node to allocate memory local to
the node that the PCI device is connected to.
Signed-off-by: NChristoph Lameter <clameter@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

This patch is the SGI hotplug driver and additional changes required for
the driver.  These modifications include changes to the SN io_init.c code
for memory management, the inclusion of new SAL calls to enable and disable
PCI slots, and a hotplug-style driver.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

This patch moves header files out of the arch/ia64/sn directories and into
include/asm-ia64/sn.  These files were being included by other subsystems
and should be under include/asm-ia64/sn.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

This patch  fixes the SN IRQ code such that cpu affinity and
Hotplug can modify IRQ values.  The sn_irq_info structures are now locked
using a RCU lock mechanism to avoid lock contention in the lost interrupt
WAR code.
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

This patch changes some macros that are used when running kernel on the
SGI simulator.
Signed-off-by: NJack Steiner <steiner@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

The following patch ensures that the correct error interrupt handling 
routine is initialized.  This patch is based on the 2.6.12 ia64 release tree.
Signed-off-by: NColin Ngam <cngam@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

Provide a driver for the altix TIOCA AGP chipset.  An agpgart backend will
be provided as a separate patch.
Signed-off-by: NMark Maule <maule@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

Move a couple of headers out of arch/ia64/sn/include/pci and into
include/asm-ia64/sn.
Signed-off-by: NMark Maule <maule@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

Provide an abstraction of the altix pci dma runtime layer so that multiple
pci-based bridges can be supported.
Signed-off-by: NMark Maule <maule@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!