1. 24 4月, 2009 1 次提交
    • P
      OMAP2xxx clock: fix broken cpu_mask code · 15ca78f7
      Paul Walmsley 提交于
      Commit 8ad8ff65 breaks the OMAP2xxx
      cpu_mask code, which causes OMAP2xxx to panic on boot.  Fix by
      removing the cpu_mask auto variable and by changing CK_242X
      and CK_243X to use RATE_IN_242X/RATE_IN_243X.
      
      Resolves
      
      <1>Unable to handle kernel NULL pointer dereference at virtual address 0000000c
      <1>pgd = c0004000
      <1>[0000000c] *pgd=00000000
      Internal error: Oops: 5 [#1]
      Modules linked in:
      CPU: 0    Not tainted  (2.6.29-omap1 #32)
      PC is at omap2_clk_set_parent+0x104/0x120
      LR is at omap2_clk_set_parent+0x28/0x120
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NJarkko Nikula <jarkko.nikula@nokia.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      15ca78f7
  2. 23 4月, 2009 1 次提交
    • P
      OMAP2xxx clock: pre-initialize struct clks early · c8088112
      Paul Walmsley 提交于
      Commit 3f0a820c breaks OMAP2xxx boot
      during initial propagate_rate() on osc_ck and sys_ck.  Fix by
      pre-initializing all struct clks before running any other clock init
      code.  Incorporates review comments from Russell King
      <rmk+kernel@arm.linux.org.uk>.
      
      Resolves
      
      <1>Unable to handle kernel NULL pointer dereference at virtual address 00000000
      <1>pgd = c0004000
      <1>[00000000] *pgd=00000000
      Internal error: Oops: 5 [#1]
      Modules linked in:
      CPU: 0    Not tainted  (2.6.29-omap1 #37)
      PC is at propagate_rate+0x10/0x60
      LR is at omap2_clk_init+0x30/0x218
      ...
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Tested-by: NJarkko Nikula <jarkko.nikula@nokia.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      c8088112
  3. 03 4月, 2009 2 次提交
  4. 02 4月, 2009 1 次提交
  5. 26 3月, 2009 1 次提交
  6. 25 3月, 2009 2 次提交
  7. 24 3月, 2009 25 次提交
  8. 05 3月, 2009 1 次提交
  9. 03 3月, 2009 2 次提交
  10. 23 2月, 2009 3 次提交
  11. 20 2月, 2009 1 次提交
    • R
      [ARM] omap: add support for bypassing DPLLs · c0bf3132
      Russell King 提交于
      This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
      88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.
      
      For both OMAP2 and OMAP3, we note the reference and bypass clocks in
      the DPLL data structure.  Whenever we modify the DPLL rate, we first
      ensure that both the reference and bypass clocks are enabled.  Then,
      we decide whether to use the reference and DPLL, or the bypass clock
      if the desired rate is identical to the bypass rate, and program the
      DPLL appropriately.  Finally, we update the clock's parent, and then
      disable the unused clocks.
      
      This keeps the parents correctly balanced, and more importantly ensures
      that the bypass clock is running whenever we reprogram the DPLL.  This
      is especially important because the procedure for reprogramming the DPLL
      involves switching to the bypass clock.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      c0bf3132