Subhash Jadavani reported this partial backtrace:
  Now consider this call stack from MMC block driver (this is on the ARMv7
  based board):

  [<c001b50c>] (v7_dma_inv_range+0x30/0x48) from [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c)
  [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c) from [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c)
  [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c) from [<c0017ff8>] (dma_map_sg+0x3c/0x114)

This is caused by incrementing the struct page pointer, and running off
the end of the sparsemem page array.  Fix this by incrementing by pfn
instead, and convert the pfn to a struct page.

Cc: <stable@vger.kernel.org>
Suggested-by: NJames Bottomley <JBottomley@Parallels.com>
Tested-by: NSubhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We currently use a temporary 1MB section aligned to a 1MB boundary for
mapping the provided device tree until the final page table is created.
However, if the device tree happens to cross that 1MB boundary, the end
of it remains unmapped and the kernel crashes when it attempts to access
it.  Given no restriction on the location of that DTB, it could end up
with only a few bytes mapped at the end of a section.

Solve this issue by mapping two consecutive sections.
Signed-off-by: NNicolas Pitre <nico@linaro.org>
Tested-by: NSascha Hauer <s.hauer@pengutronix.de>
Tested-by: NTomasz Figa <t.figa@samsung.com>
Cc: stable@vger.kernel.org
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Patrik Kluba reports that the preempt count becomes invalid due
to the preempt_enable() call being unbalanced with a
preempt_disable() call in the vfp assembly routines. This happens
because preempt_enable() and preempt_disable() update preempt
counts under PREEMPT_COUNT=y but the vfp assembly routines do so
under PREEMPT=y. In a configuration where PREEMPT=n and
DEBUG_ATOMIC_SLEEP=y, PREEMPT_COUNT=y and so the preempt_enable()
call in VFP_bounce() keeps subtracting from the preempt count
until it goes negative.

Fix this by always using PREEMPT_COUNT to decided when to update
preempt counts in the ARM assembly code.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Reported-by: NPatrik Kluba <pkluba@dension.com>
Tested-by: NPatrik Kluba <pkluba@dension.com>
Cc: <stable@vger.kernel.org> # 2.6.30
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The use of writel instead of writel_relaxed lead to deadlock in some
situation (SMP on Armada 370 for instance). The use of writel_relaxed
as it was done in the rest of this driver fixes this bug.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch fixes a bug for Aurora L2 cache controller when the
write-through mode is enable. For the clean operation even if we don't
have to flush the lines we still need to invalidate them.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

If CONFIG_ARCH_MULTIPLATFORM & CONFIG_ARCH_MVEBU are both enabled,
__v7_pj4b_setup is added between __v7_ca9mp_setup and __v7_setup.

But there's no jump instruction added. If the chip is Cortex A5/A9,
it goes through __v7_pj4b_setup also. It results in system hang.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Since commit 62e4d357 (ARM: 7609/1: disable errata work-arounds which access
secure registers) ARM_ERRATA_743622/751472 depends on !ARCH_MULTIPLATFORM.

Since imx has been converted to multiplatform, the following warning happens:

$ make imx_v6_v7_defconfig
warning: (SOC_IMX6Q && ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects
ARM_ERRATA_751472 which has unmet direct dependencies (CPU_V7 &&
!ARCH_MULTIPLATFORM)
warning: (SOC_IMX6Q && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_743622
which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM)
warning: (SOC_IMX6Q && ARCH_TEGRA_3x_SOC) selects ARM_ERRATA_743622
which has unmet direct dependencies (CPU_V7 && !ARCH_MULTIPLATFORM)
warning: (SOC_IMX6Q && ARCH_TEGRA_2x_SOC && ARCH_TEGRA_3x_SOC) selects
ARM_ERRATA_751472 which has unmet direct dependencies (CPU_V7 &&
!ARCH_MULTIPLATFORM)

Recommended approach is to remove ARM_ERRATA_743622/751472 from being selected
by SOC_IMX6Q and apply such workarounds into the bootloader.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The VIC irqdomain code added in commit
07c9249f
"ARM: 7554/1: VIC: use irq_domain_add_simple()"

Had two bugs:

1) It didn't call irq_create_mapping() once on each
   valid irq source in the slowpath when registering
   the controller.

2) It passed a -1 as IRQ offset for the DT case, whereas
   0 should be passed as invalid IRQ instead.

Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Versatile starts to register Linux IRQ numbers from offset 0
which is illegal, since this is NO_IRQ. Bump all hard-coded IRQs
by 32 to get rid of the problem.

Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

In order to support secure and non-secure platforms in multi-platform
kernels, errata work-arounds that access secure only registers need to
be disabled. Make all the errata options that fit in this category
depend on !CONFIG_ARCH_MULTIPLATFORM.

This will effectively remove the errata options as platforms are
converted over to multi-platform.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

PL310 errata work-arounds using .set_debug function are only needed on
r3p0 and earlier, so check the rev and only set .set_debug on older revs.

Avoiding debug register accesses fixes aborts on non-secure platforms
like highbank. It is assumed that non-secure platforms needing these
work-arounds have already implemented .set_debug with secure monitor
calls.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Commit 68136b10 ("ARM: sunxi: Change device tree naming scheme for
sunxi") changed the naming scheme and the compatible strings used in the
device trees related to the sunXi platform, but forgot to change the
compatible string in the DT machine definition.

This prevents the kernel from booting on these boards.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Commit db5b0ae0 ("Merge tag 'dt' of git://git.kernel.org/.../arm-soc")
causes a duplicated build target.  This patch fixes it and sorts out the
build target alphabetically so that we can recognize something wrong
easily.

Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Where we can pass in LOOKUP_DIRECTORY or LOOKUP_REVAL. Any other flags
passed in here are currently ignored.
Signed-off-by: NJeff Layton <jlayton@redhat.com>
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Commit 787314c3 ("Merge tag 'iommu-updates-v3.8' of
git://git./linux/kernel/git/joro/iommu") did not account for the changed
header location.

The headers were made local to mach-omap2 as they are specific to omap2+
only, and we wanted to get most of the #include <plat/*.h> headers fixed
up anyways for the ARM multiplatform support.

We attempted to avoid this kind of merge conflict early on by setting up
a minimal git branch shared by the arm-soc tree and the iommu tree, but
looks like we still hit a merge issue there as the branches got merged
as various topic branches.

Cc: Joerg Roedel <joro@8bytes.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

prom_add_property() has been renamed to of_add_property()
This patch fixes the following comilation error:

arch/arm/mach-omap2/timer.c: In function ‘omap_get_timer_dt’:
arch/arm/mach-omap2/timer.c:178:3: error: implicit declaration of function ‘prom_add_property’ [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[1]: *** [arch/arm/mach-omap2/timer.o] Error 1
make[1]: *** Waiting for unfinished jobs....
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This is the rename portion of "ARM: sunxi: Change device tree naming
scheme for sunxi" that were missed when the patch was applied.
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge commit 752451f0 ("Merge branch 'i2c-embedded/for-next' of
git://git.pengutronix.de/git/wsa/linux") resulted in a build breakage
for OMAP

  arch/arm/mach-omap2/i2c.c: In function 'omap_pm_set_max_mpu_wakeup_lat_compat':
  arch/arm/mach-omap2/i2c.c:130:2: error: implicit declaration of function 'omap_pm_set_max_mpu_wakeup_lat'
  make[1]: *** [arch/arm/mach-omap2/i2c.o] Error 1

Fix this by including the appropriate header file with the function
prototype.
Reported-by: NFengguang Wu <fengguang.wu@intel.com>
Signed-off-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fix up three empty files in arch/cris/ by sticking placeholder comments in
there to prevent the patch program from deleting them.

I decided not to delete the arch-v*/Kbuild files as it's possibly someone might
want to use them for genhdr-y lines in the future, but they could be deleted
and the pointer lines removed from asm/Kbuild.  The uapi/arch-v*/Kbuild files
ought to be uneffected by such a change.

asm/swab.h didn't have anything outside of __KERNEL__ so nothing appeared in
uapi/asm/swab.h.  The latter, however, is exported by Kbuild.asm.

This needs to be applied after the CRIS UAPI disintegration patch.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Signed-off-by: NJesper Nilsson <jesper.nilsson@axis.com>

arch_write_trylock() should return 'ret' instead of always
return 1.

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NJesper Nilsson <jesper.nilsson@axis.com>

This is modelled on commits such as the one below:

Commit fc1c3a00 ("sh: use kbuild.h
instead of defining macros in asm-offsets.c") introduced in v2.6.26.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NJesper Nilsson <jesper.nilsson@axis.com>

Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NThomas Gleixner <tglx@linutronix.de>
Acked-by: NMichael Kerrisk <mtk.manpages@gmail.com>
Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: NDave Jones <davej@redhat.com>
Acked-by: NLennox Wu <lennox.wu@gmail.com>
Acked-by: NLiqin Chen <liqin299@gmail.com>

Commit 34ae6c96 ("ARM: 7298/1: realview: fix mapping of MPCore
private memory region") accidentally broke the definition for the base
address of the private peripheral region on revision B Realview-EB
boards.

This patch uses the correct address for REALVIEW_EB11MP_PRIV_MEM_BASE.

Cc: <stable@vger.kernel.org>
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Tested-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

flush_cache_louis flushes the D-side caches to the point of unification
inner-shareable. On uniprocessor CPUs, this is defined as zero and
therefore no flushing will take place. Rather than invent a new interface
for UP systems, instead use our SMP_ON_UP patching code to read the
LoUU from the CLIDR instead.

Cc: <stable@vger.kernel.org>
Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

find_vma() is *not* safe when somebody else is removing vmas.  Not just
the return value might get bogus just as you are getting it (this instance
doesn't try to dereference the resulting vma), the search itself can get
buggered in rather spectacular ways.  IOW, ->mmap_sem really, really is
not optional here.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
Cc: <stable@vger.kernel.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We use the FPU and therefore cannot sleep during the crypto
loops.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We use the FPU and therefore cannot sleep during the crypto
loops.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Things works better when you increment the source buffer pointer
properly.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

We use the FPU and therefore cannot sleep during the crypto
loops.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Like the generic versions, we need to support a block size
of '1' for CTR mode AES.

This was discovered thanks to all of the new test cases added by
Jussi Kivilinna.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The basic scheme of the block mode assembler is that we start by
enabling the FPU, loading the key into the floating point registers,
then iterate calling the encrypt/decrypt routine for each block.

For the 256-bit key cases, we run short on registers in the unrolled
loops.

So the {ENCRYPT,DECRYPT}_256_2() macros reload the key registers that
get clobbered.

The unrolled macros, {ENCRYPT,DECRYPT}_256(), are not mindful of this.

So if we have a mix of multi-block and single-block calls, the
single-block unrolled 256-bit encrypt/decrypt can run with some
of the key registers clobbered.

Handle this by always explicitly loading those registers before using
the non-unrolled 256-bit macro.

This was discovered thanks to all of the new test cases added by
Jussi Kivilinna.
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

note that they are relying on access_ok() already checked by caller.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Again, conditional on CONFIG_GENERIC_SIGALTSTACK
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Conditional on CONFIG_GENERIC_SIGALTSTACK; architectures that do not
select it are completely unaffected
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Compat counterpart of current_user_stack_pointer(); for most of the biarch
architectures those two are identical, but e.g. arm64 and arm use different
registers for stack pointer...

Note that amd64 variants of current_user_stack_pointer/compat_user_stack_pointer
do *not* rely on pt_regs having been through FIXUP_TOP_OF_STACK.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

	Cross-architecture equivalent of rdusp(); default is
user_stack_pointer(current_pt_regs()) - that works for almost all
platforms that have usp saved in pt_regs.  The only exception from
that is ia64 - we want memory stack, not the backing store for
register one.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

for the architectures that have usp in pt_regs and do not have
user_stack_pointer() already defined.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>