1. 27 5月, 2014 1 次提交
  2. 01 4月, 2014 2 次提交
  3. 23 1月, 2014 2 次提交
  4. 15 7月, 2013 1 次提交
    • P
      MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code · 078a55fc
      Paul Gortmaker 提交于
      commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
      
      The __cpuinit type of throwaway sections might have made sense
      some time ago when RAM was more constrained, but now the savings
      do not offset the cost and complications.  For example, the fix in
      commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time")
      is a good example of the nasty type of bugs that can be created
      with improper use of the various __init prefixes.
      
      After a discussion on LKML[1] it was decided that cpuinit should go
      the way of devinit and be phased out.  Once all the users are gone,
      we can then finally remove the macros themselves from linux/init.h.
      
      Note that some harmless section mismatch warnings may result, since
      notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
      and are flagged as __cpuinit  -- so if we remove the __cpuinit from
      the arch specific callers, we will also get section mismatch warnings.
      As an intermediate step, we intend to turn the linux/init.h cpuinit
      related content into no-ops as early as possible, since that will get
      rid of these warnings.  In any case, they are temporary and harmless.
      
      Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
      from asm files.  MIPS is interesting in this respect, because there
      are also uasm users hiding behind their own renamed versions of the
      __cpuinit macros.
      
      [1] https://lkml.org/lkml/2013/5/20/589
      
      [ralf@linux-mips.org: Folded in Paul's followup fix.]
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/5494/
      Patchwork: https://patchwork.linux-mips.org/patch/5495/
      Patchwork: https://patchwork.linux-mips.org/patch/5509/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      078a55fc
  5. 09 5月, 2013 1 次提交
  6. 01 2月, 2013 1 次提交
  7. 23 8月, 2012 1 次提交
  8. 29 3月, 2012 1 次提交
  9. 27 7月, 2011 1 次提交
  10. 31 3月, 2011 1 次提交
  11. 17 12月, 2010 1 次提交
  12. 24 9月, 2009 2 次提交
  13. 13 12月, 2008 1 次提交
    • R
      cpumask: centralize cpu_online_map and cpu_possible_map · 98a79d6a
      Rusty Russell 提交于
      Impact: cleanup
      
      Each SMP arch defines these themselves.  Move them to a central
      location.
      
      Twists:
      1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a
         CONFIG_INIT_ALL_POSSIBLE for this rather than break them.
      
      2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'.
         Those archs simply have phys_cpu_present_map replaced everywhere.
      
      3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky
         so I just manipulate them both in sync.
      
      4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map'
         declarations.
      Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
      Reviewed-by: NGrant Grundler <grundler@parisc-linux.org>
      Tested-by: NTony Luck <tony.luck@intel.com>
      Acked-by: NIngo Molnar <mingo@elte.hu>
      Cc: Mike Travis <travis@sgi.com>
      Cc: ink@jurassic.park.msu.ru
      Cc: rmk@arm.linux.org.uk
      Cc: starvik@axis.com
      Cc: tony.luck@intel.com
      Cc: takata@linux-m32r.org
      Cc: ralf@linux-mips.org
      Cc: grundler@parisc-linux.org
      Cc: paulus@samba.org
      Cc: schwidefsky@de.ibm.com
      Cc: lethal@linux-sh.org
      Cc: wli@holomorphy.com
      Cc: davem@davemloft.net
      Cc: jdike@addtoit.com
      Cc: mingo@redhat.com
      98a79d6a
  14. 29 4月, 2008 2 次提交
  15. 29 1月, 2008 2 次提交
  16. 12 10月, 2007 1 次提交
  17. 27 8月, 2007 1 次提交
  18. 04 7月, 2007 1 次提交
  19. 15 6月, 2007 1 次提交
  20. 07 2月, 2007 1 次提交
    • A
      [MIPS] Define MIPS_CPU_IRQ_BASE in generic header · 97dcb82d
      Atsushi Nemoto 提交于
      The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
      platforms and are same value on most platforms (0 or 16, depends on
      CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
      them customizable.  This will save a few cycle on each CPU interrupt.
      
      A good side effect is removing some dependencies to MALTA in generic
      SMTC code.
      
      Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
      mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
      them might cause some header dependency problem and there seems no
      good reason to customize it.  So currently only VR41XX is using custom
      MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
      
      Testing this patch on those platforms is greatly appreciated.  Thank
      you.
      Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      97dcb82d
  21. 30 11月, 2006 1 次提交
  22. 01 11月, 2006 2 次提交
  23. 08 10月, 2006 1 次提交
  24. 27 9月, 2006 1 次提交
  25. 03 7月, 2006 1 次提交
  26. 19 4月, 2006 2 次提交
  27. 28 2月, 2006 1 次提交
    • R
      [MIPS] SMP: Fix initialization order bug. · 9b6695a8
      Ralf Baechle 提交于
          
      A recent change requires cpu_possible_map to be initialized before
      smp_sched_init() but most MIPS platforms were initializing their
      processors in the prom_prepare_cpus callback of smp_prepare_cpus.  The
      simple fix of calling prom_prepare_cpus from one of the earlier SMP
      initialization hooks doesn't work well either since IPIs may require
      init_IRQ() to have completed, so bit the bullet and split
      prom_prepare_cpus into two initialization functions, plat_smp_setup
      which is called early from setup_arch and plat_prepare_cpus called where
      prom_prepare_cpus used to be called.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      9b6695a8
  28. 15 2月, 2006 3 次提交
  29. 13 1月, 2006 1 次提交
  30. 30 10月, 2005 1 次提交