If the DPLL is already enabled, don't try to enable it again.
Since write to the DPLL control register will make the DPLL
reset and which will cause some issues when some child module
are sourced from this DPLL.
Signed-off-by: NJason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

It might be not good to use software defined version to identify sdma
device type, when hardware does not define such version.  Instead,
soc name is stable enough to define the device type.

The patch uses platform_device_id rather than version number passed
by platform data to identify sdma device type/version.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NVinod Koul <vinod.koul@intel.com>

The patch removes all the uses of cpu_is_mx().  Instead, it utilizes
platform_device_id to distinguish the esdhc differences among SoCs.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Chris Ball <cjb@laptop.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NChris Ball <cjb@laptop.org>

On the recent i.mx (mx25/50/53), there is a gasket inside fec
controller which needs to be enabled no matter phy works in MII
or RMII mode.

The current code enables the gasket only when phy interface is RMII.
It's broken when the driver works with a MII phy.  The patch uses
platform_device_id to distinguish the SoCs that have the gasket and
enables it on these SoCs for both MII and RMII mode.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Reported-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: NDavid S. Miller <davem@davemloft.net>

The patch removes all the uses of cpu_is_mx1().  Instead, it uses
the .id_table of platform_driver to distinguish the uart device type,
IMX1_UART and IMX21_UART.  The IMX21_UART type runs on all i.mx
except i.mx1.

A couple of !cpu_is_mx1 logic gets turned into is_imx21_uart,
as the codes wrapped there are really IMX21 type uart specific.

It also removes macro MX1_UCR3_REF25 and MX1_UCR3_REF30 which are
not used anywhere.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>

Software defined version number is not stable enough to be used
in device type naming scheme.  The patch changes it to use implicit
soc name for spi device type definition.  In this way, we can easily
align the naming scheme with device tree binding, which comes later.

It removes fifosize from spi_imx_data and adds devtype there, so that
fifosize can be set in an inline function according to devtype.
Also, cpu_is_mx can be replaced by inline functions checking devtype.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

MX53 has five UART ports.

Add support for the missing UART4 and UART5 ports.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NAndre Silva <andre.silva@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The clock from which the I2C timing is derived is the ipg_perclk not ipg_clk.

I2C bus frequency was lower by a factor of ~8 due to the clock divider
calculation being based on 66.5MHz IPG clock while the bus actually
uses 8MHz ipg_perclk.

Kernel version: 3.0.0-rc2 branch 'imx-for-next' of git://git.pengutronix.de/git/imx/linux-2.6Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Having the silicon revision to appear on the boot log is a useful information.

MX31, MX35 and MX51 already show the silicon revision on boot.

Add support for displaying such information for MX53 as well.

Tested on a mx53loco board, where it shows:

CPU identified as i.MX53, silicon rev 2.0
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
LAKML-Reference: 1301068367-18937-1-git-send-email-fabio.estevam@freescale.com
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

For MX51 SRPG, we need to turn on the GPC clock in order to set the
SRPG registers.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Having the silicon revision to appear on the boot log is a useful information.

MX31 and MX35 already show the silicon revision on boot.

Add support for displaying such information for MX51 as well.

Tested on a MX51EVK, where it shows:

CPU identified as i.MX51, silicon rev 3.0
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Reuse dummy_clk for the imx-keypad device instead of using a dedicated kpp_clk.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch is adding support for pwm1 and pwm2 devices found
on mx51.
[ this patch has been tested with pwm-backlight driver ]
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add support for dynamical allocation of imx-keypad on mx5 platform.

After moving to dynamically registration of the keypad, the keypad clock
name needs to change accordingly.

The reason is that the original mx5 keypad platform_device id was 0,
now we use id=-1 as per arch/arm/plat-mxc/devices/platform-imx-keypad.c.

Tested keypad successfully on a MX51_3DS board.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

uart clk is from pll3 on mx53 instead of mx51
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. some macro definitions fix
2. add platform data for spi device
3. register spi clocks
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. changes some register address to fit macro definition
2. add platform data and clock for sdhc
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

add i2c platform data and clock
Signed-off-by: NYong Shen <yong.shen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

1. pll_base address should return right value
2. uart parent clk is from pll3
Signed-off-by: NYong Shen <yong.shen@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Current code doesn't really enable the usb clocks so if they're disabled
when booting linux, the kernel/machine will hang as soon as someone is trying
to read a usb register
Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add SSI3 to MX51
Signed-off-by: NPeter Horton <phorton@bitbox.co.uk>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Use clk_get to acquire the watchdog clock and also avoid hardcoding the clock name.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.

Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add iomux, clocks,  and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: NYong Shen <yong.shen@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

the attached patch allows SD to work on i.MX51 with Wolfram's drivers
Tested on i.MX51.

Based on original patch from: Richard Zhu <r65037@freescale.com>
Signed-off-by: NEric Bénard <eric@eukrea.com>

Signed-off-by: NEric Bénard <eric@eukrea.com>

Signed-off-by: NEric Bénard <eric@eukrea.com>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Currently the uarts and timer only work because they are
turned on by reset default. Make them secondary clocks
of their corresponding peripheral clocks to make sure they
are turned on when necessary. Also, register some clocks
to get rid of compiler warnings
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>