Since support for mxc91231 was introduced 2009 it only saw patches that
were part of (mxc or arm) global cleanups. The only supported machine
only had 4 devices (2x UART, sdhc, watchdog).

Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
LAKML-Reference: 1302211482-17926-1-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

remove usage of CONFIG_ARCH_MX1. It's mostly unused anyway, replace
it with cpu_is_mx1() where necessary. Also, depend on
IMX_HAVE_PLATFORM_IMX_FB instead of the architectures directly.

LAKML-Reference: 20110303141244.GQ29521@pengutronix.de
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The platform id is used to determine the spi bus number, so it should
better be different to the ids used for imx51-ecspi.  Otherwise it's not
possible to use both devices "imx51-cspi.0" and "imx51-ecspi.0".

Alternative approaches are to use dynamic bus numbering as offered by
the spi framework or let the machine code set the bus number.  The
downside of both possibilities is that the bus number isn't fixed for
the same busses on different machines using i.MX51.

LAKML-Reference: 1302100716-21034-1-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

... together with the related devices "mx3_camera" and "mx3_sdc_fb".

"mx3_camera" doesn't fit the scheme of the other devices that just are
allocated and registered in a single function because it needs additional
care to get some dmaable memory. So currently imx31_alloc_mx3_camera
duplicates most of imx_add_platform_device_dmamask, but I'm not sure it's
worth to split the latter to be able to reuse more code.

This gets rid of mach-mx3/devices.[ch] and so several files need to be
adapted not to #include devices.h anymore.

LAKML-Reference: 1299271882-2130-5-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

LAKML-Reference: 1299271882-2130-2-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
LAKML-Reference: cae1d71db47204ee2654eca7391cb656ed53566b.1300095569.git.baruch@tkos.co.il
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Reported-by: NIgor Trevisan <igt1972@gmail.com>
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
LAKML-Reference: 1299786904-5494-1-git-send-email-w.sang@pengutronix.de
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Having the silicon revision to appear on the boot log is a useful information.

MX31, MX35 and MX51 already show the silicon revision on boot.

Add support for displaying such information for MX53 as well.

Tested on a mx53loco board, where it shows:

CPU identified as i.MX53, silicon rev 2.0
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
LAKML-Reference: 1301068367-18937-1-git-send-email-fabio.estevam@freescale.com
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Directives such as .long and .word do not magically cause the
assembler location counter to become aligned in gas.  As a
result, using these directives in code sections can result in
misaligned data words when building a Thumb-2 kernel
(CONFIG_THUMB2_KERNEL).

This is a Bad Thing, since the ABI permits the compiler to
assume that fundamental types of word size or above are word-
aligned when accessing them from C.  If the data is not really
word-aligned, this can cause impaired performance and stray
alignment faults in some circumstances.

In general, the following rules should be applied when using
data word declaration directives inside code sections:

    * .quad and .double:
         .align 3

    * .long, .word, .single, .float:
         .align (or .align 2)

    * .short:
        No explicit alignment required, since Thumb-2
        instructions are always 2 or 4 bytes in size.
        immediately after an instruction.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
LAKML-Reference: 1289913217-8672-1-git-send-email-dave.martin@linaro.org
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Use irq_set_chip_and_handler() instead. Converted with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NJulien Boibessot <julien.boibessot@armadeus.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Implement code for MX51 that allows the SoC to enter WFI when
arch_idle is called.

This patch is also necessary for correctly suspending the system.
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

For MX50, the HW_ADADIG_DIGPROG register in the ANATOP module will
have the correct silicon revision:

Major       Minor   Description
0x50        0x0     TO1.0
0x50        0x1     TO1.1
Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NJulien Boibessot <julien.boibessot@armadeus.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add sched_clock using cyc_to_sched_clock and update_sched_clock
with HAVE_SCHED_CLOCK
tested on iMX27 and iMX35
Signed-off-by: NJan Weitzel <j.weitzel@phytec.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

this is needed to use get_cycles with sched_clock. Accessing timer
without enabled clk will result in crash
Signed-off-by: NJan Weitzel <j.weitzel@phytec.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Having the silicon revision to appear on the boot log is a useful information.

MX31 and MX35 already show the silicon revision on boot.

Add support for displaying such information for MX51 as well.

Tested on a MX51EVK, where it shows:

CPU identified as i.MX51, silicon rev 3.0
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Tested-by: NMarc Reilly <marc@cpdesign.com.au>
Tested-by: NEric Benard <eric@eukrea.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Tested-by: NMarc Reilly <marc@cpdesign.com.au>
Tested-by: NEric Benard <eric@eukrea.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some cards have the CRC errors in read on mx51 BBG board.
Configure the eSDHC pad configurations to level up the
compatibility to fix this issue.
Signed-off-by: NRichard Zhu <Hong-Xing.Zhu@freescale.com>
Tested-by: NShawn Guo <shawn.guo@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This fixes:

	arch/arm/kernel/built-in.o: In function `__irq_svc':
	io.c:(.text+0x2e0): undefined reference to `avic_base'
	arch/arm/kernel/built-in.o: In function `__irq_usr':
	io.c:(.text+0x4c8): undefined reference to `avic_base'
	arch/arm/mach-mxc91231/built-in.o: In function `mxc91231_init_irq':
	magx-zn5.c:(.init.text+0x18): undefined reference to `mxc_init_irq'

and was broken by

	c7259df3 (ARM i.MX irq: Compile avic irq code only on SoCs that need it)
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Move to SOC_SOC_IMX3X.
Leave ARCH_MX31/35 definitions there, in case some place prevent multi-soc
single image.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NMarc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Move to SOC_SOC_IMX5X. Leave only places which prevent multi-soc
using ARCH_MX5X.
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The boards are currently using otg_ulpi_create and mxc_ulpi_access_ops,
both are only present if CONFIG_USB_ULPI is set. To remove the need of
ifdefs in the board code introduce a imx_otg_ulpi_create functions
which expands to a static inline function if compiled without ulpi.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This saves us from soc level dispatching in generic files
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This saves us from soc level dispatching in generic files
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

While at it remove some useless consts from unsigned int arguments.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This fixes the following warning in a mx3_defconfig build:

	arch/arm/mach-mx3/mach-bug.c: In function 'bug_board_init':
	arch/arm/mach-mx3/mach-bug.c:47: warning: passing argument 1 of 'mxc_iomux_setup_multiple_pins' discards qualifiers from pointer target type

While at it remove some useless consts from unsigned int arguments.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NGwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

According to the "i.MX35 (MCIMX35) Multimedia Applications Processor
Reference Manual" the correct address for the pad control register
IOMUXC_SW_PAD_CTL_PAD_ATA_DATA3 is 0x06ec, not 0x6e8.
Signed-off-by: NRyan Lortie <desrt@desrt.ca>
Acked-by: NMarc Reilly <marc@cpdesign.com.au>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This is not strictly necessary but the right thing to do.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

This fixes a small memory leak that was only hit in very unlikely error
paths
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>

Note that the hardware schematics and documentations can be obtained
  here: http://www.bugcommunity.com/wiki/index.php/BUGbaseSigned-off-by: NDenis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NFrank Li <Frank.Li@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>