1. 28 7月, 2014 5 次提交
  2. 22 7月, 2014 1 次提交
    • J
      powerpc: Disable doorbells on Power8 DD1.x · bd6ba351
      Joel Stanley 提交于
      These processors do not currently support doorbell IPIs, so remove them
      from the feature list if we are at DD 1.xx for the 0x004d part.
      
      This fixes a regression caused by d4e58e59 (powerpc/powernv: Enable
      POWER8 doorbell IPIs). With that patch the kernel would hang at boot
      when calling smp_call_function_many, as the doorbell would not be
      received by the target CPUs:
      
        .smp_call_function_many+0x2bc/0x3c0 (unreliable)
        .on_each_cpu_mask+0x30/0x100
        .cpuidle_register_driver+0x158/0x1a0
        .cpuidle_register+0x2c/0x110
        .powernv_processor_idle_init+0x23c/0x2c0
        .do_one_initcall+0xd4/0x260
        .kernel_init_freeable+0x25c/0x33c
        .kernel_init+0x1c/0x120
        .ret_from_kernel_thread+0x58/0x7c
      
      Fixes: d4e58e59 (powerpc/powernv: Enable POWER8 doorbell IPIs)
      Signed-off-by: NJoel Stanley <joel@jms.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      bd6ba351
  3. 11 7月, 2014 1 次提交
    • P
      powerpc/powernv: Check for IRQHAPPENED before sleeping · c733cf83
      Preeti U Murthy 提交于
      Commit 8d6f7c5a: "powerpc/powernv: Make it possible to skip the IRQHAPPENED
      check in power7_nap()" added code that prevents cpus from checking for
      pending interrupts just before entering sleep state, which is wrong. These
      interrupts are delivered during the soft irq disabled state of the cpu.
      
      A cpu cannot enter any idle state with pending interrupts because they will
      never be serviced until the next time the cpu is woken up by some other
      interrupt. Its only then that the pending interrupts are replayed. This can result
      in device timeouts or warnings about this cpu being stuck.
      
      This patch fixes ths issue by ensuring that cpus check for pending interrupts
      just before entering any idle state as long as they are not in the path of split
      core operations.
      Signed-off-by: NPreeti U Murthy <preeti@linux.vnet.ibm.com>
      Acked-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c733cf83
  4. 26 6月, 2014 1 次提交
  5. 25 6月, 2014 3 次提交
    • S
      powerpc: Don't skip ePAPR spin-table CPUs · 6663a4fa
      Scott Wood 提交于
      Commit 59a53afe "powerpc: Don't setup
      CPUs with bad status" broke ePAPR SMP booting.  ePAPR says that CPUs
      that aren't presently running shall have status of disabled, with
      enable-method being used to determine whether the CPU can be enabled.
      
      Fix by checking for spin-table, which is currently the only supported
      enable-method.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Cc: Michael Neuling <mikey@neuling.org>
      Cc: Emil Medve <Emilian.Medve@Freescale.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6663a4fa
    • L
      powerpc/module: Fix TOC symbol CRC · c2cbcf53
      Laurent Dufour 提交于
      The commit 71ec7c55 introduced the magic symbol ".TOC." for ELFv2 ABI.
      This symbol is built manually and has no CRC value computed. A zero value
      is put in the CRC section to avoid modpost complaining about a missing CRC.
      Unfortunately, this breaks the kernel module loading when the kernel is
      relocated (kdump case for instance) because of the relocation applied to
      the kcrctab values.
      
      This patch compute a CRC value for the TOC symbol which will match the one
      compute by the kernel when it is relocated - aka '0 - relocate_start' done in
      maybe_relocated called by check_version (module.c).
      Signed-off-by: NLaurent Dufour <ldufour@linux.vnet.ibm.com>
      Cc: Anton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      c2cbcf53
    • M
      powerpc/powernv: Remove OPAL v1 takeover · e2500be2
      Michael Ellerman 提交于
      In commit 27f44888 "Add OPAL takeover from PowerVM" we added support
      for "takeover" on OPAL v1 machines.
      
      This was a mode of operation where we would boot under pHyp, and query
      for the presence of OPAL. If detected we would then do a special
      sequence to take over the machine, and the kernel would end up running
      in hypervisor mode.
      
      OPAL v1 was never a supported product, and was never shipped outside
      IBM. As far as we know no one is still using it.
      
      Newer versions of OPAL do not use the takeover mechanism. Although the
      query for OPAL should be harmless on machines with newer OPAL, we have
      seen a machine where it causes a crash in Open Firmware.
      
      The code in early_init_devtree() to copy boot_command_line into cmd_line
      was added in commit 817c21ad "Get kernel command line accross OPAL
      takeover", and AFAIK is only used by takeover, so should also be
      removed.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e2500be2
  6. 24 6月, 2014 7 次提交
  7. 12 6月, 2014 1 次提交
  8. 11 6月, 2014 15 次提交
    • M
      powerpc/book3s: Increment the mce counter during machine_check_early call. · e6654d5b
      Mahesh Salgaonkar 提交于
      We don't see MCE counter getting increased in /proc/interrupts which gives
      false impression of no MCE occurred even when there were MCE events.
      The machine check early handling was added for PowerKVM and we missed to
      increment the MCE count in the early handler.
      
      We also increment mce counters in the machine_check_exception call, but
      in most cases where we handle the error hypervisor never reaches there
      unless its fatal and we want to crash. Only during fatal situation we may
      see double increment of mce count. We need to fix that. But for
      now it always good to have some count increased instead of zero.
      Signed-off-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e6654d5b
    • M
      powerpc/book3s: Add stack overflow check in machine check handler. · e75ad93a
      Mahesh Salgaonkar 提交于
      Currently machine check handler does not check for stack overflow for
      nested machine check. If we hit another MCE while inside the machine check
      handler repeatedly from same address then we get into risk of stack
      overflow which can cause huge memory corruption. This patch limits the
      nested MCE level to 4 and panic when we cross level 4.
      Signed-off-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e75ad93a
    • M
      powerpc/book3s: Fix machine check handling for unhandled errors · 2749a2f2
      Mahesh Salgaonkar 提交于
      Current code does not check for unhandled/unrecovered errors and return from
      interrupt if it is recoverable exception which in-turn triggers same machine
      check exception in a loop causing hypervisor to be unresponsive.
      
      This patch fixes this situation and forces hypervisor to panic for
      unhandled/unrecovered errors.
      
      This patch also fixes another issue where unrecoverable_exception routine
      was called in real mode in case of unrecoverable exception (MSR_RI = 0).
      This causes another exception vector 0x300 (data access) during system crash
      leading to confusion while debugging cause of the system crash.
      
      Also turn ME bit off while going down, so that when another MCE is hit during
      panic path, system will checkstop and hypervisor will get restarted cleanly
      by SP.
      
      With the above fixes we now throw correct console messages (see below) while
      crashing the system in case of unhandled/unrecoverable machine checks.
      
      --------------
      Severe Machine check interrupt [[Not recovered]
        Initiator: CPU
        Error type: UE [Instruction fetch]
          Effective address: 0000000030002864
      Oops: Machine check, sig: 7 [#1]
      SMP NR_CPUS=2048 NUMA PowerNV
      Modules linked in: bork(O) bridge stp llc kvm [last unloaded: bork]
      CPU: 36 PID: 55162 Comm: bash Tainted: G           O 3.14.0mce #1
      task: c000002d72d022d0 ti: c000000007ec0000 task.ti: c000002d72de4000
      NIP: 0000000030002864 LR: 00000000300151a4 CTR: 000000003001518c
      REGS: c000000007ec3d80 TRAP: 0200   Tainted: G           O  (3.14.0mce)
      MSR: 9000000000041002 <SF,HV,ME,RI>  CR: 28222848  XER: 20000000
      CFAR: 0000000030002838 DAR: d0000000004d0000 DSISR: 00000000 SOFTE: 1
      GPR00: 000000003001512c 0000000031f92cb0 0000000030078af0 0000000030002864
      GPR04: d0000000004d0000 0000000000000000 0000000030002864 ffffffffffffffc9
      GPR08: 0000000000000024 0000000030008af0 000000000000002c c00000000150e728
      GPR12: 9000000000041002 0000000031f90000 0000000010142550 0000000040000000
      GPR16: 0000000010143cdc 0000000000000000 00000000101306fc 00000000101424dc
      GPR20: 00000000101424e0 000000001013c6f0 0000000000000000 0000000000000000
      GPR24: 0000000010143ce0 00000000100f6440 c000002d72de7e00 c000002d72860250
      GPR28: c000002d72860240 c000002d72ac0038 0000000000000008 0000000000040000
      NIP [0000000030002864] 0x30002864
      LR [00000000300151a4] 0x300151a4
      Call Trace:
      Instruction dump:
      XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
      XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
      ---[ end trace 7285f0beac1e29d3 ]---
      
      Sending IPI to other CPUs
      IPI complete
      OPAL V3 detected !
      --------------
      Signed-off-by: NMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2749a2f2
    • G
      powerpc/eeh: Dump PE location code · 357b2f3d
      Gavin Shan 提交于
      As Ben suggested, it's meaningful to dump PE's location code
      for site engineers when hitting EEH errors. The patch introduces
      function eeh_pe_loc_get() to retireve the location code from
      dev-tree so that we can output it when hitting EEH errors.
      
      If primary PE bus is root bus, the PHB's dev-node would be tried
      prior to root port's dev-node. Otherwise, the upstream bridge's
      dev-node of the primary PE bus will be check for the location code
      directly.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      357b2f3d
    • M
      powerpc/powernv: Enable POWER8 doorbell IPIs · d4e58e59
      Michael Neuling 提交于
      This patch enables POWER8 doorbell IPIs on powernv.
      
      Since doorbells can only IPI within a core, we test to see when we can use
      doorbells and if not we fall back to XICS.  This also enables hypervisor
      doorbells to wakeup us up from nap/sleep via the LPCR PECEDH bit.
      
      Based on tests by Anton, the best case IPI latency between two threads dropped
      from 894ns to 512ns.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      d4e58e59
    • G
      powerpc/powernv: Fix killed EEH event · 5c7a35e3
      Gavin Shan 提交于
      On PowerNV platform, EEH errors are reported by IO accessors or poller
      driven by interrupt. After the PE is isolated, we won't produce EEH
      event for the PE. The current implementation has possibility of EEH
      event lost in this way:
      
      The interrupt handler queues one "special" event, which drives the poller.
      EEH thread doesn't pick the special event yet. IO accessors kicks in, the
      frozen PE is marked as "isolated" and EEH event is queued to the list.
      EEH thread runs because of special event and purge all existing EEH events.
      However, we never produce an other EEH event for the frozen PE. Eventually,
      the PE is marked as "isolated" and we don't have EEH event to recover it.
      
      The patch fixes the issue to keep EEH events for PEs that have been
      marked as "isolated" with the help of additional "force" help to
      eeh_remove_event().
      Reported-by: NRolf Brudeseth <rolfb@us.ibm.com>
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      5c7a35e3
    • P
      powerpc: fix typo 'CONFIG_PMAC' · 6e0fdf9a
      Paul Bolle 提交于
      Commit b0d278b7 ("powerpc/perf_event: Reduce latency of calling
      perf_event_do_pending") added a check for CONFIG_PMAC were a check for
      CONFIG_PPC_PMAC was clearly intended.
      
      Fixes: b0d278b7 ("powerpc/perf_event: Reduce latency of calling perf_event_do_pending")
      Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6e0fdf9a
    • G
      powerpc/eeh: Report frozen parent PE prior to child PE · 1ad7a72c
      Gavin Shan 提交于
      When we have the corner case of frozen parent and child PE at the
      same time, we have to handle the frozen parent PE prior to the
      child. Without clearning the frozen state on parent PE, the child
      PE can't be recovered successfully.
      
      The patch searches the EEH PE hierarchy tree and returns the toppest
      frozen PE to be handled. It ensures the frozen parent PE will be
      handled prior to child PE.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1ad7a72c
    • G
      powerpc/eeh: Clear frozen state for child PE · 2c665992
      Gavin Shan 提交于
      Since commit cb523e09 ("powerpc/eeh: Avoid I/O access during PE
      reset"), the PE is kept as frozen state on hardware level until
      the PE reset is done completely. After that, we explicitly clear
      the frozen state of the affected PE. However, there might have
      frozen child PEs of the affected PE and we also need clear their
      frozen state as well. Otherwise, the recovery is going to fail.
      Signed-off-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2c665992
    • M
      powerpc: Don't setup CPUs with bad status · 59a53afe
      Michael Neuling 提交于
      OPAL will mark a CPU that is guarded as "bad" in the status property of the CPU
      node.
      
      Unfortunatley Linux doesn't check this property and will put the bad CPU in the
      present map.  This has caused hangs on booting when we try to unsplit the core.
      
      This patch checks the CPU is avaliable via this status property before putting
      it in the present map.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Tested-by: NAnton Blanchard <anton@samba.org>
      cc: stable@vger.kernel.org
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      59a53afe
    • S
      powerpc: Correct DSCR during TM context switch · 96d01610
      Sam bobroff 提交于
      Correct the DSCR SPR becoming temporarily corrupted if a task is
      context switched during a transaction.
      
      The problem occurs while suspending the task and is caused by saving
      the DSCR to thread.dscr after it has already been set to the CPU's
      default value:
      
      __switch_to() calls __switch_to_tm()
      	which calls tm_reclaim_task()
      	which calls tm_reclaim_thread()
      	which calls tm_reclaim()
      		where the DSCR is set to the CPU's default
      __switch_to() calls _switch()
      		where thread.dscr is set to the DSCR
      
      When the task is resumed, it's transaction will be doomed (as usual)
      and the DSCR SPR will be corrupted, although the checkpointed value
      will be correct. Therefore the DSCR will be immediately corrected by
      the transaction aborting, unless it has been suspended. In that case
      the incorrect value can be seen by the task until it resumes the
      transaction.
      
      The fix is to treat the DSCR similarly to the TAR and save it early
      in __switch_to().
      
      A program exposing the problem is added to the kernel self tests as:
      tools/testing/selftests/powerpc/tm/tm-resched-dscr.
      Signed-off-by: NSam Bobroff <sam.bobroff@au1.ibm.com>
      CC: <stable@vger.kernel.org> [v3.10+]
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      96d01610
    • M
      powerpc: Remove platforms/wsp and associated pieces · fb5a5157
      Michael Ellerman 提交于
      __attribute__ ((unused))
      
      WSP is the last user of CONFIG_PPC_A2, so we remove that as well.
      
      Although CONFIG_PPC_ICSWX still exists, it's no longer selectable for
      any Book3E platform, so we can remove the code in mmu-book3e.h that
      depended on it.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      fb5a5157
    • P
      powerpc: Remove check for CONFIG_SERIAL_TEXT_DEBUG · 94314290
      Paul Bolle 提交于
      The Kconfig symbol SERIAL_TEXT_DEBUG was removed from
      arch/powerpc/Kconfig.debug in v2.6.22. (In v2.6.27 it was also removed
      from arch/ppc/Kconfig.debug.) So the check for its macro has evaluated
      to false for over five years now. Remove that check and the few lines
      of code hidden behind it.
      Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      94314290
    • B
      powerpc: Add AT_HWCAP2 to indicate V.CRYPTO category support · dd58a092
      Benjamin Herrenschmidt 提交于
      The Vector Crypto category instructions are supported by current POWER8
      chips, advertise them to userspace using a specific bit to properly
      differentiate with chips of the same architecture level that might not
      have them.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      CC: <stable@vger.kernel.org> [v3.10+]
      dd58a092
    • T
      booke/watchdog: refine and clean up the codes · d2deebab
      Tang Yuantian 提交于
      Basically, this patch does the following:
      1. Move the codes of parsing boot parameters from setup-common.c
         to driver. In this way, code reader can know directly that
         there are boot parameters that can change the timeout.
      2. Make boot parameter 'booke_wdt_period' effective.
         currently, when driver is loaded, default timeout is always
         being used in stead of booke_wdt_period.
      3. Wrap up the watchdog timeout in device struct and clean up
         unnecessary codes.
      Signed-off-by: NTang Yuantian <yuantian.tang@freescale.com>
      Acked-by: NScott Wood <scottwood@freescale.com>
      Reviewed-by: NLi Yang <leoli@freescale.com>
      Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
      d2deebab
  9. 07 6月, 2014 1 次提交
  10. 05 6月, 2014 4 次提交
    • N
      sched: Rename capacity related flags · 5d4dfddd
      Nicolas Pitre 提交于
      It is better not to think about compute capacity as being equivalent
      to "CPU power".  The upcoming "power aware" scheduler work may create
      confusion with the notion of energy consumption if "power" is used too
      liberally.
      
      Let's rename the following feature flags since they do relate to capacity:
      
      	SD_SHARE_CPUPOWER  -> SD_SHARE_CPUCAPACITY
      	ARCH_POWER         -> ARCH_CAPACITY
      	NONTASK_POWER      -> NONTASK_CAPACITY
      Signed-off-by: NNicolas Pitre <nico@linaro.org>
      Signed-off-by: NPeter Zijlstra <peterz@infradead.org>
      Cc: Vincent Guittot <vincent.guittot@linaro.org>
      Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
      Cc: Morten Rasmussen <morten.rasmussen@arm.com>
      Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      Cc: linaro-kernel@lists.linaro.org
      Cc: Andy Fleming <afleming@freescale.com>
      Cc: Anton Blanchard <anton@samba.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Michael Ellerman <mpe@ellerman.id.au>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Preeti U Murthy <preeti@linux.vnet.ibm.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
      Cc: Toshi Kani <toshi.kani@hp.com>
      Cc: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
      Cc: Vincent Guittot <vincent.guittot@linaro.org>
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linuxppc-dev@lists.ozlabs.org
      Link: http://lkml.kernel.org/n/tip-e93lpnxb87owfievqatey6b5@git.kernel.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
      5d4dfddd
    • A
      powerpc: Allow ppc_md platform hook to override memory_block_size_bytes · a5d86257
      Anton Blanchard 提交于
      The pseries platform code unconditionally overrides
      memory_block_size_bytes regardless of the running platform.
      
      Create a ppc_md hook that so each platform can choose to
      do what it wants.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a5d86257
    • W
      powerpc/eeh: Skip eeh sysfs when eeh is disabled · 2213fb14
      Wei Yang 提交于
      When eeh is not enabled, and hotplug two pci devices on the same bus, eeh
      related sysfs would be added twice for the first added pci device. Since the
      eeh_dev is not created when eeh is not enabled.
      
      This patch adds the check, if eeh is not enabled, eeh sysfs will not be
      created.
      
      After applying this patch, following warnings are reduced:
      
      sysfs: cannot create duplicate filename '/devices/pci0000:00/0000:00:00.0/eeh_mode'
      sysfs: cannot create duplicate filename '/devices/pci0000:00/0000:00:00.0/eeh_config_addr'
      sysfs: cannot create duplicate filename '/devices/pci0000:00/0000:00:00.0/eeh_pe_config_addr'
      Signed-off-by: NWei Yang <weiyang@linux.vnet.ibm.com>
      Acked-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2213fb14
    • B
      powerpc/serial: Use saner flags when creating legacy ports · c4cad90f
      Benjamin Herrenschmidt 提交于
      We had a mix & match of flags used when creating legacy ports
      depending on where we found them in the device-tree. Among others
      we were missing UPF_SKIP_TEST for some kind of ISA ports which is
      a problem as quite a few UARTs out there don't support the loopback
      test (such as a lot of BMCs).
      
      Let's pick the set of flags used by the SoC code and generalize it
      which means autoconf, no loopback test, irq maybe shared and fixed
      port.
      
      Sending to stable as the lack of UPF_SKIP_TEST is breaking
      serial on some machines so I want this back into distros
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      CC: stable@vger.kernel.org
      c4cad90f
  11. 30 5月, 2014 1 次提交
    • A
      KVM: PPC: Book3S PR: Rework SLB switching code · d8d164a9
      Alexander Graf 提交于
      On LPAR guest systems Linux enables the shadow SLB to indicate to the
      hypervisor a number of SLB entries that always have to be available.
      
      Today we go through this shadow SLB and disable all ESID's valid bits.
      However, pHyp doesn't like this approach very much and honors us with
      fancy machine checks.
      
      Fortunately the shadow SLB descriptor also has an entry that indicates
      the number of valid entries following. During the lifetime of a guest
      we can just swap that value to 0 and don't have to worry about the
      SLB restoration magic.
      
      While we're touching the code, let's also make it more readable (get
      rid of rldicl), allow it to deal with a dynamic number of bolted
      SLB entries and only do shadow SLB swizzling on LPAR systems.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      d8d164a9