1. 22 11月, 2012 3 次提交
  2. 25 10月, 2012 2 次提交
  3. 13 9月, 2012 1 次提交
  4. 02 9月, 2012 1 次提交
  5. 17 8月, 2012 9 次提交
  6. 22 6月, 2012 3 次提交
    • P
      W1: OMAP HDQ1W: use runtime PM · c354a864
      Paul Walmsley 提交于
      Convert the OMAP HDQ driver to use runtime PM.  Compile- and boot-tested,
      but not tested in actual use.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: NeilBrown <neilb@suse.de>
      Cc: Evgeniy Polyakov <zbr@ioremap.net>
      Acked-by: NEvgeniy Polyakov <zbr@ioremap.net>
      Tested-by: NNeilBrown <neilb@suse.de>
      c354a864
    • P
      W1: OMAP HDQ1W: use 32-bit register accesses · 2acd0894
      Paul Walmsley 提交于
      HDQ/1-wire registers are 32 bits long, even if the register contents
      fit into 8 bits, so accesses must be 32-bit aligned.  Evidently the
      OMAP2/3 interconnects allowed the driver to get away with 8 bit accesses,
      but the OMAP4 puts a stop to that:
      
      [    1.488800] Driver for 1-wire Dallas network protocol.
      [    1.495025] Bad mode in data abort handler detected
      [    1.500122] Internal error: Oops - bad mode: 0 [#1] SMP
      [    1.505615] Modules linked in:
      [    1.508819] CPU: 0    Not tainted  (3.3.0-rc1-00008-g45030e9 #992)
      [    1.515289] PC is at 0xffff0018
      [    1.518615] LR is at omap_hdq_probe+0xd4/0x2cc
      
      The OMAP4430 ES2 Rev X TRM does warn about this restriction in section
      23.2.6.2 "HDQ/1-Wire Registers".
      
      Fixes the crash on OMAP4430 ES2 Pandaboard.  Tested also on OMAP34xx and
      OMAP2420; it seems to work fine on those chips, although due to the lack
      of boards with HDQ/1-wire devices here, a more indepth test was not
      possible.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: NeilBrown <neilb@suse.de>
      Cc: Evgeniy Polyakov <zbr@ioremap.net>
      Acked-by: NEvgeniy Polyakov <zbr@ioremap.net>
      2acd0894
    • P
      W1: OMAP HDQ1W: allow driver to be built on all OMAP2+ · d6600300
      Paul Walmsley 提交于
      Allow the OMAP HDQ1W driver to be built for all OMAP2+ SoCs by
      adjusting KConfig dependencies.  The previous dependency required
      either SOC_OMAP2430 or ARCH_OMAP3 to be set, but the HDQ IP block is
      present on OMAP2420 and OMAP44xx SoCs.  The driver was still
      selectable on multi-OMAP kernel configurations, however; so the
      previous prohibition was rather pointless.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Evgeniy Polyakov <zbr@ioremap.net>
      Acked-by: NEvgeniy Polyakov <zbr@ioremap.net>
      d6600300
  7. 19 6月, 2012 1 次提交
  8. 14 6月, 2012 5 次提交
  9. 13 6月, 2012 2 次提交
  10. 07 5月, 2012 1 次提交
  11. 05 5月, 2012 1 次提交
  12. 30 4月, 2012 1 次提交
  13. 25 4月, 2012 1 次提交
  14. 19 4月, 2012 1 次提交
  15. 12 4月, 2012 2 次提交
  16. 10 4月, 2012 1 次提交
  17. 03 4月, 2012 1 次提交
  18. 09 3月, 2012 1 次提交
  19. 25 2月, 2012 3 次提交