1. 20 12月, 2013 1 次提交
  2. 12 12月, 2013 2 次提交
    • B
      gpio: driver for Xtensa GPIO32 · 3b31d0ec
      Baruch Siach 提交于
      GPIO32 is a standard optional extension to the Xtensa architecture
      core that provides preconfigured output and input ports for intra
      SoC signaling. The GPIO32 option is implemented as 32bit Tensilica
      Instruction Extension (TIE) output state called EXPSTATE, and 32bit
      input wire called IMPWIRE. This driver treats input and output
      states as two distinct devices.
      
      v3:
      * Use BUG() in xtensa_impwire_set_value() to indicate that
        it should never be called (Linus Walleij)
      v2:
      * Address the comments of Linus Walleij:
        - Add a few comments
        - Expand commit log message
        - Use the BIT() macro for bit offsets
        - Rewrite CPENABLE handling as static inlines
        - Use device_initcall()
      * Depend on !SMP for reason explained in the comments (Marc Gauthier)
      * Use XCHAL_CP_ID_XTIOP to enable/disable GPIO32 only
      Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      3b31d0ec
    • A
      gpio: 74x164: Remove non-DT support · 61e73804
      Alexander Shiyan 提交于
      Commit 20bc4d5d
      (gpio: 74x164: Add support for the daisy-chaining) introduce check
      for DT for the driver, so driver cannot be used without DT.
      There are no in-tree users of this driver, so remove non-DT support
      completely.
      Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
      Acked-by: NMark Brown <broonie@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      61e73804
  3. 03 12月, 2013 2 次提交
  4. 06 11月, 2013 1 次提交
  5. 30 10月, 2013 1 次提交
  6. 26 10月, 2013 1 次提交
  7. 11 10月, 2013 1 次提交
  8. 21 9月, 2013 3 次提交
  9. 19 9月, 2013 1 次提交
  10. 13 9月, 2013 1 次提交
  11. 30 8月, 2013 1 次提交
    • S
      gpio: add GPIO support for F71882FG and F71889F · 6c17aa01
      Simon Guinot 提交于
      This patch adds support for the GPIOs found on the Fintek super-I/O
      chips F71882FG and F71889F.
      
      A super-I/O is a legacy I/O controller embedded on x86 motherboards. It
      is used to connect the low-bandwidth devices. Among others functions the
      F71882FG/F71889F provides: a parallel port, two serial ports, a keyboard
      controller, an hardware monitoring controller and some GPIO pins.
      
      Note that this super-I/Os are embedded on some Atom-based LaCie NASes.
      The GPIOs are used to control the LEDs and the hard drive power.
      
      Changes since v3:
      - Use request_muxed_region to protect the I/O ports against concurrent
        accesses.
      
      Changes since v2:
      - Remove useless NULL setters for driver data.
      
      Changes since v1:
      - Enhance the commit message by describing what is a Super-I/O.
      - Use self-explanatory names for the GPIO register macros.
      - Add a comment to explain the platform device and driver registration.
      - Fix gpio_get when GPIO is configured in input mode. I only had
        the hardware to check this mode recently...
      Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6c17aa01
  12. 26 8月, 2013 1 次提交
  13. 21 7月, 2013 4 次提交
    • G
      gpio: Kontron PLD gpio driver · d22fcde0
      Guenter Roeck 提交于
      Add gpio support for the on-board PLD found on some Kontron embedded modules.
      
      Originally-from: Michael Brunner <michael.brunner@kontron.com>
      Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
      Signed-off-by: NKevin Strasser <kevin.strasser@linux.intel.com>
      Acked-by: NDarren Hart <dvhart@linux.intel.com>
      Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      d22fcde0
    • J
      gpio-tz1090: convert to use generic irqchip · 04777396
      James Hogan 提交于
      Convert gpio-tz1090 driver to use generic irqchips. This allows the
      irq_ack, irq_mask, and irq_unmask callbacks and associated helper
      functions to be removed. Also switch to using irq_setup_alt_chip() in
      the irq_set_type callback instead of using __irq_set_handler_locked().
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      04777396
    • J
      gpio-tz1090-pdc: add TZ1090 PDC gpio driver · 79bb6460
      James Hogan 提交于
      Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
      TZ1090 SoC.
      
      The driver is instantiated by device tree and supports interrupts for
      the SysWake GPIOs only.
      
      Changes in v4:
       - fix typos in DT bindings compatible properties
       - reference Documentation/devicetree/bindings/gpio/gpio.txt in
         gpio-ranges description in DT bindings
       - fix gpio-ranges examples in DT bindings (it must now have 3 cells)
      
      Changes in v3:
       - separated from irq-imgpdc and removed arch/metag changes to allow
         these patches to go upstream separately via the pinctrl[/gpio] trees
         (particularly the pinctrl drivers depend on the new pinconf DT
         bindings).
       - some s/unsigned/unsigned int/.
       - gpio-tz1090*: refer to <dt-bindings/gpio/gpio.h> and
         <dt-bindings/interrupt-controller/irq.h> flags in bindings.
       - gpio-tz1090*: move initcall from postcore to subsys.
      
      Changes in v2:
       - gpio-tz1090-pdc: remove references to Linux flags in dt bindings
       - gpio-tz1090-pdc: make use of BIT() from linux/bitops.h
       - gpio-tz1090-pdc: make register accessors inline to match pinctrl
       - gpio-tz1090-pdc: update gpio-ranges to use 3 cells after recent ABI
         breakage
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Rob Landley <rob@landley.net>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-doc@vger.kernel.org
      Cc: devicetree-discuss@lists.ozlabs.org
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      79bb6460
    • J
      gpio-tz1090: add TZ1090 gpio driver · 9caf1f22
      James Hogan 提交于
      Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
      This doesn't include low-power GPIOs as they're controlled separately
      via the Powerdown Controller (PDC) registers.
      
      The driver is instantiated by device tree and supports interrupts for
      all GPIOs.
      
      Changes in v4:
       - fix typos in DT bindings compatible properties
       - reference Documentation/devicetree/bindings/gpio/gpio.txt in
         gpio-ranges description in DT bindings
       - fix gpio-ranges examples in DT bindings (it must now have 3 cells)
       - gpio-tz1090: use of_property_read_u32 instead of of_get_property
      
      Changes in v3:
       - separated from irq-imgpdc and removed arch/metag changes to allow
         these patches to go upstream separately via the pinctrl[/gpio] trees
         (particularly the pinctrl drivers depend on the new pinconf DT
         bindings).
       - some s/unsigned/unsigned int/.
       - some s/unsigned int/bool/ and use of BIT().
       - gpio-tz1090*: refer to <dt-bindings/gpio/gpio.h> and
         <dt-bindings/interrupt-controller/irq.h> flags in bindings.
       - gpio-tz1090*: move initcall from postcore to subsys.
       - gpio-tz1090: add REG_ prefix to some constants for consistency.
       - gpio-tz1090: add comment to explain tz1090_gpio_irq_next_edge
         cunningness.
      
      Changes in v2:
       - gpio-tz1090: remove references to Linux flags in dt bindings
       - gpio-tz1090: make use of BIT() from linux/bitops.h
       - gpio-tz1090: make register accessors inline to match pinctrl
       - gpio-tz1090: update gpio-ranges to use 3 cells after recent ABI
         breakage
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Rob Landley <rob@landley.net>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-doc@vger.kernel.org
      Cc: devicetree-discuss@lists.ozlabs.org
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      9caf1f22
  14. 19 6月, 2013 1 次提交
  15. 17 6月, 2013 1 次提交
  16. 13 6月, 2013 1 次提交
  17. 12 6月, 2013 1 次提交
  18. 31 5月, 2013 1 次提交
  19. 21 5月, 2013 1 次提交
    • A
      gpio: mcp23s08: Fix build error when CONFIG_SPI_MASTER=y && CONFIG_I2C=m · 0f119a84
      Axel Lin 提交于
      This patch fixes below build error when CONFIG_SPI_MASTER=y && CONFIG_I2C=m &&
      CONFIG_GPIO_MCP23S08=y.
      
        LD      init/built-in.o
      drivers/built-in.o: In function `mcp23017_write':
      clkdev.c:(.text+0x1e14): undefined reference to `i2c_smbus_write_word_data'
      drivers/built-in.o: In function `mcp23017_read':
      clkdev.c:(.text+0x1e24): undefined reference to `i2c_smbus_read_word_data'
      drivers/built-in.o: In function `mcp23008_write':
      clkdev.c:(.text+0x1e8c): undefined reference to `i2c_smbus_write_byte_data'
      drivers/built-in.o: In function `mcp23008_read':
      clkdev.c:(.text+0x1e98): undefined reference to `i2c_smbus_read_byte_data'
      drivers/built-in.o: In function `mcp23008_read_regs':
      clkdev.c:(.text+0x1ed0): undefined reference to `i2c_smbus_read_byte_data'
      drivers/built-in.o: In function `mcp23s08_init':
      clkdev.c:(.init.text+0x30): undefined reference to `i2c_register_driver'
      drivers/built-in.o: In function `mcp23s08_exit':
      clkdev.c:(.exit.text+0x30): undefined reference to `i2c_del_driver'
      make: *** [vmlinux] Error 1
      
      When CONFIG_I2C=m, meaning we can't build the drivers in with I2C support.
      Thus don't allow the drivers to be compiled as built-in when CONFIG_I2C=m.
      
      The real fix though is to break the driver apart into a SPI part, an I2C part
      and a common part. But that's something for 3.11 while this is something for
      3.10/stable.
      Signed-off-by: NAxel Lin <axel.lin@ingics.com>
      Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      0f119a84
  20. 26 4月, 2013 1 次提交
  21. 16 4月, 2013 1 次提交
  22. 04 4月, 2013 1 次提交
  23. 03 4月, 2013 1 次提交
    • M
      gpio: Renesas R-Car GPIO driver V3 · 119f5e44
      Magnus Damm 提交于
      This patch is V3 of a GPIO driver for the R-Car series of
      SoCs from Renesas. This driver is designed to be reusable
      between multiple SoCs that share the same basic building block,
      but so far it has only been used on R-Car H1 (r8a7779).
      
      Each driver instance handles 32 GPIOs with individually
      maskable IRQs. The driver operates on a single I/O memory
      range and the 32 GPIOs are hooked up a single interrupt.
      
      In the case of R-Car H1 either external IRQ pins or GPIOs
      with interrupts can be used for on-board interupts. For
      external IRQs 4 pins are supported, and in the case of GPIO
      there are 202 GPIOS as 202 interrupts hooked up via 6 driver
      instances and to the GIC and the Cortex-A9 Quad.
      
      At this point this driver is interfacing as a regular
      platform device driver. In the future DT support will be
      submitted as an incremental feature patch.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      119f5e44
  24. 27 3月, 2013 1 次提交
  25. 14 2月, 2013 2 次提交
  26. 05 2月, 2013 1 次提交
  27. 31 1月, 2013 1 次提交
  28. 22 1月, 2013 2 次提交
  29. 20 12月, 2012 1 次提交
  30. 10 12月, 2012 1 次提交
  31. 03 12月, 2012 1 次提交