- 23 7月, 2012 5 次提交
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由 Shawn Guo 提交于
Call pinctrl subsystem to set up pwm pin. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Shawn Guo 提交于
Use devm_* managed functions to have a clean fail-out. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Shawn Guo 提交于
Use global reset function stmp_reset_block instead of mxs_reset_block to remove <mach/common.h> inclusion. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Shawn Guo 提交于
Encode soc name in the compatible string to know the specific version hardware block. This is the general approach adopted for most bindings. Change mxs-pwm binding to use the approach. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
This commit adds very basic support for device tree probing. Currently, only a PWM and a list of distinct brightness levels can be specified. Enabling or disabling backlight power via GPIOs is not yet supported. Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Reviewed-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 03 7月, 2012 8 次提交
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由 Shawn Guo 提交于
Add generic PWM framework driver (DT only) for Freescale MXS. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Sascha Hauer 提交于
Move the driver to drivers/pwm/ and convert it to use the framework. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Cc: Alexey Charkov <alchark@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Sascha Hauer 提交于
Move the driver to drivers/pwm/ and convert it to use the framework. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> [eric@eukrea.com: fix pwmchip_add return code test] Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Sascha Hauer 提交于
Move the driver to drivers/pwm/ and convert it to use the framework. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> [eric@eukrea.com: set chip.dev to prevent probe failure] [eric@eukrea.com: fix pwmchip_add return code test] Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
This commit moves the PXA PWM driver to the drivers/pwm subdirectory and converts it to use the new PWM framework. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
This commit moves the Blackfin PWM driver to the drivers/pwm sub- directory and converts it to register with the new PWM framework. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
Add auxdata to instantiate the PWFM controller from a device tree, include the corresponding nodes in the dtsi files for Tegra 20 and Tegra 30 and add binding documentation. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
This commit adds a generic PWM framework driver for the PWFM controller found on NVIDIA Tegra SoCs. The driver is based on code from the Chromium kernel tree and was originally written by Gary King (NVIDIA) and later modified by Simon Que (Chromium). Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 15 6月, 2012 5 次提交
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由 Thierry Reding 提交于
This patch adds helpers to support device tree bindings for the generic PWM API. Device tree binding documentation for PWM controllers is also provided. Acked-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
In order to get rid of the global namespace for PWM devices, this commit provides an alternative method, similar to that of the regulator or clock frameworks, for registering a static mapping for PWM devices. This works by providing a table with a provider/consumer map in the board setup code. With the new pwm_get() and pwm_put() functions available, usage of pwm_request() and pwm_free() becomes deprecated. Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Reviewed-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
This commit adds a debugfs interface that can be used to list the current internal state of the PWM devices registered with the PWM framework. Reviewed-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Thierry Reding 提交于
Many PWM controllers provide access to more than a single PWM output and may even share some resource among them. Allowing a PWM chip to provide multiple PWM devices enables better sharing of those resources. As a side-effect this change allows easy integration with the device tree where a given PWM can be looked up based on the PWM chip's phandle and a corresponding index. This commit modifies the PWM core to support multiple PWMs per struct pwm_chip. It achieves this in a similar way to how gpiolib works, by allowing PWM ranges to be requested dynamically (pwm_chip.base == -1) or starting at a given offset (pwm_chip.base >= 0). A chip specifies how many PWMs it controls using the npwm member. Each of the functions in the pwm_ops structure gets an additional argument that specified the PWM number (it can be converted to a per-chip index by subtracting the chip's base). The total maximum number of PWM devices is currently fixed to 1024 while the data is actually stored in a radix tree, thus saving resources if not all of them are used. Reviewed-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> [eric@eukrea.com: fix error handling in pwmchip_add] Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Sascha Hauer 提交于
This patch adds framework support for PWM (pulse width modulation) devices. The is a barebone PWM API already in the kernel under include/linux/pwm.h, but it does not allow for multiple drivers as each of them implements the pwm_*() functions. There are other PWM framework patches around from Bill Gatliff. Unlike his framework this one does not change the existing API for PWMs so that this framework can act as a drop in replacement for the existing API. Why another framework? Several people argue that there should not be another framework for PWMs but they should be integrated into one of the existing frameworks like led or hwmon. Unlike these frameworks the PWM framework is agnostic to the purpose of the PWM. In fact, a PWM can drive a LED, but this makes the LED framework a user of a PWM, like already done in leds-pwm.c. The gpio framework also is not suitable for PWMs. Every gpio could be turned into a PWM using timer based toggling, but on the other hand not every PWM hardware device can be turned into a gpio due to the lack of hardware capabilities. This patch does not try to improve the PWM API yet, this could be done in subsequent patches. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NKurt Van Dijck <kurt.van.dijck@eia.be> Reviewed-by: NArnd Bergmann <arnd@arndb.de> Reviewed-by: NMatthias Kaehlcke <matthias@kaehlcke.net> Reviewed-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> [thierry.reding@avionic-design.de: fixup typos, kerneldoc comments] Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 09 6月, 2012 1 次提交
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由 Linus Torvalds 提交于
This reverts commit 9e612a00. It incorrectly finds VGA connectors where none are attached, apparently not noticing that nothing replied to the EDID queries, and happily using the default EDID modes that have nothing to do with actual hardware. That in turn then causes X to fall down to the lowest common denominator, which is usually the default 1024x768 mode that is in the default EDID and pretty much anything supports). I'd suggest that if not relying on the HDP pin, the code should at least check whether it gets valid EDID data back, rather than just assume there's something on the VGA connector. Cc: Dave Airlie <airlied@linux.ie> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 08 6月, 2012 1 次提交
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由 Borislav Petkov 提交于
Correct mail address reference to a mail account which I actually read. Signed-off-by: NBorislav Petkov <bp@alien8.de> Cc: Peter Feuerer <peter@piie.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 07 6月, 2012 5 次提交
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由 Artem Bityutskiy 提交于
Commit "62f38455 UBI: modify ubi_wl_flush function to clear work queue for a lnum" takes the 'work_sem' semaphore in write mode for the entire loop, which is not very good because it will block other workers for potentially long time. We do not need to have it in write mode - read mode is enough, and we do not need to hole it over the entire loop. So this patch turns changes the locking: takes 'work_sem' in read mode and pushes it down to the loop. Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
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由 Artem Bityutskiy 提交于
Commit "aa44d1d3 UBI: remove Kconfig debugging option" broke UBI and it refuses to initialize if debugfs (CONFIG_DEBUG_FS) is disabled. I incorrectly assumed that debugfs files creation function will return success if debugfs is disabled, but they actually return -ENODEV. This patch fixes the issue. Reported-by: NPaul Parsons <lost.distance@yahoo.com> Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com> Tested-by: NPaul Parsons <lost.distance@yahoo.com>
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由 Adam Jackson 提交于
Cougar/Panther Point redefine the bits in SDEIIR pretty completely. This function is just debugging, but if we're debugging we probably want to be told accurate things instead of lies. I'm told Lynx Point changes this yet more, but I have no idea how... Note from Eugeni's review: "For the record and for future enabling efforts, for LPT, bits 28-31 and 1-14 are gone since CPT/PPT (e.g., those must be zero). And there is the bit 15 as a new addition, but we are not using it yet and probably won't be using in foreseeable future." Signed-off-by: NAdam Jackson <ajax@redhat.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35103Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Sagi Grimberg 提交于
1. Limit the max number of WQEs per QP reported when querying the device, so that ib_create_qp() will not fail for a QP size that the device claimed to support due to additional headroom WQEs being allocated. 2. Limit qp resources accepted for ib_create_qp() to the limits reported in ib_query_device(). In kernel space, make sure that the limits returned to the caller following qp creation also lie within the reported device limits. For userspace, report as before, and do adjustment in libmlx4 (so as not to break ABI). Signed-off-by: NJack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: NSagi Grimberg <sagig@mellanox.co.il> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NRoland Dreier <roland@purestorage.com>
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由 Jack Morgenstein 提交于
Commit 096335b3 ("mlx4_core: Allow dynamic MTU configuration for IB ports") modifies the port VL setting. This exposes a bug in mlx4_common_set_port(), where the VL cap value passed in (inside the command mailbox) is incorrectly zeroed-out: mlx4_SET_PORT modifies the VL_cap field (byte 3 of the mailbox). Since the SET_PORT command is paravirtualized on the master as well as on the slaves, mlx4_SET_PORT_wrapper() is invoked on the master. This calls mlx4_common_set_port() where mailbox byte 3 gets overwritten by code which should only set a single bit in that byte (for the reset qkey counter flag) -- but instead overwrites the entire byte. The result is that when running in SR-IOV mode, the VL_cap will be set to zero -- fix this. Signed-off-by: NJack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: NOr Gerlitz <ogerlitz@mellanox.com> Signed-off-by: NRoland Dreier <roland@purestorage.com>
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- 06 6月, 2012 2 次提交
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由 Eugeni Dodonov 提交于
This seems to come on Gigabyte H55M-S2V and was discovered through the https://bugs.freedesktop.org/show_bug.cgi?id=50381 debugging. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50381Signed-off-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@vger.kernel.org Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Daniel Vetter 提交于
Or at least plug another gapping hole. Apparrently hw desingers only moved the bit field, but did not bother ot re-enumerate the planes when adding support for a 3rd pipe. Discovered by i-g-t/flip_test. This may or may not fix the reference bugzilla, because that one smells like we have still larger fish to fry. v2: Fixup the impossible case to catch programming errors, noticed by Chris Wilson. References: https://bugs.freedesktop.org/show_bug.cgi?id=50069Acked-by: NChris Wilson <chris@chris-wilson.co.uk> Tested-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Eugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@vger.kernel.org Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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- 05 6月, 2012 13 次提交
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由 Alex Deucher 提交于
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
Locking mutex in different orders just screams for deadlocks, and some testing showed that it is actually quite easy to trigger them. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
- Properly set up the RBs - Properly set up the SPI - Properly set up gb_addr_config This should fix rendering issues on certain cards. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Rafał Miłecki 提交于
Many TVs and A/V receivers don't work with this bit set. Problem was confirmed using: Onkyo TX-SR605, Sony BRAVIA KDL-52X3500, Sony BRAVIA KDL-40S40xx. In theory this bit shouldn't affect audio engine when feeding it with data, however it seems it does. Driver fglrx doesn't set that bit in any of the above cases. This fixes a regression introduced by 3.5-rc1. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Rafał Miłecki 提交于
This is based on info released by AMD, should allow using audio in much more cases. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Cc: <stable@vger.kernel.org> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Alex Deucher 提交于
Call it in the asic startup callback on all asics. Previously r600 and rv770 called it in the startup and resume callbacks while all the other asics called it in the startup callback. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Seung-Woo Kim 提交于
Blending for graphic layer 0 of hdmi mixer was not set so video layer cannot be showed if graphic layer 0 is enabled. This patch fixes blending values to support blending between graphic layer 0 and video layer. Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Laurent Pinchart 提交于
The encoder get_crtc operation is called to retrieve a pointer to the CRTC the encoder is currenctly connected to, right after setting the encoder::crtc field to the new CRTC. The implementation of this operation returns the pointer to the new CRTC, which is then pointlessly compared to itself. As the operation is not mandatory, don't implement it. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Laurent Pinchart 提交于
GEM objects used by frame buffers must be referenced for the whole life of the frame buffer. Release the references in the frame buffer destructor instead of its constructor. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Laurent Pinchart 提交于
The exynos_drm_gem_dumb_map_offset() doesn't need to access any Exynos-specific GEM object fields, don't cast the GEM object. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Laurent Pinchart 提交于
DRIVER_BUS_PLATFORM is a bus type used internally in the DRM core, not a flag for the drm_driver::driver_features field. Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Ville Syrjälä 提交于
The NV12M/YUV420M formats are identical to the already existing standard NV12/YUV420 formats. The M variants will be removed, so convert the driver to use the standard names. Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: NInki Dae <inki.dae@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
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由 Daniel Vetter 提交于
Empirical evidence suggests that we need to: On at least one ivb machine when running the hangman i-g-t test, the rings don't properly initialize properly - the RING_START registers seems to be stuck at all zeros. Holding forcewake around this register init sequences makes chip reset reliable again. Note that this is not the first such issue: commit f01db988 Author: Sean Paul <seanpaul@chromium.org> Date: Fri Mar 16 12:43:22 2012 -0400 drm/i915: Add wait_for in init_ring_common added delay loops to make RING_START and RING_CTL initialization reliable on the blt ring at boot-up. So I guess it won't hurt if we do this unconditionally for all force_wake needing gpus. To avoid copy&pasting of the HAS_FORCE_WAKE check I've added a new intel_info bit for that. v2: Fixup missing commas in static struct and properly handling the error case in init_ring_common, both noticed by Jani Nikula. Cc: stable@vger.kernel.org Reported-and-tested-by: NYang Guang <guang.a.yang@intel.com> Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50522Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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