- 28 8月, 2011 2 次提交
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由 Will Deacon 提交于
cpu_v7_reset disables the MMU and then branches to the provided address. On Thumb-2 kernels, we should take care to clear the Thumb Exception enable bit in the System Control Register, otherwise this may wreak havok in the code to which we are branching (for example, an ARM kernel image via kexec). Reviewed-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
Commit 540b5738 ("ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state") mandates that the kernel should be entered in ARM state. If a Thumb-2 kernel kexecs a new kernel image, we need to ensure that we change state when branching to the new code. This patch replaces a mov pc, lr with a bx lr on Thumb-2 kernels so that we transition to ARM state if need be. Reviewed-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 8月, 2011 1 次提交
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由 Nick Bowler 提交于
It seems that an entry for the SP805 watchdog in the table of clocks was missing. This results in the sp805_wdt driver rejecting the device with the following errors: sp805-wdt mb:wdt: Clock not found sp805-wdt mb:wdt: Probe Failed!!! sp805-wdt: probe of mb:wdt failed with error -2 While not obviously stated in the hardware docs, the onboard SP810's "REFCLK" is connected to a 32.768KHz crystal, and this drives the watchdog. Add a struct clk and corresponding lookup entry for it. Signed-off-by: NNick Bowler <nbowler@elliptictech.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 8月, 2011 1 次提交
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由 Eric Bénard 提交于
I made some changes to the entry in the ARM Machine Registry after submission which was the wrong thing to do. This patch should help to fix this error. Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 8月, 2011 1 次提交
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由 Axel Lin 提交于
Since commit 8560a6cf "arm: Footbridge: Use common i8253 clockevent", ARCH_NETWINDER needs to select CLKEVT_I8253. This patch fixes below build error with "make netwinder_defconfig". LD .tmp_vmlinux1 arch/arm/mach-footbridge/built-in.o: In function `isa_timer_init': isa-rtc.c:(.init.text+0x12c8): undefined reference to `clockevent_i8253_init' isa-rtc.c:(.init.text+0x12d0): undefined reference to `i8253_clockevent' arch/arm/mach-footbridge/built-in.o:(.data+0x198): undefined reference to `i8253_clockevent' make: *** [.tmp_vmlinux1] Error 1 Signed-off-by: NAxel Lin <axel.lin@gmail.com> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 8月, 2011 4 次提交
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由 Catalin Marinas 提交于
This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible cache data corruption with hit-under-miss enabled). It sets the undocumented bit 31 in the auxiliary control register and the FI bit in the control register, thus disabling hit-under-miss without putting the processor into full low interrupt latency mode. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NSiarhei Siamashka <siarhei.siamashka@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Srinivas Kandagatla 提交于
This patch fixes L2 Cache size calculations for L2C-210, L2C-310 and PL310, by changing the L2X0_AUX_CTRL_WAY_SIZE_MASK from 2 bits to 3 bits. The Auxiliary Control Register for L2C-210, L2C-310 and PL310 has 3bits [19:17] for Way size, however the existing code only uses 2 bits to get this value. This results in incorrect cachesize calculations. It also results in performing operations on the whole cache when we erroneously decide that the range is big enough (due to l2x0_size being too small) and also prints incorrect cachesize. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: NWill Deacon <will.deacon@arm.com> Cc: stable@kernel.org Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Petr Štetiar 提交于
Fix the obvious error in board detection logic, because according to the TS's manual, the model is stored in the least three significant bits. For example the byte read on my ts-7300 is 0x23 and the detection then fails. Cc: Ryan Mallon <ryan@bluewatersys.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NPetr Štetiar <ynezz@true.cz> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Petr Štetiar 提交于
Cc: Ryan Mallon <ryan@bluewatersys.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NPetr Štetiar <ynezz@true.cz> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 8月, 2011 6 次提交
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由 Will Deacon 提交于
The current cache detection code does not check for an aliasing I-cache if the D-cache is found to be VIPT aliasing. This patch fixes the problem by always checking for an aliasing I-cache on v6 and later. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
The smp_twd clockevents driver currently enables the local timer PPI before the clockevents device is registered. This can lead to a kernel panic if a spurious timer interrupt is generated before registration has completed since the kernel will treat it as an IPI timer. This patch moves the clockevents device registration before the IRQ unmasking so that we can always handle timer interrupts once they can occur. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Will Deacon 提交于
The various reset routines in mach-realview rely on an FPGA to power-cycle the board after writing some magic runes to memory-mapped registers. This patch adds a dsb() following the writes, so that they become visible before we mdelay(1000) in the arch_reset code. Without this patch, the timeout would expire sporadically, causing the reset to fail. Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Mark Rutland 提交于
Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed {release,reserve}_pmu to take an enum arm_pmu_type as a parameter, but inconsistently named the parameter `type' or `device'. It would be nice if these were consistent. This patch makes use of enum arm_pmu_type consistent, always using `type'. Related printks are updated, explicitly mentioning `type' also. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 Mark Rutland 提交于
Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed the prototype of release_pmu, but missed the stub for when CONFIG_CPU_HAS_PMU is not selected by the platform. This patch changes the prototype of the stub, preventing possible build failures when CONFIG_CPU_HAS_PMU is not selected. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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由 David S. Miller 提交于
Reported-by: NPieter-Paul Giesberts <pieterpg@broadcom.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 8月, 2011 10 次提交
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由 Lennert Buytenhek 提交于
Instead of setting up a match interrupt for 'current_time + delta' on ->set_next_event(), program timer 0 to count down from 'delta - 1' and trigger an interrupt when it reaches zero. Signed-off-by: NLennert Buytenhek <buytenh@laptop.org> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@laptop.org> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Lennert Buytenhek 提交于
Currently, arch-mmp/time.c uses timer 0 both as a clocksource timer and as a clockevent timer, the latter by setting up a comparator interrupt to match on 'current_time + delta'. This is problematic if delta is small enough, as that can lead to 'current_time + delta' already being in the past when comparator setup has finished, leading to the requested event not triggering. As there is also a silicon issue that requires stopping a timer's counter while writing to one of its match registers, we'll switch to using two separate timers -- timer 0 as clockevent timer, which we'll start and stop on every invocation of ->set_next_event(), and timer 1 as clocksource timer, which will be free-running. This first patch enables timer 1 on boot, so that we can use it as clocksource timer. Signed-off-by: NLennert Buytenhek <buytenh@laptop.org> Acked-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Tanmay Upadhyay 提交于
Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Tanmay Upadhyay 提交于
Move definitions from mfp-gplugd.h to mfp-pxa168.h as they aren't gplugD specific. Signed-off-by: NTanmay Upadhyay <tanmay.upadhyay@einfochips.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Lennert Buytenhek 提交于
This got added in: commit ef6c8445 Author: Haojian Zhuang <haojian.zhuang@marvell.com> Date: Wed Nov 24 11:54:25 2010 +0800 ARM: pxa: add iwmmx support for PJ4 which does: - mrc p15, 0, r2, c15, c1, 0 - orr r2, r2, #0x3 @ enable access to CP0 and CP1 - mcr p15, 0, r2, c15, c1, 0 + @ enable access to CP0 and CP1 + XSC(mrc p15, 0, r2, c15, c1, 0) + XSC(orr r2, r2, #0x3) + XSC(mcr p15, 0, r2, c15, c1, 0) but then later does: - mrc p15, 0, r4, c15, c1, 0 - orr r4, r4, #0x3 @ enable access to CP0 and CP1 - mcr p15, 0, r4, c15, c1, 0 + @ enable access to CP0 and CP1 + XSC(mrc p15, 0, r4, c15, c1, 0) + XSC(orr r4, r4, #0xf) + XSC(mcr p15, 0, r4, c15, c1, 0) Signed-off-by: NLennert Buytenhek <buytenh@laptop.org> Acked-by Haojian <haojian.zhuang@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Andy Lutomirski 提交于
There are three choices: vsyscall=native: Vsyscalls are native code that issues the corresponding syscalls. vsyscall=emulate (default): Vsyscalls are emulated by instruction fault traps, tested in the bad_area path. The actual contents of the vsyscall page is the same as the vsyscall=native case except that it's marked NX. This way programs that make assumptions about what the code in the page does will not be confused when they read that code. vsyscall=none: Trying to execute a vsyscall will segfault. Signed-off-by: NAndy Lutomirski <luto@mit.edu> Link: http://lkml.kernel.org/r/8449fb3abf89851fd6b2260972666a6f82542284.1312988155.git.luto@mit.eduSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Andy Lutomirski 提交于
getcpu is available as a vdso entry and an emulated vsyscall. Programs that for some reason don't want to use the vdso should still be able to call getcpu without relying on the slow emulated vsyscall. It costs almost nothing to expose it as a real syscall. We also need this for the following patch in vsyscall=native mode. Signed-off-by: NAndy Lutomirski <luto@mit.edu> Link: http://lkml.kernel.org/r/6b19f55bdb06a0c32c2fa6dba9b6f222e1fde999.1312988155.git.luto@mit.eduSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Andy Lutomirski 提交于
As of commit 98d0ac38 Author: Andy Lutomirski <luto@mit.edu> Date: Thu Jul 14 06:47:22 2011 -0400 x86-64: Move vread_tsc and vread_hpet into the vDSO user code no longer directly calls into code in arch/x86/kernel/, so we don't need compile flag hacks to make it safe. All vdso code is in the vdso directory now. Signed-off-by: NAndy Lutomirski <luto@mit.edu> Link: http://lkml.kernel.org/r/835cd05a4c7740544d09723d6ba48f4406f9826c.1312988155.git.luto@mit.eduSigned-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Linus Walleij 提交于
The PCI nanoengine driver in the SA1100 machine probably has not been building for some time. It probably dragged hardware.h in implicitly and now it doesn't anymore. After this an SA1100 build selecting all system variants will build successfully. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 8月, 2011 10 次提交
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由 Benjamin Herrenschmidt 提交于
Brown paper bag day, previous commit wouldn't work very well with modules enabled. Move the exports into the ifdef. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Hemant Pedanekar 提交于
If CONFIG_OMAP_32K_TIMER is not selected and dmtimer is used as clocksource, the timer stops counting once overflow occurs as it was not set in autoreload mode. This results into timekeeping failure: for example, 'sleep 1' at the shell after the timer counter overflow would hang. This patch sets up autoreload when starting the clocksource timer which fixes the above issue. Signed-off-by: NHemant Pedanekar <hemantp@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Johan Hovold 提交于
Since 7203f8a4 (arm: mach-omap2: remove NULL board_mux from board files) NULL board_mux is defined in mux.h. Signed-off-by: NJohan Hovold <jhovold@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Thomas Meyer 提交于
Use kstrdup rather than duplicating its implementation The semantic patch that makes this output is available in scripts/coccinelle/api/kstrdup.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/Signed-off-by: NThomas Meyer <thomas@m3y3r.de> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Maxin John 提交于
The pointer "va" returned from "phys_to_virt(pa)" is never used in "sgtable_fill_kmalloc()".So,it is safe to remove this set-but-unused variable. Signed-off-by: NMaxin B. John <maxin.john@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Oleg Drokin 提交于
Machine database already updated: http://www.arm.linux.org.uk/developer/machines/list.php?id=3284Signed-off-by: NOleg Drokin <green@linuxhacker.ru> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Raphaël Assénat 提交于
Add missing definitions for the AM3505/3517 UART4 such as DMAs, INTs and base address. Signed-of-by: NRaphael Assenat <raph@8d.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Russell King 提交于
This has now been well tested, and several platforms are now selecting this directly. It's time to drop its experimental status. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Paul Walmsley 提交于
Builds for multi-OMAP2 (e.g., OMAP2420 with OMAP2430) with CONFIG_ARCH_OMAP4=n fail with the following errors: arch/arm/mach-omap2/built-in.o: In function `_enable_module': arch/arm/mach-omap2/omap_hwmod.c:701: undefined reference to `omap4_cminst_module_enable' arch/arm/mach-omap2/built-in.o: In function `_disable_module': arch/arm/mach-omap2/omap_hwmod.c:726: undefined reference to `omap4_cminst_module_disable' arch/arm/mach-omap2/built-in.o: In function `_wait_target_disable': arch/arm/mach-omap2/omap_hwmod.c:1179: undefined reference to `omap4_cminst_wait_module_idle' This is probably due to the preprocessor directives in arch/arm/plat-omap/include/plat/cpu.h that convert some cpu_is_omap*() expressions from preprocessor directives into something that is only resolvable during runtime, if multiple OMAP2 build targets are selected. Thanks to Tony Lindgren <tony@atomide.com> for reporting. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
Commit b22f954b (OMAP4: Move common twl6030 configuration to twl-common) caused compile failures for code for OMAP arch which is not selected by the config. Fixes issues like: With CONFIG_ARCH_OMAP3=y and CONFIG_ARCH_OMAP4=n, I'm getting this: arch/arm/mach-omap2/built-in.o:(.data+0xf99c): undefined reference to `omap4430_phy_init' arch/arm/mach-omap2/built-in.o:(.data+0xf9a0): undefined reference to `omap4430_phy_exit' arch/arm/mach-omap2/built-in.o:(.data+0xf9a4): undefined reference to `omap4430_phy_power' arch/arm/mach-omap2/built-in.o:(.data+0xf9a8): undefined reference to `omap4430_phy_set_clk' arch/arm/mach-omap2/built-in.o:(.data+0xf9ac): undefined reference to `omap4430_phy_suspend' Fix the problem by moving the code to ifdef sections for omap3 and omap4. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 8月, 2011 5 次提交
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由 Youquan Song 提交于
Add support to Romely-EP SandyBridge. Signed-off-by: NYouquan Song <youquan.song@intel.com> Signed-off-by: NAnhua Xu <anhua.xu@intel.com> Signed-off-by: NLin Ming <ming.m.lin@intel.com> Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1312264895-2010-1-git-send-email-youquan.song@intel.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
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由 Dave Martin 提交于
With the UM_SIGNAL alignment fault mode, no siginfo structure is passed to userspace. POSIX specifies how siginfo_t should be populated for alignment faults, so this patch does just that: * si_signo = SIGBUS * si_code = BUS_ADRALN * si_addr = misaligned data address at which access was attempted Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NKirill A. Shutemov <kirill@shutemov.name> Reviewed-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Dave Martin 提交于
Currently, it's possible to set the kernel to ignore alignment faults when changing the alignment fault handling mode at runtime via /proc/sys/alignment, even though this is undesirable on ARMv6 and above, where it can result in infinite spins where an un-fixed- up instruction repeatedly faults. In addition, the kernel clobbers any alignment mode specified on the command-line if running on ARMv6 or above. This patch factors out the necessary safety check into a couple of new helper functions, and checks and modifies the fault handling mode as appropriate on boot and on writes to /proc/cpu/alignment. Prior to ARMv6, the behaviour is unchanged. For ARMv6 and above, the behaviour changes as follows: * Attempting to ignore faults on ARMv6 results in the mode being forced to UM_FIXUP instead. A warning is printed if this happened as a result of a write to /proc/cpu/alignment. The user's UM_WARN bit (if present) is still honoured. * An alignment= argument from the kernel command-line is now honoured, except that the kernel will modify the specified mode as described above. This is allows modes such as UM_SIGNAL and UM_WARN to be active immediately from boot, which is useful for debugging purposes. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Jamie Iles 提交于
poison_init_mem() used a loop of: while ((count = count - 4)) which has 2 problems - an off by one error so that we do one less word than we should, and the other is that if count == 0 then we loop forever and poison too much. On a platform with HAVE_TCM=y but nothing in the TCM's, this caused corruption and the platform failed to boot. Acked-by: NStephen Boyd <sboyd@codeaurora.org> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Brian S. Julin 提交于
The file mm/proc-arm946.S contains a typo and is missing a structure member in __arm946_proc_info. The former prevents compilation and the latter causes problems during boot. It is likely this file was manually copied from a similar file and not tested, then later updates to the *_proc_info structures missed this file. This patch will apply (with offset) with or without the recent macro unification work that has been done in this directory. This was verified against linux-next/stable last week. See arm-linux-kernel thread: http://lists.arm.linux.org.uk/lurker/message/20110718.103237.0106d468.en.htmlSigned-off-by: NBrian S. Julin <bri@abrij.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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