- 10 8月, 2009 1 次提交
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由 Tony Lindgren 提交于
There's no need to keep these defines limited in the ifdef block for mach-omap2. It will just cause problems testing for the CPU revision in the common code, like the next patch does for the DMA errata. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 8月, 2009 1 次提交
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由 Tero Kristo 提交于
It was possible for an unhandled interrupt to occur if there was incoming serial traffic during wakeup from suspend. This was caused by the code in arch-arm/mach-omap2/serial.c keeping interrupt enabled all the time, but not acking its interrupts. Applies on top of PM branch. Use the PM begin/end hooks to ensure that the "serial idle" interrupts are disabled during the suspend path. Also, since begin/end hooks are now used, use the suspend_state that is passed in the begin hook instead of the enter hook as per the platform_suspend_ops docs. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 25 7月, 2009 3 次提交
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由 Paul Walmsley 提交于
Some OMAP2/3 hardware modules have CM_IDLEST attributes that are not handled by the current omap2_wait_clock_ready() code. In preparation for patches that fix the unusual devices, rename the function omap2_wait_clock_ready() to omap2_wait_module_ready() and split it into three parts: 1. A clkops-specific companion clock return function (by default, omap2_clk_dflt_find_companion()) 2. A clkops-specific CM_IDLEST register address and bit shift return function (by default, omap2_clk_dflt_find_idlest()) 3. Code to wait for the CM to indicate that the module is ready (omap2_cm_wait_idlest()) Clocks can now specify their own custom find_companion() and find_idlest() functions; used in subsequent patches. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jean Pihet 提交于
This patches ensures the MUX settings are correct for the SDRC CKE signals to SDRAM. This allows the self-refresh to work when 2 chip-selects are in use. A warning is thrown away in case the initial muxing is incorrect, in order to track faulty or old-dated bootloaders. Note: The CONFIG_OMAP_MUX and CONFIG_OMAP_MUX_WARNINGS options must be enabled for the mux code to have effect. Signed-off-by: NJean Pihet <jpihet@mvista.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jean Pihet 提交于
Some OMAP3 boards (Beagle Cx, Overo, RX51, Pandora) have 2 SDRAM parts connected to the SDRC. This patch adds the following: - add a new argument of type omap_sdrc_params struct* to omap2_init_common_hw and omap2_sdrc_init for the 2nd CS params - adapted the OMAP boards files to the new prototype of omap2_init_common_hw - add the SDRC 2nd CS registers offsets defines - adapt the sram sleep code to configure the SDRC for the 2nd CS Note: If the 2nd param to omap2_init_common_hw is NULL, then the parameters are not programmed into the SDRC CS1 registers Tested on 3430 SDP and Beagleboard rev C2 and B5, with suspend/resume and frequency changes (cpufreq). Signed-off-by: NJean Pihet <jpihet@mvista.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 23 6月, 2009 3 次提交
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由 Tony Lindgren 提交于
Otherwise IOMEM calculations can fail. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kalle Jokiniemi 提交于
This patch enables MStandby smart-idle mode, autoidle smartidle mode, and the autoidle bit for DMA4_OCP_SYSCONFIG. Signed-off-by: NKalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@ti.deeprootsystems.com>
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由 Kevin Hilman 提交于
The omap_type() function is added and returns the DEVICETYPE field of the CONTROL_STATUS register. The result can be used for conditional code based on whether device is GP (general purpose), EMU or HS (high security). Also move the type defines so omap1 code compile does not require ifdefs for sections using these defines. This code is needed for the following fix to set the SRAM size correctly for HS omaps. Also at least PM and watchdog code will need this function. Signed-off-by: NKevin Hilman <khilman@ti.deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 6月, 2009 3 次提交
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由 Tero Kristo 提交于
Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control. Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
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由 Paul Walmsley 提交于
Program the SDRC_MR_0 register as well during SDRC clock changes. This register allows selection of the memory CAS latency. Some SDRAM chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency at lower clock rates. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Paul Walmsley 提交于
When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2 divider, add a short delay before returning to SDRAM to allow the SDRC time to stabilize. Without this delay, the system is prone to random panics upon re-entering SDRAM. This time delay varies based on MPU frequency. At 500MHz MPU frequency at room temperature, 64 loops seems to work okay; so add another 32 loops for environmental and process variation. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 09 6月, 2009 2 次提交
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由 Santosh Shilimkar 提交于
This patch adds SMP platform specific parts for local(mpu) timer support for OMAP4430 platform. Each Cortex-a9 core has it's own local timer in the MPU domain. These timers are not in wakeup domain. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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由 Santosh Shilimkar 提交于
This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430 SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
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- 29 5月, 2009 15 次提交
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由 Santosh Shilimkar 提交于
This patch adds the support for OMAP4. The platform and machine specific headers and sources updated for OMAP4430 SDP platform. OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Based on an earlier patches by Stanley.Miao <stanley.miao@windriver.com> and Nishant Kamat <nskamat@ti.com>. Note that at the ads7846 support still needs support for vaux_control for the touchscreen to work. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
These are not being used right now, and the processor specific defines should be used instead by any code accessing these registers. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Andrew de Quincey 提交于
Make 770 LCD work by adding clk_add_alias(). Also remove the old unused functions. Note that the clk_add_alias() could probably be moved to arch/arm/clkdev.c later on. Cc: linux-fbdev-devel@lists.sourceforge.net Signed-off-by: NAndrew de Quincey <adq_dvb@lidskialf.net> Signed-off-by: NImre Deak <imre.deak@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com
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由 Tony Lindgren 提交于
Convert the board-rx51 smc91x code to be generic and make the boards to use it. This allows future recalculation of the timings when the source clock gets scaled. Also correct the rx51 interrupt to be IORESOURCE_IRQ_HIGHLEVEL. Thanks to Paul Walmsley <paul@pwsan.com> for better GPMC timing calculations. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Juha Yrjola 提交于
Add generic onenand support when connected to GPMC and make the boards to use it. The patch has been modified to make it more generic to support all the boards with GPMC. The patch also remove unused prototype for omap2_onenand_rephase(void). Note that board-apollon.c is currently using the MTD_ONENAND_GENERIC and setting the GPMC timings in the bootloader. Setting the GPMC timings in the bootloader will not allow supporting frequency scaling for the onenand source clock. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Santosh Shilimkar 提交于
Original OMAP DMA chaining design had chain_id as one of the callback parameters. Patch 538528de changed it to use logical channel instead. Correct the naming for callback to also use logical channel number instead of the chain_id. More details are on this email thread: http://marc.info/?l=linux-omap&m=122961071931459&w=2Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
Implement transparent copy and constant fill features for OMAP2/3. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter 'p2' De Schrijver 提交于
Otherwise, bootloaders may leave MUSB in a state which prevents retention. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
Add D2D clocks (modem_fck, sad2d_ick, mad2d_ick) to clock framework and ensure that auto-idle bits are set for these clocks during PRCM init. Also add omap3_d2d_idle() function called durint PRCM setup which ensures D2D pins are MUX'd correctly to enable retention for standalone (no-modem) devices. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
This patch allows the UART clocks to be disabled when the OMAP UARTs are inactive, thus permitting the chip to hit retention in idle. After the expiration of an activity timer, each UART is allowed to disable its clocks so the system can enter retention. The activity timer is (re)activated on any UART interrupt, UART wake event or any IO pad wakeup. The actual disable of the UART clocks is done in the 'prepare_idle' hook called from the OMAP idle loop. While the activity timer is active, the smart-idle mode of the UART is also disabled. This is due to a "feature" of the UART module that after a UART wakeup, the smart-idle mode may be entered before the UART has communicated the interrupt, or upon TX, an idle mode may be entered before the TX FIFOs are emptied. Upon suspend, the 'prepare_suspend' hook cancels any pending activity timers and allows the clocks to be disabled immediately. In addition, upon disabling clocks the UART state is saved in case of an off-mode transition while clocks are off. Special thanks to Tero Kristo for the initial ideas and first versions of UART idle support, and to Jouni Hogander for extra testing and bugfixes. Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810) Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Jouni Hogander 提交于
Add common omap2/3 function to check wether there is irq pending. Switch to use it in omap2 pm code instead of its own. Signed-off-by: NJouni Hogander <jouni.hogander@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
This patch is to sync the core linux-omap PM code with mainline. This code has evolved and been used for a while the linux-omap tree, but the attempt here is to finally get this into mainline. Following this will be a series of patches from the 'PM branch' of the linux-omap tree to add full PM hardware support from the linux-omap tree. Much of this PM core code was written by Jouni Hogander with significant contributions from Paul Walmsley as well as many others from Nokia, Texas Instruments and linux-omap community. Signed-off-by: NJouni Hogander <jouni.hogander@nokia.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 26 5月, 2009 11 次提交
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由 Tony Lindgren 提交于
Processor specific macros should be used instead. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
It's currently unused, and processor specific defines should be used instead. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Move define of OMAP2_VA_IC_BASE to be local to entry-macro.S Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Remove OMAP_PRM_REGADDR and use processor specific defines instead. Also fold in a patch from Kevin Hilman to add _OFFSET #defines for the PRCM registers to be used with the prm_[read|write]_* macros. These are used extensively in the forthcoming OMAP PM support. Also remove now unused OMAP2_PRM_BASE. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Use processor specific defines instead. As an extra bonus, this patch fixes the problem of CONFIG_DEBUG_SPINLOCK calling sched_clock before we have things initialized: http://patchwork.kernel.org/patch/15810/Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Mans Rullgard 提交于
This increases VMALLOC_END to 0x18000000, making room for 256MB RAM with the default 128MB vmalloc region. Note that after this patch there's no longer a hole between vmalloc space and the beginning of IO space on omap2 as the first virtual mapping starts at 0xd8000000. Also fold in a related change from Paul Walmsley <paul@pwsan.com> to change the OMAP2_SRAM addresses accordingly. Signed-off-by: NMans Rullgard <mans@mansr.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Processor specific macros should be used instead. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
It's currently unused, and processor specific defines should be used instead. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Move define of OMAP2_VA_IC_BASE to be local to entry-macro.S Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Remove OMAP_PRM_REGADDR and use processor specific defines instead. Also fold in a patch from Kevin Hilman to add _OFFSET #defines for the PRCM registers to be used with the prm_[read|write]_* macros. These are used extensively in the forthcoming OMAP PM support. Also remove now unused OMAP2_PRM_BASE. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Use processor specific defines instead. As an extra bonus, this patch fixes the problem of CONFIG_DEBUG_SPINLOCK calling sched_clock before we have things initialized: http://patchwork.kernel.org/patch/15810/Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 19 5月, 2009 1 次提交
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由 Hiroshi DOYU 提交于
This patch provides a device drivers, which has a omap iommu, with address mapping APIs between device virtual address(iommu), physical address and MPU virtual address. There are 4 possible patterns for iommu virtual address(iova/da) mapping. |iova/ mapping iommu_ page | da pa va (d)-(p)-(v) function type --------------------------------------------------------------------------- 1 | c c c 1 - 1 - 1 _kmap() / _kunmap() s 2 | c c,a c 1 - 1 - 1 _kmalloc()/ _kfree() s 3 | c d c 1 - n - 1 _vmap() / _vunmap() s 4 | c d,a c 1 - n - 1 _vmalloc()/ _vfree() n* 'iova': device iommu virtual address 'da': alias of 'iova' 'pa': physical address 'va': mpu virtual address 'c': contiguous memory area 'd': dicontiguous memory area 'a': anonymous memory allocation '()': optional feature 'n': a normal page(4KB) size is used. 's': multiple iommu superpage(16MB, 1MB, 64KB, 4KB) size is used. '*': not yet, but feasible. Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
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