1. 07 1月, 2017 2 次提交
  2. 06 1月, 2017 1 次提交
  3. 05 1月, 2017 9 次提交
  4. 04 1月, 2017 1 次提交
  5. 03 1月, 2017 5 次提交
  6. 30 12月, 2016 7 次提交
  7. 29 12月, 2016 12 次提交
  8. 28 12月, 2016 3 次提交
    • F
      net: stmmac: Fix race between stmmac_drv_probe and stmmac_open · 57016590
      Florian Fainelli 提交于
      There is currently a small window during which the network device registered by
      stmmac can be made visible, yet all resources, including and clock and MDIO bus
      have not had a chance to be set up, this can lead to the following error to
      occur:
      
      [  473.919358] stmmaceth 0000:01:00.0 (unnamed net_device) (uninitialized):
                      stmmac_dvr_probe: warning: cannot get CSR clock
      [  473.919382] stmmaceth 0000:01:00.0: no reset control found
      [  473.919412] stmmac - user ID: 0x10, Synopsys ID: 0x42
      [  473.919429] stmmaceth 0000:01:00.0: DMA HW capability register supported
      [  473.919436] stmmaceth 0000:01:00.0: RX Checksum Offload Engine supported
      [  473.919443] stmmaceth 0000:01:00.0: TX Checksum insertion supported
      [  473.919451] stmmaceth 0000:01:00.0 (unnamed net_device) (uninitialized):
                      Enable RX Mitigation via HW Watchdog Timer
      [  473.921395] libphy: PHY stmmac-1:00 not found
      [  473.921417] stmmaceth 0000:01:00.0 eth0: Could not attach to PHY
      [  473.921427] stmmaceth 0000:01:00.0 eth0: stmmac_open: Cannot attach to
                      PHY (error: -19)
      [  473.959710] libphy: stmmac: probed
      [  473.959724] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 0 IRQ POLL
                      (stmmac-1:00) active
      [  473.959728] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 1 IRQ POLL
                      (stmmac-1:01)
      [  473.959731] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 2 IRQ POLL
                      (stmmac-1:02)
      [  473.959734] stmmaceth 0000:01:00.0 eth0: PHY ID 01410cc2 at 3 IRQ POLL
                      (stmmac-1:03)
      
      Fix this by making sure that register_netdev() is the last thing being done,
      which guarantees that the clock and the MDIO bus are available.
      
      Fixes: 4bfcbd7a ("stmmac: Move the mdio_register/_unregister in probe/remove")
      Reported-by: NKweh, Hock Leong <hock.leong.kweh@intel.com>
      Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      57016590
    • K
      net: stmmac: fix incorrect bit set in gmac4 mdio addr register · 5799fc90
      Kweh, Hock Leong 提交于
      Fixing the gmac4 mdio write access to use MII_GMAC4_WRITE only instead of
      OR together with MII_WRITE.
      Signed-off-by: NKweh, Hock Leong <hock.leong.kweh@intel.com>
      Acked-By: NJoao Pinto <jpinto@synopsys.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5799fc90
    • C
      r8169: add support for RTL8168 series add-on card. · 610c9087
      Chun-Hao Lin 提交于
      This chip is the same as RTL8168, but its device id is 0x8161.
      Signed-off-by: NChun-Hao Lin <hau@realtek.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      610c9087