Signed-off-by: NMyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

- Fixed: 12bit precision is lost at suspend/resume
- Updated: use pm_dev_ops
Signed-off-by: NMyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In S5PV210/S5PC110/EXYNOS4, ADCMUX channel selection uses ADCMUX
register, not ADCCON register. This patch corrects the behavior of
SAMSUNG-ADC for such CPUs.
Signed-off-by: NMyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch allows the Samsung ADC driver to enable VDD regulator
at probe and resume and to disable at exit and suspend.
In a platform where ADC's VDD regulator is not "always-on", this
control is required although this patch does not provide fine-grained
power control (turning on the regulator only when being accessed).

However, if VDD regulator ("vdd" for the adc device) is not provided,
the regulator control will not be activated because there are platforms
that do not provide regulator for ADC device.

arch_initcall has been modified to module_init in order to allow
regulators to be available at probe.
Signed-off-by: NMyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The PLL restore routine supports waiting pll locking. If PLL is
enabled in restoring sequence, it should wait until PLL is locked.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds save/restore values for Power Control Register and
Diagnostic Register for PM.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

We need to balance between set and check S5P_CENTRAL_SEQ_CONFIGURATION
register in syscore_ops suspend/resume function when failure in enter
suspend mode. Moved this register setting for PM for the purpose of balancing.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since early wakeup can be handled in pm so we don't need masking
interrupts of external GIC. When the early wakeup interrupt happens,
PMU(Power Management Unit) ignores WFI instruction. This means that
PC(Program Counter) passed without any changes. This patch can handle
that case by early wakeup interrupt.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
[kgene.kim@samsung.com: fixed return of exynos4_cpu_suspend()]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

PMU(Power Management Unit) configuraion for S2RAM(SLEEP) is removed
and using function which provided by PMU support code to configure
PMU register.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

EXYNOS4 supports 3 different system level power down mode by PMU (Power
Management Unit). Each power down mode need to configure many PMU registers
with different value. This patch supports function to configure PMU registers
with pre-defined values in PMU code. This function may be used by PM code and
AFTR/LPA support driver.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds spdif to the machine supported device list for
SMDKV310.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Acked-by: NJassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

To insert the code for power on/off with pmu control to support hotplug in/out core1
As for hotplug.c, the codes for core1 to be hotplug in/out is inserted.
As for regs-pmu.h, S5P_CORE_LOCAL_PWR_EN is defined.
As for platsmp.c, the codes for core1 to be powered on is inserted.
Signed-off-by: NJungHi Min <junghi.min@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds chained IRQ enter/exit functions to uart
interrupt handler in order to function correctly on primary
controllers with different methods of flow control.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

External GIC cannot support PPI (Private Peripheral Interrupt) for
ARM private timers. Thus MCT should be selected as clock event timers
by default.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For full support of power modes, this patch adds implementation
external GIC on EXYNOS4.

External GIC of Exynos4 cannot support register banking so
several interrupt related code for CPU1 should be different
from that of CPU0.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since Samsung EXYNOS4210 cannot support register banking in GIC,
so needs to update CPU interface base address.
The 'gic_chip_data' is used for it, this patch moves gic_chip_data
structure declaraton to arch/arm/include/asm/hardware/gic.h to use
it.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

IRQ_MCT_L1 is connected directly to GIC in external GIC mapping,
while in internal GIC mapping, it is connected to GIC through
interrupt combiner. Therfore the affinity for mct1 event timer
interrupt should be changed through IRQ_MCT_L1.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

To support external GIC needs to update mapping of interrupt number.
This patch modifies it for external GIC and accordingly removes
the unused code.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds external GIC io memory mapping
to support external GIC on EXYNOS4.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adds device definition to enable SATA on SMDKV310
Signed-off-by: NInderpal Singh <inderpal.s@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds definitions to enable support for qt602240 touch screen
driver for Universal C210 board.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds definitions to enable support for MCS Touchkey driver
for Universal C210 board.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds definitions to enable support for s5p-fimc driver for
Universal C210 board.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Basically, the SAMSUNG_DEV_PWM is required to use s5p-time.c for HRT.

Reported-by: Marek Szyprowski<m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The patch "ARM: SAMSUNG: Add support for pre-sleep/post-restore gpio
control" broke compilation on Exynos4 platform with power management
enabled. This patch adds missing stubs that fixes this issue.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add a callback so that per-arch can do pre-sleep and post-resume
gpio configuration so that for the S3C64XX, the GPIO configuration
is restored before the sleep mode is cleared.

For the S3C64XX case, it means that the GPIOs get set back to normal
operation after the restore code puts the original configurations
back in after the
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Any interrupts based off either of the onboard VICs cannot be resumed
from any more as it seems set_irq_wake() is now checking the error code
returned from the low level handlers and not setting the wake-state on
the interrupt if this fails.

Ensure that we make the interrupts we can resume from available on the
VIC and then do a pre-sleep mask of all the VIC interrupts as the wakeup
is handled by a seperate block.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

If mini2440_init() is in __init, mini2440_parse_features() should also
be in __init. Fixes:

(.text+0x9adc): Section mismatch in reference from the function mini2440_parse_features.clone.0() to the
(unknown reference) .init.data:(unknown)
The function mini2440_parse_features.clone.0() references the (unknown reference) __initdata (unknown).
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: Michel Pollet <buserror@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit bb072c3c (ARM / Samsung: Use struct syscore_ops for "core" power
management) turned s3c2410_dma_resume_chan() from int to void. So, drop
the actual return values, too. Fixes:

arch/arm/plat-s3c24xx/dma.c: In function 's3c2410_dma_resume_chan':
arch/arm/plat-s3c24xx/dma.c:1238:3: warning: 'return' with a value, in function returning void
arch/arm/plat-s3c24xx/dma.c:1250:2: warning: 'return' with a value, in function returning void
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Acked-by: NRafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit 8970ef47 (S3C24XX: Remove hardware specific registers from DMA
calls) removed the parameter dcon in s3c2410_dma_config() and calculates
it on its own. So the debug-output for the old parameter can go, too.
Fixes:

arch/arm/plat-s3c24xx/dma.c: In function 's3c2410_dma_config':
arch/arm/plat-s3c24xx/dma.c:1030:2: warning: 'dcon' is used uninitialized in this function
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

To get hundredths of MHz the rate needs to be divided by 10'000.
Here is an example:
 twd_timer_rate = 123456789
 Before the patch:
    twd_timer_rate / 1000000 = 123
    (twd_timer_rate / 1000000) % 100 = 23
    Result: 123.23MHz.
 After being fixed:
    twd_timer_rate / 1000000 = 123
    (twd_timer_rate / 10000) % 100 = 45
    Result: 123.45MHz.
Signed-off-by: NVitaly Kuzmichev <vkuzmichev@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The l2x0_disable function attempts to writel with the l2x0_lock held.
This results in deadlock when the writel contains an outer_sync call
for the platform since the l2x0_lock is already held by the disable
function. A further problem is that disabling the L2 without flushing it
first can lead to the spin_lock operation becoming visible after the
spin_unlock, causing any subsequent L2 maintenance to deadlock.

This patch replaces the writel with a call to writel_relaxed in the
disabling code and adds a flush before disabling in the control
register, preventing livelock from occurring.
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NWill Deacon <will.deacon@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

It was discovered by Roberto Bergo, that RTS/DTR signals are inverted after
the boot, because it was causing him problems with hardware controlled modem
connected on ttyAM0. Todd Valentic came with this patch for the issue.

Discussion: http://tech.groups.yahoo.com/group/ts-7000/message/20259

Comments from Petr Štetiar:

 Sorry, but forget to add Acked-by[1]:

 1. https://patchwork.kernel.org/patch/873052/

Cc: Ryan Mallon <ryan@bluewatersys.com>
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NTodd Valentic <todd.valentic@sri.com>
Tested-by: NRoberto Bergo <roberto.bergo@robson.it>
Signed-off-by: NPetr Štetiar <ynezz@true.cz>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This platform has not been converted to 'struct irq_data' when the big
pile was done and fails to compile nowadays. Tested on a JayPC-Tablet.
Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
Acked-by: NAlexey Charkov <alchark@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Set up a correct I2C bus controller variant name for Exynos4.
Without this change the I2C bus driver fails to acquire its
clocks.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

S5PC100 Compilation fails without this patch
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

tx_st_done is required for checking the transmission status of SPI
channels with different fifo levels
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The section mismatch in headsmp.S made hotplug stop working after the
first instance of suspend-to-RAM and its wakeup.
Signed-off-by: NMyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch fixes following.

<6>[    0.000000] sched_clock: 32 bits at 33MHz, ...
<6>[  128.651309] Calibrating delay loop...

There is a big jump. The reason is that PWM Timer which
is for HRTimer was used before its initialization.

So this patch changes its order and following is kernel
boot log message after this.

<6>[    0.000000] sched_clock: 32 bits at 33MHz, ...
<6>[    0.000088] Calibrating delay loop...
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

There has been no #ifndef - #define - #endif protection for this
header file.
Signed-off-by: NMyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>