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  1. 09 2月, 2006 1 次提交
  3. 08 2月, 2006 4 次提交
  5. 07 2月, 2006 1 次提交
    • R
      [IA64-SGI] Shub2 BTE address fix · 913e4a75
      由 Russ Anderson 提交于 
      After converting the cpu physical address to shub2 physical
addressing, the address was run through TO_PHYS() which
clobbered a high node offset bit causing the BTE to fail
on shub2 nodes with large memory.  This fix corrects
that problem.

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: NTony Luck <tony.luck@intel.com>
      913e4a75
  7. 04 2月, 2006 1 次提交
    • Z
      [PATCH] Export cpu topology in sysfs · 69dcc991
      由 Zhang, Yanmin 提交于 
      The patch implements cpu topology exportation by sysfs.

Items (attributes) are similar to /proc/cpuinfo.

1) /sys/devices/system/cpu/cpuX/topology/physical_package_id:
	represent the physical package id of  cpu X;
2) /sys/devices/system/cpu/cpuX/topology/core_id:
	represent the cpu core id to cpu X;
3) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
	represent the thread siblings to cpu X in the same core;
4) /sys/devices/system/cpu/cpuX/topology/core_siblings:
	represent the thread siblings to cpu X in the same physical package;

To implement it in an architecture-neutral way, a new source file,
driver/base/topology.c, is to export the 5 attributes.

If one architecture wants to support this feature, it just needs to
implement 4 defines, typically in file include/asm-XXX/topology.h.
The 4 defines are:
#define topology_physical_package_id(cpu)
#define topology_core_id(cpu)
#define topology_thread_siblings(cpu)
#define topology_core_siblings(cpu)

The type of **_id is int.
The type of siblings is cpumask_t.

To be consistent on all architectures, the 4 attributes should have
deafult values if their values are unavailable. Below is the rule.

1) physical_package_id: If cpu has no physical package id, -1 is the
default value.

2) core_id: If cpu doesn't support multi-core, its core id is 0.

3) thread_siblings: Just include itself, if the cpu doesn't support
HT/multi-thread.

4) core_siblings: Just include itself, if the cpu doesn't support
multi-core and HT/Multi-thread.

So be careful when declaring the 4 defines in include/asm-XXX/topology.h.

If an attribute isn't defined on an architecture, it won't be exported.

Thank Nathan, Greg, Andi, Paul and Venki.

The patch provides defines for i386/x86_64/ia64.
Signed-off-by: NZhang, Yanmin <yanmin.zhang@intel.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      69dcc991
  9. 03 2月, 2006 6 次提交
  11. 27 1月, 2006 4 次提交
  13. 25 1月, 2006 4 次提交
  15. 20 1月, 2006 3 次提交
  17. 19 1月, 2006 1 次提交
  19. 18 1月, 2006 3 次提交
  21. 17 1月, 2006 4 次提交
  23. 15 1月, 2006 2 次提交
  25. 14 1月, 2006 6 次提交
    • A
      [IA64] build broken for ia64 simserial.c · d50f5c5c
      由 Andreas Schwab 提交于 
      TTY layer buffering revamp broke ia64 in commit
 33f0f88f

  CC      arch/ia64/hp/sim/simserial.o
arch/ia64/hp/sim/simserial.c: In function `receive_chars':
arch/ia64/hp/sim/simserial.c:170: error: structure has no member named `flip'
 ... and so on ...
make[1]: *** [arch/ia64/hp/sim/simserial.o] Error 1

Patch from Andreas Schwab.
Signed-off-by: NTony Luck <tony.luck@intel.com>
      d50f5c5c
    • Z
      [IA64] prevent accidental modification of args in jprobe handler · d3ef1f5a
      由 Zhang Yanmin 提交于 
      When jprobe is hit, the function parameters of the original function
should be saved before jprobe handler is executed, and restored it after
jprobe handler is executed, because jprobe handler might change the
register values due to tail call optimization by the gcc.
Signed-off-by: NZhang Yanmin <yanmin.zhang@intel.com>
Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      d3ef1f5a
    • K
      [IA64] Add hotplug cpu to salinfo.c, replace semaphore with mutex · e026cca0
      由 Keith Owens 提交于 
      Add hotplug cpu support to salinfo.c.

The cpu_event field is a cpumask so use the cpu_* macros consistently,
replacing the existing mixture of cpu_* and *_bit macros.

Instead of counting the number of outstanding events in a semaphore and
trying to track that count over user space context, interrupt context,
non-maskable interrupt context and cpu hotplug, replace the semaphore
with a test for "any bits set" combined with a mutex.

Modify the locking to make the test for "work to do" an atomic
operation.
Signed-off-by: NKeith Owens <kaos@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      e026cca0
    • J
      [IA64] Handle debug traps in fsys mode · 15029285
      由 Jason Uhlenkott 提交于 
      We need to handle debug traps in fsys mode non-fatally.  They can
happen now that we have fsyscalls which contain probe instructions.
Signed-off-by: NJason Uhlenkott <jasonuhl@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      15029285
    • P
      [IA64-SGI] Fix sn_flush_device_kernel & spinlock initialization · 6d6e4200
      由 Prarit Bhargava 提交于 
      This patch separates the sn_flush_device_list struct into kernel and
common (both kernel and PROM accessible) structures.  As it was, if the
size of a spinlock_t changed (due to additional CONFIG options, etc.) the
sal call which populated the sn_flush_device_list structs would erroneously
write data (and cause memory corruption and/or a panic).

This patch does the following:

1.  Removes sn_flush_device_list and adds sn_flush_device_common and
sn_flush_device_kernel.

2.  Adds a new SAL call to populate a sn_flush_device_common struct per
device, not per widget as previously done.

3.  Correctly initializes each device's sn_flush_device_kernel spinlock_t
struct (before it was only doing each widget's first device).
Signed-off-by: NPrarit Bhargava <prarit@sgi.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
      6d6e4200
    • J
      [IA64] Hole in IA64 TLB flushing from system threads · cfbb1426
      由 Jack Steiner 提交于 
      I originally thought this was an bug only in the SN code, but I think I
also see a hole in the generic IA64 tlb code. (Separate patch was sent
for the SN problem).

It looks like there is a bug in the TLB flushing code. During context switch,
kernel threads (kswapd, for example) inherit the mm of the task that was
previously running on the cpu. Normally, this is ok because the previous context
is still loaded into the RR registers. However, if the owner of the mm
migrates to another cpu, changes it's context number, and references a
page before kswapd issues a tlb_purge for that same page, the purge will be
done with a stale context number (& RR registers).
Signed-off-by: NTony Luck <tony.luck@intel.com>
      cfbb1426