1. 22 12月, 2015 1 次提交
    • A
      fm10k: Cleanup exception handling for changing queues · 09f8a82b
      Alexander Duyck 提交于
      This patch is meant to cleanup the exception handling for the paths where
      we reset the interrupts and then reconfigure them.  In all of these paths
      we had very different levels of exception handling.  I have updated the
      driver so that all of the paths should result in a similar state if we
      fail.
      
      Specifically the driver will now unload the mailbox interrupt, free the
      queue vectors and MSI-X, and then detach the interface.
      
      In addition for any of the PCIe related resets I have added a check with
      the hw_ready function to just make sure the registers are in a readable
      state prior to reopening the interface.
      Signed-off-by: NAlexander Duyck <aduyck@mirantis.com>
      Reviewed-by: NBruce Allan <bruce.w.allan@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      09f8a82b
  2. 14 12月, 2015 6 次提交
  3. 06 12月, 2015 6 次提交
  4. 26 11月, 2015 1 次提交
  5. 23 9月, 2015 2 次提交
  6. 16 9月, 2015 6 次提交
  7. 18 6月, 2015 3 次提交
  8. 15 4月, 2015 8 次提交
  9. 03 3月, 2015 1 次提交
  10. 17 11月, 2014 1 次提交
  11. 16 10月, 2014 1 次提交
  12. 23 9月, 2014 4 次提交
    • A
      fm10k: Add support for PTP · a211e013
      Alexander Duyck 提交于
      This change adds support for the Linux PTP Hardware clock and timestamping
      functionality provided by the hardware.  There are actually two cases that
      this timestamping is meant to support.
      
      The first case would be an ordinary clock scenario.  In this configuration
      the host interface does not have access to BAR 4.  However all of the host
      interfaces should be locked into the same boundary clock region and as such
      they are all on the same clock anyway.  With this being the case they can
      synchronize among themselves and only need to adjust the offset since they
      are all on the same clock with the same frequency.
      
      The second case is a boundary clock scenario.  This is a special case and
      would require both BAR 4 access, and a means of presenting a netdev per
      boundary region.  The current plan is to use DSA at some point in the
      future to provide these interfaces, but the DSA portion is still under
      development.
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Acked-by: NRichard Cochran <richardcochran@gmail.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      a211e013
    • A
      fm10k: Add support for debugfs · 7461fd91
      Alexander Duyck 提交于
      This patch adds limited debugfs support for the driver.  Most of the
      functionality needed for dumping registers is already provided via ethtool.
      The only thing we saw that we really neeed was the ability to dump the
      descriptor rings so as such this patch will add a fm10k directory containing a
      listing of directories each one with a unique PCI Bus, Device, and Function
      number.  Each of those BDF directories will have a list of q_vectors, and
      the q_vectors will contain a file for each of the Rx/Tx rings that are a part
      of the vector.  For example:
      
      # ls -RD /sys/kernel/debug/fm10k/
      /sys/kernel/debug/fm10k/:
      0000:01:00.0
      
      /sys/kernel/debug/fm10k/0000:01:00.0:
      q_vector.000  q_vector.001  q_vector.002  q_vector.003
      
      /sys/kernel/debug/fm10k/0000:01:00.0/q_vector.000:
      rx_ring.000  tx_ring.000
      
      /sys/kernel/debug/fm10k/0000:01:00.0/q_vector.001:
      rx_ring.001  tx_ring.001
      
      /sys/kernel/debug/fm10k/0000:01:00.0/q_vector.002:
      rx_ring.002  tx_ring.002
      
      /sys/kernel/debug/fm10k/0000:01:00.0/q_vector.003:
      rx_ring.003  tx_ring.003
      
      # cat /sys/kernel/debug/fm10k/0000:01:00.0/q_vector.000/rx_ring.000
      DES DATA       RSS        STATERR    LENGTH VLAN   DGLORT SGLORT TIMESTAMP
      ---------------------------------------------------------------------------
      000 0x00000000 0x00000000 0x00000003 0x002a 0x0000 0x0000 0x0000 0x13951807dc4fedf0
      001 0x00000000 0x00000000 0x00000003 0x002a 0x0000 0x0000 0x0000 0x1395180906c9f2c8
      002 0x3731c000 0x00000000 0x00000000 0x0000 0x0000 0x0000 0x0000 0x0000000000000000
      003 0x3731d000 0x00000000 0x00000000 0x0000 0x0000 0x0000 0x0000 0x0000000000000000
      004 0xaab3a000 0x00000000 0x00000000 0x0000 0x0000 0x0000 0x0000 0x0000000000000000
      ...
      
      # cat /sys/kernel/debug/fm10k/0000:01:00.0/q_vector.000/tx_ring.000
      DES BUFFER_ADDRESS     LENGTH VLAN   MSS    HDRLEN FLAGS
      ---------------------------------------------------------
      000 0x00000000aa8a1002 0x005a 0x0000 0x0000 0x0000 0xc0
      001 0x00000000aa8a2002 0x005a 0x0000 0x0000 0x0000 0xc0
      002 0x000000006bc13202 0x004e 0x0000 0x0000 0x0000 0xc0
      003 0x000000006bc13c02 0x002a 0x0000 0x0000 0x0000 0xe1
      004 0x000000006bc13602 0x0062 0x0000 0x0000 0x0000 0xc0
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      7461fd91
    • A
      fm10k: Add support for IEEE DCBx · 9f801abc
      Alexander Duyck 提交于
      This patch adds support for management of the limited QOS features of the
      FM10000 interface.  Specifically we can support up to 8 traffic classes,
      however the part only provides 1 Rx and 1 Tx FIFO in the host interface and
      as a result this can lead to head-of-line blocking on Rx.  This can be
      avoided by setting PFC only for priorities that cannot afford to drop
      frames.
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Acked-by: NJohn Fastabend <john.r.fastabend@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      9f801abc
    • A
      fm10k: Add support for SR-IOV to driver · 883a9ccb
      Alexander Duyck 提交于
      This patch combines the recently added VF messaging and configuration
      functionality with the interfaces provided by the kernel to allow for
      configuration and management of SR-IOV.
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      883a9ccb