Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Convert most arches to use asm-generic/kmap_types.h.

Move the KM_FENCE_ macro additions into asm-generic/kmap_types.h,
controlled by __WITH_KM_FENCE from each arch's kmap_types.h file.

Would be nice to be able to add custom KM_types per arch, but I don't yet
see a nice, clean way to do that.

Built on x86_64, i386, mips, sparc, alpha(tonyb), powerpc(tonyb), and
68k(tonyb).

Note: avr32 should be able to remove KM_PTE2 (since it's not used) and
then just use the generic kmap_types.h file.  Get avr32 maintainer
approval.
Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
Cc: <linux-arch@vger.kernel.org>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Bryan Wu <cooloney@kernel.org>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: "Luck Tony" <tony.luck@intel.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Just the basic ftrace support here -- mcount and the ftrace stub.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The Blackfin arch has a bunch of custom section markings for its on-chip
regions, but they aren't declared in the right header.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Looks like the mutex-dec.h header file was incorrectly copied into the
Blackfin asm path.  Nothing uses it, so punt it.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

This converts the irq handling in the Blackfin arch from the old irq.h /
system.h method to the new irqflags.h.  A stepping stone on the way to
other tracing functionality.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NYi Li <yi.li@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The IRQ functions take an "unsigned long" flags variable, not any other
type, so fix the places where we use "int" or "long".
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The KGDB code uses this when switching processors to make sure the icache
is in a valid state.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The latter naming convention is much more common.
Signed-off-by: NJie Zhang <jie.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

There is no need for the L1 attribute to be on the prototype of the
access_ok() function as all consumers of the function do not care where it
lives -- they'll always use pcrel calls to get to it.  This prevents
pointless recompiles of most of the system when this config option changes.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The common code already has a prototype for this function and we don't use
it anywhere in the Blackfin code, so punt it from the Blackfin headers.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The core string/clear user functions weren't checking the user pointers
which caused kernel crashes with some bad programs and tests (like LTP).
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The latest Blackfin toolchain has fixed its relocation scheme to match
other ports: always use R_BFIN_ prefix and capitalize everything.  This
brings the kernel in line with those fixes.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Make sure the internal core buffers are flushed before telling the DMA
engine to fetch the descriptor structure so that it gets the right values.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The Per-processor Data Area isn't actually reserved by this function, and
all it ended up doing was issuing a printk(), so punt it.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

First we fix the prototypes for functions that return boolean values by
using "int" rather than "uint16_t".  Then we introduce a get_gptimer_run()
function for checking the current run status of a timer, and then we add a
disable_gptimers_sync() function which parallels disable_gptimers() with
corresponding normal "_sync" behavior.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Hardware errors on the Blackfin architecture are queued by nature of the
hardware design.  Things that could generate a hardware level queue up at
the system interface and might not process until much later, at which
point the system would send a notification back to the core.

As such, it is possible for user space code to do something that would
trigger a hardware error, but have it delay long enough for the process
context to switch.  So when the hardware error does signal, we mistakenly
evaluate it as a different process or as kernel context and panic (erp!).
This makes it pretty difficult to find the offending context.  But wait,
there is good news somewhere.

By forcing a SSYNC in the interrupt entry, we force all pending queues at
the system level to be processed and all hardware errors to be signaled.
Then we check the current interrupt state to see if the hardware error is
now signaled.  If so, we re-queue the current interrupt and return thus
allowing the higher priority hardware error interrupt to process properly.
Since we haven't done any other context processing yet, the right context
will be selected and killed.  There is still the possibility that the
exact offending instruction will be unknown, but at least we'll have a
much better idea of where to look.

The downside of course is that this causes system-wide syncs at every
interrupt point which results in significant performance degradation.
Since this situation should not occur in any properly configured system
(as hardware errors are triggered by things like bad pointers), make it a
debug configuration option and disable it by default.
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

When possible, work around anomaly 05000220 (external memory is write
back cached, but L2 is not cached).  If not possible, detect the
conditions at build time and reject any qualifying configurations.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

For systems where the core cycles are not a usable tick source (like SMP
or cycles gets updated), enable gptimer0 as an alternative.
Signed-off-by: NGraf Yang <graf.yang@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Note the reason for using CHIPD over DSPID.
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Our early L1 relocate code may implicitly call code which lives in L1
memory.  This is due to the dma_memcpy() rewrite that made the DMA code
lockless and safe to be used by multiple processes.  If we start the
early DMA memcpy to relocate things into L1 instruction but then our
DMA memcpy code calls a function that lives in L1, things fall apart.
As such, create a small dedicated DMA memcpy routine that we can assume
sanity at boot time.
Reported-by: NFilip Van Rillaer <filip.vanrillaer@oneaccess-net.com>
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Make sure our bfin_addr_dcachable() function flags cached L2 SRAM properly
else memory easily goes unflushed when working with DMA.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

ipipe-2.6.28.9-blackfin-git95aafe6.patch
Singed-off-by: NPhilippe Gerum <rpm@xenomai.org>
Signed-off-by: NYi Li <yi.li@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The I/O port functions take ints, so we need to cast them up before
passing to our read/write funcs to avoid ugly messes of warnings.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

Make sure we flush all data caches and their write buffers before flushing
icache, otherwise random edge cases could crop up where stale data is read
into icache from external memory.  As fallout, punt the combined icache +
dcache flush function since we cannot safely do them back to back -- the
SSYNC is needed between the dcache flush and the icache flush.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>

The current asm-generic/page.h only contains the get_order
function, and asm-generic/uaccess.h only implements
unaligned accesses. This renames the file to getorder.h
and uaccess-unaligned.h to make room for new page.h
and uaccess.h file that will be usable by all simple
(e.g. nommu) architectures.
Signed-off-by: NRemis Lima Baima <remis.developer@googlemail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The existing asm-generic/atomic.h only defines the
atomic_long type. This renames it to atomic-long.h
so we have a place to add a truly generic atomic.h
that can be used on all non-SMP systems.
Signed-off-by: NRemis Lima Baima <remis.developer@googlemail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NIngo Molnar <mingo@elte.hu>

This provides a reliable way for asm-generic/types.h and other
files to find out if it is running on a 32 or 64 bit platform.

We cannot use CONFIG_64BIT for this in headers that are included
from user space because CONFIG symbols are not available there.
We also cannot do it inside of asm/types.h because some headers
need the word size but cannot include types.h.

The solution is to introduce a new header <asm/bitsperlong.h>
that defines both __BITS_PER_LONG for user space and
BITS_PER_LONG for usage in the kernel. The asm-generic
version falls back to 32 bit unless the architecture overrides
it, which I did for all 64 bit platforms.
Signed-off-by: NRemis Lima Baima <remis.developer@googlemail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The existing asm-generic versions are incomplete and included
by some architectures. New architectures should be able
to use a generic version, so rename the existing files and
change all users, which lets us add the new files.
Signed-off-by: NRemis Lima Baima <remis.developer@googlemail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The flat loader uses an architecture's flat_stack_align() to align the
stack but assumes word-alignment is enough for the data sections.

However, on the Xtensa S6000 we have registers up to 128bit width
which can be used from userspace and therefor need userspace stack and
data-section alignment of at least this size.

This patch drops flat_stack_align() and uses the same alignment that
is required for slab caches, ARCH_SLAB_MINALIGN, or wordsize if it's
not defined by the architecture.

It also fixes m32r which was obviously kaput, aligning an
uninitialized stack entry instead of the stack pointer.

[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: NOskar Schirmer <os@emlix.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: Bryan Wu <cooloney@kernel.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Cc: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: NJohannes Weiner <jw@emlix.com>
Acked-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

We don't create a include/asm/mach/ symlink anymore, so we don't need the
.gitignore for it.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

1. Rewrite of the non-dma data transfer functions to use only ONE mode
   of TIMOD (TIMOD=0x1).  With TIMOD=0, it was not possible to set the TX
   bit pattern.  So the TDBR = 0xFFFF inside the read calls won't work.

2. Clear SPI_RDBR before reading and before duplex transfer.
   Otherwise the garbage data in RDBR will get read.  Since mmc_spi uses a
   lot of duplex transfers, this is the main cause of mmc_spi failure.

3. Poll RXS for transfer completion.  Polling SPIF or TXS cannot
   guarantee transfer completion.  This may interrupt a transfer before it
   is finished.  Also this may leave garbage data in buffer and affect
   next transfer.

[Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct
bfin5xx_spi_chip" to specify the value to transmit if no TX value
is supplied.]
Signed-off-by: NWolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: NYi Li <yi.li@analog.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>