1. 09 1月, 2014 3 次提交
  2. 18 10月, 2013 1 次提交
  3. 17 10月, 2013 7 次提交
  4. 11 10月, 2013 1 次提交
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      powerpc: Put FP/VSX and VR state into structures · de79f7b9
      Paul Mackerras 提交于
      This creates new 'thread_fp_state' and 'thread_vr_state' structures
      to store FP/VSX state (including FPSCR) and Altivec/VSX state
      (including VSCR), and uses them in the thread_struct.  In the
      thread_fp_state, the FPRs and VSRs are represented as u64 rather
      than double, since we rarely perform floating-point computations
      on the values, and this will enable the structures to be used
      in KVM code as well.  Similarly FPSCR is now a u64 rather than
      a structure of two 32-bit values.
      
      This takes the offsets out of the macros such as SAVE_32FPRS,
      REST_32FPRS, etc.  This enables the same macros to be used for normal
      and transactional state, enabling us to delete the transactional
      versions of the macros.   This also removes the unused do_load_up_fpu
      and do_load_up_altivec, which were in fact buggy since they didn't
      create large enough stack frames to account for the fact that
      load_up_fpu and load_up_altivec are not designed to be called from C
      and assume that their caller's stack frame is an interrupt frame.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      de79f7b9
  5. 11 7月, 2013 2 次提交
  6. 30 6月, 2013 1 次提交
  7. 19 6月, 2013 1 次提交
  8. 11 6月, 2013 2 次提交
  9. 27 4月, 2013 5 次提交
  10. 17 4月, 2013 1 次提交
  11. 22 3月, 2013 3 次提交
  12. 05 3月, 2013 1 次提交
  13. 13 2月, 2013 2 次提交
  14. 10 1月, 2013 3 次提交
    • A
      KVM: PPC: BookE: Add EPR ONE_REG sync · 324b3e63
      Alexander Graf 提交于
      We need to be able to read and write the contents of the EPR register
      from user space.
      
      This patch implements that logic through the ONE_REG API and declares
      its (never implemented) SREGS counterpart as deprecated.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      324b3e63
    • A
      KVM: PPC: BookE: Implement EPR exit · 1c810636
      Alexander Graf 提交于
      The External Proxy Facility in FSL BookE chips allows the interrupt
      controller to automatically acknowledge an interrupt as soon as a
      core gets its pending external interrupt delivered.
      
      Today, user space implements the interrupt controller, so we need to
      check on it during such a cycle.
      
      This patch implements logic for user space to enable EPR exiting,
      disable EPR exiting and EPR exiting itself, so that user space can
      acknowledge an interrupt when an external interrupt has successfully
      been delivered into the guest vcpu.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      1c810636
    • A
      KVM: PPC: BookE: Allow irq deliveries to inject requests · b8c649a9
      Alexander Graf 提交于
      When injecting an interrupt into guest context, we usually don't need
      to check for requests anymore. At least not until today.
      
      With the introduction of EPR, we will have to create a request when the
      guest has successfully accepted an external interrupt though.
      
      So we need to prepare the interrupt delivery to abort guest entry
      gracefully. Otherwise we'd delay the EPR request.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b8c649a9
  15. 06 12月, 2012 4 次提交
  16. 06 10月, 2012 3 次提交
    • S
      KVM: PPC: set IN_GUEST_MODE before checking requests · 5bd1cf11
      Scott Wood 提交于
      Avoid a race as described in the code comment.
      
      Also remove a related smp_wmb() from booke's kvmppc_prepare_to_enter().
      I can't see any reason for it, and the book3s_pr version doesn't have it.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5bd1cf11
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      KVM: PPC: Book3S HV: Fix updates of vcpu->cpu · a47d72f3
      Paul Mackerras 提交于
      This removes the powerpc "generic" updates of vcpu->cpu in load and
      put, and moves them to the various backends.
      
      The reason is that "HV" KVM does its own sauce with that field
      and the generic updates might corrupt it. The field contains the
      CPU# of the -first- HW CPU of the core always for all the VCPU
      threads of a core (the one that's online from a host Linux
      perspective).
      
      However, the preempt notifiers are going to be called on the
      threads VCPUs when they are running (due to them sleeping on our
      private waitqueue) causing unload to be called, potentially
      clobbering the value.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a47d72f3
    • P
      KVM: PPC: Book3S HV: Handle memory slot deletion and modification correctly · dfe49dbd
      Paul Mackerras 提交于
      This adds an implementation of kvm_arch_flush_shadow_memslot for
      Book3S HV, and arranges for kvmppc_core_commit_memory_region to
      flush the dirty log when modifying an existing slot.  With this,
      we can handle deletion and modification of memory slots.
      
      kvm_arch_flush_shadow_memslot calls kvmppc_core_flush_memslot, which
      on Book3S HV now traverses the reverse map chains to remove any HPT
      (hashed page table) entries referring to pages in the memslot.  This
      gets called by generic code whenever deleting a memslot or changing
      the guest physical address for a memslot.
      
      We flush the dirty log in kvmppc_core_commit_memory_region for
      consistency with what x86 does.  We only need to flush when an
      existing memslot is being modified, because for a new memslot the
      rmap array (which stores the dirty bits) is all zero, meaning that
      every page is considered clean already, and when deleting a memslot
      we obviously don't care about the dirty bits any more.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      dfe49dbd