In the defconfigs for ATNGW100 and ATSTK100[236] the DMA Test driver is
compiled as a module.  This means systems built with *_defconfig +
CONFIG_MODULES=n are unusable as the 3 dma test channels monopolise the
CPU.

I 'spose Haavard uses this module a lot but IMO it isn't really
something needed on all eval boards by default.
Signed-off-by: NBen Nizette <bn@niasdigital.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

This patch does include the basic support for the fpga device driver,
but not the device driver itself.
Signed-off-by: NAlex Raimondi <mailinglist@miromico.ch>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Enable JFFS2 write buffer support so that the kernel can access a root
filesystem in NAND flash.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Taken from buildroot.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Provided by Mark Jackson.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch lets the user enable support for EVKLCD100 and EVKLCD101
(refered to by EVKLCD10X). By enabling EVKLCD10X support the LCD
controller and AC97 controller platform devices are added.

The user can also choose between the EVKLCD100 (QVGA display) and the
EVKLCD101 (VGA display), this is added to automagically select the
correct panel timing and resolution parameters.

Enabling support for EVKLCD10X addon board will cripple the MCI platform
device a bit since they share two GPIO lines (detect and write-protect).
These two lines are disabled when EVKLCD10X is enabled.

The default configurations are based upon ATNGW100, but with added AC97C
and LCDC driver. Virtual terminal is also enabled by default for
EVKLCD10X boards.

Verified on hardware with a NGW100 + EVKLCD100/101.
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Enable power management, DMA and MMC on all boards except ATSTK1004, and
add defconfig for the new ATSTK1006 board with NAND flash, UBI and UBIFS
enabled as well.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Just provide reasonable defaults for the new stuff. Tickless and
hrtimers are turned on for all boards except ATSTK1004.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Turn off a few useless options, enable a few useful ones and enable
quite a few new drivers.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

ATSTK1003 and ATSTK1004 are CPU daughterboards for ATSTK1000 featuring
the AT32AP7001 and AT32AP7002 CPUs, respectively.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

These are derivatives of the AT32AP7000 chip, which means that most of
the code stays the same. Rename a few files, functions, definitions
and config symbols to reflect that they apply to all AP700x chips, and
exclude some platform devices from chips where they aren't present.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Add GPIO leds to the NGW100 platform and its defconfig.
Access through /sys/class/leds/{a,b,sys}/* files; one
defaults to a heartbeat.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NRichard Purdie <rpurdie@rpsys.net>

Update defconfigs for ATNGW100 and ATSTK1002. This will enable the
SLUB allocator by default on both, and will enable NFS root on
ATSTK1002 (ATNGW100 had it enabled before.)
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Add board code and defconfig for the ATNGW100 Network Gateway kit.
For more information about this board, see

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4102Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Enable the Atmel MACB ethernet driver by default on ATSTK1000.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Sync atstk1002_defconfig with latest git, turn off non-existent
drivers and enable a few more userspace-visible options like
SysV IPC and inotify support.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

Rename the following Kconfig symbols:
  * CONFIG_SERIAL_AT91 -> CONFIG_SERIAL_ATMEL
  * CONFIG_SERIAL_AT91_CONSOLE -> CONFIG_SERIAL_ATMEL_CONSOLE
  * CONFIG_SERIAL_AT91_TTYAT -> CONFIG_SERIAL_ATMEL_TTYAT
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.

AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.

The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.

Full data sheet is available from

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

Information about the AT32STK1000 development board can be found at

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.

Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.

This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.

[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>
Signed-off-by: NDave McCracken <dmccr@us.ibm.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>