- 01 1月, 2015 2 次提交
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由 Nimrod Andy 提交于
Add FEC magic-packet feature support. Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Nimrod Andy 提交于
i.MX6q/dl, i.MX6SX SOCs enet support sleep mode that magic packet can wake up system in suspend status. For different SOCs, there have some SOC specifical GPR register to set sleep on/off mode. So add these to callback function for driver. Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 12月, 2014 1 次提交
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由 Dmitry Eremin-Solenikov 提交于
In the end asm/mach/irda.h header is not used by anybody except sa1100. Move the header to the platform data includes dir and rename it to irda-sa11x0.h. Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 12月, 2014 1 次提交
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由 Rafael J. Wysocki 提交于
Having switched over all of the users of CONFIG_PM_RUNTIME to use CONFIG_PM directly, turn the latter into a user-selectable option and drop the former entirely from the tree. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NKevin Hilman <khilman@linaro.org>
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- 18 12月, 2014 1 次提交
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由 Christian Borntraeger 提交于
ACCESS_ONCE does not work reliably on non-scalar types. For example gcc 4.6 and 4.7 might remove the volatile tag for such accesses during the SRA (scalar replacement of aggregates) step (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145) Change the spinlock code to replace ACCESS_ONCE with READ_ONCE. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
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- 16 12月, 2014 3 次提交
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由 Tero Kristo 提交于
The new usage of determine_rate and set_rate_and_parent calls for OMAP DPLLs assumes the DPLLs must have two parents defined, even if it is the same clock. Legacy clock data did not fullfill this requirement and caused a boot crash. Fixed by adding the missing parent information to the DPLL clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com> Fixes: 2e1a7b01 ("ARM: OMAP3+: DPLL: use determine_rate() and...") Cc: Paul Walmsley <paul@pwsan.com> Acked-by: NTony Lindgren <tony@atomide.com> Tested-by: NKevin Hilman <khilman@linaro.org> Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
While the change for determine_rate clock operation was merged, the OMAP counterpart using these calls was overlooked for some reason, and caused boot failures on at least OMAP4 platforms. Fixed by updating the DPLL API calls to use the new parameters. Signed-off-by: NTero Kristo <t-kristo@ti.com> Fixes: 646cafc6 ("clk: Change clk_ops->determine_rate") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Tested-by: NKevin Hilman <khilman@linaro.org> Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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由 Viresh Kumar 提交于
CONFIG_GENERIC_CPUFREQ_CPU0 disappeared with commit bbcf0719 ("cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'") and some defconfigs are still using it instead of the new one. Use the renamed CONFIG_CPUFREQ_DT generic driver. Cc: <stable@vger.kernel.org> # 3.18 Reported-by: NNishanth Menon <nm@ti.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 15 12月, 2014 1 次提交
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由 Christoffer Dall 提交于
It is curently possible to run a VM with architected timers support without creating an in-kernel VGIC, which will result in interrupts from the virtual timer going nowhere. To address this issue, move the architected timers initialization to the time when we run a VCPU for the first time, and then only initialize (and enable) the architected timers if we have a properly created and initialized in-kernel VGIC. When injecting interrupts from the virtual timer to the vgic, the current setup should ensure that this never calls an on-demand init of the VGIC, which is the only call path that could return an error from kvm_vgic_inject_irq(), so capture the return value and raise a warning if there's an error there. We also change the kvm_timer_init() function from returning an int to be a void function, since the function always succeeds. Reviewed-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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- 14 12月, 2014 1 次提交
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由 Riku Voipio 提交于
Following the suggestions from Andrew Morton and Stephen Rothwell, Dont expand the ARCH list in kernel/gcov/Kconfig. Instead, define a ARCH_HAS_GCOV_PROFILE_ALL bool which architectures can enable. set ARCH_HAS_GCOV_PROFILE_ALL on Architectures where it was previously allowed + ARM64 which I tested. Signed-off-by: NRiku Voipio <riku.voipio@linaro.org> Cc: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 12月, 2014 11 次提交
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由 Christoffer Dall 提交于
When the vgic initializes its internal state it does so based on the number of VCPUs available at the time. If we allow KVM to create more VCPUs after the VGIC has been initialized, we are likely to error out in unfortunate ways later, perform buffer overflows etc. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Reviewed-by: NEric Auger <eric.auger@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
The vgic_initialized() macro currently returns the state of the vgic->ready flag, which indicates if the vgic is ready to be used when running a VM, not specifically if its internal state has been initialized. Rename the macro accordingly in preparation for a more nuanced initialization flow. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Reviewed-by: NEric Auger <eric.auger@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Peter Maydell 提交于
VGIC initialization currently happens in three phases: (1) kvm_vgic_create() (triggered by userspace GIC creation) (2) vgic_init_maps() (triggered by userspace GIC register read/write requests, or from kvm_vgic_init() if not already run) (3) kvm_vgic_init() (triggered by first VM run) We were doing initialization of some state to correspond with the state of a freshly-reset GIC in kvm_vgic_init(); this is too late, since it will overwrite changes made by userspace using the register access APIs before the VM is run. Move this initialization earlier, into the vgic_init_maps() phase. This fixes a bug where QEMU could successfully restore a saved VM state snapshot into a VM that had already been run, but could not restore it "from cold" using the -loadvm command line option (the symptoms being that the restored VM would run but interrupts were ignored). Finally rename vgic_init_maps to vgic_init and renamed kvm_vgic_init to kvm_vgic_map_resources. [ This patch is originally written by Peter Maydell, but I have modified it somewhat heavily, renaming various bits and moving code around. If something is broken, I am to be blamed. - Christoffer ] Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Reviewed-by: NEric Auger <eric.auger@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
Introduce a new function to unmap user RAM regions in the stage2 page tables. This is needed on reboot (or when the guest turns off the MMU) to ensure we fault in pages again and make the dcache, RAM, and icache coherent. Using unmap_stage2_range for the whole guest physical range does not work, because that unmaps IO regions (such as the GIC) which will not be recreated or in the best case faulted in on a page-by-page basis. Call this function on secondary and subsequent calls to the KVM_ARM_VCPU_INIT ioctl so that a reset VCPU will detect the guest Stage-1 MMU is off when faulting in pages and make the caches coherent. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
When a vcpu calls SYSTEM_OFF or SYSTEM_RESET with PSCI v0.2, the vcpus should really be turned off for the VM adhering to the suggestions in the PSCI spec, and it's the sane thing to do. Also, clarify the behavior and expectations for exits to user space with the KVM_EXIT_SYSTEM_EVENT case. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
It is not clear that this ioctl can be called multiple times for a given vcpu. Userspace already does this, so clarify the ABI. Also specify that userspace is expected to always make secondary and subsequent calls to the ioctl with the same parameters for the VCPU as the initial call (which userspace also already does). Add code to check that userspace doesn't violate that ABI in the future, and move the kvm_vcpu_set_target() function which is currently duplicated between the 32-bit and 64-bit versions in guest.c to a common static function in arm.c, shared between both architectures. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
When userspace resets the vcpu using KVM_ARM_VCPU_INIT, we should also reset the HCR, because we now modify the HCR dynamically to enable/disable trapping of guest accesses to the VM registers. This is crucial for reboot of VMs working since otherwise we will not be doing the necessary cache maintenance operations when faulting in pages with the guest MMU off. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
The implementation of KVM_ARM_VCPU_INIT is currently not doing what userspace expects, namely making sure that a vcpu which may have been turned off using PSCI is returned to its initial state, which would be powered on if userspace does not set the KVM_ARM_VCPU_POWER_OFF flag. Implement the expected functionality and clarify the ABI. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Christoffer Dall 提交于
If a VCPU was originally started with power off (typically to be brought up by PSCI in SMP configurations), there is no need to clear the POWER_OFF flag in the kernel, as this flag is only tested during the init ioctl itself. Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Rafael J. Wysocki 提交于
After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so Kconfig options depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace PM_RUNTIME with PM in Kconfig dependencies throughout the tree. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NFelipe Balbi <balbi@ti.com> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: NTejun Heo <tj@kernel.org>
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由 Rafael J. Wysocki 提交于
After commit b2b49ccb (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks depending on CONFIG_PM_RUNTIME may now be changed to depend on CONFIG_PM. Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere in the code under arch/arm/ (the defconfig files will be modified later). Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NNishanth Menon <nm@ti.com> Acked-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NSantosh Shilimkar <ssantosh@kernel.org>
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- 12 12月, 2014 1 次提交
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由 Alexander Duyck 提交于
There are a number of situations where the mandatory barriers rmb() and wmb() are used to order memory/memory operations in the device drivers and those barriers are much heavier than they actually need to be. For example in the case of PowerPC wmb() calls the heavy-weight sync instruction when for coherent memory operations all that is really needed is an lsync or eieio instruction. This commit adds a coherent only version of the mandatory memory barriers rmb() and wmb(). In most cases this should result in the barrier being the same as the SMP barriers for the SMP case, however in some cases we use a barrier that is somewhere in between rmb() and smp_rmb(). For example on ARM the rmb barriers break down as follows: Barrier Call Explanation --------- -------- ---------------------------------- rmb() dsb() Data synchronization barrier - system dma_rmb() dmb(osh) data memory barrier - outer sharable smp_rmb() dmb(ish) data memory barrier - inner sharable These new barriers are not as safe as the standard rmb() and wmb(). Specifically they do not guarantee ordering between coherent and incoherent memories. The primary use case for these would be to enforce ordering of reads and writes when accessing coherent memory that is shared between the CPU and a device. It may also be noted that there is no dma_mb(). Most architectures don't provide a good mechanism for performing a coherent only full barrier without resorting to the same mechanism used in mb(). As such there isn't much to be gained in trying to define such a function. Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Michael Neuling <mikey@neuling.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: David Miller <davem@davemloft.net> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NAlexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 12月, 2014 12 次提交
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由 Heikki Krogerus 提交于
commit dbc98635 ("phy: remove the old lookup method") removes struct phy_consumer but twl-common.c still uses the "phy_consumer" structure resulting in the following compilation warning. arch/arm/mach-omap2/twl-common.c:94:21: error: array type has incomplete element type struct phy_consumer consumers[] = { Removed using phy_consumer since twl4030 uses the new lookup method. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NGreg Kroah-Hartman <greg@kroah.com>
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由 Johan Hovold 提交于
Drop the vendor-prefix from the "ti,system-power-controller" device-tree property name. It has been agreed to make "system-power-controller" a standard property and to drop the vendor-prefix that is currently used by several drivers. Note that drivers that have used "<vendor>,system-power-controller" in a released kernel will need to support both versions. Signed-off-by: NJohan Hovold <johan@kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Benot Cousson <bcousson@baylibre.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Johan Hovold 提交于
Configure the RTC as system-power controller, which allows the system to be powered off as well as woken up again on subsequent RTC alarms. Note that the PMIC needs to be put in SLEEP (rather than OFF) mode to maintain RTC power. Specifically, this means that the PMIC ti,pmic-shutdown-controller property must be left unset in order to be able to wake up on RTC alarms. Tested on BeagleBone Black (rev A5). Signed-off-by: NJohan Hovold <johan@kernel.org> Reviewed-by: NFelipe Balbi <balbi@ti.com> Tested-by: NFelipe Balbi <balbi@ti.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Tony Lindgren <tony@atomide.com> Cc: Benot Cousson <bcousson@baylibre.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Keerthy J <j-keerthy@ti.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Johan Hovold 提交于
Enable am33xx specific RTC features (e.g. PMIC control) by adding "ti,am3352-rtc" to the compatible property of the rtc node. Signed-off-by: NJohan Hovold <johan@kernel.org> Reviewed-by: NFelipe Balbi <balbi@ti.com> Tested-by: NFelipe Balbi <balbi@ti.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Tony Lindgren <tony@atomide.com> Cc: Benot Cousson <bcousson@baylibre.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Keerthy J <j-keerthy@ti.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Daniel Borkmann 提交于
As there are now no remaining users of arch_fast_hash(), lets kill it entirely. This basically reverts commit 71ae8aac ("lib: introduce arch optimized hash library") and follow-up work, that is f.e., commit 23721754 ("lib: hash: follow-up fixups for arch hash"), commit e3fec2f7 ("lib: Add missing arch generic-y entries for asm-generic/hash.h") and last but not least commit 6a02652d ("perf tools: Fix include for non x86 architectures"). Cc: Francesco Fusco <fusco@ntop.org> Cc: Thomas Graf <tgraf@suug.ch> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: NDaniel Borkmann <dborkman@redhat.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Roger Quadros 提交于
OMAP5 and DRA7 platforms need the AHCI platform driver for SATA support. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
The lcd0 node for am437x-sk-evm.dts contains bad LCD timings, and while they seem to work with a quick test, doing for example blank/unblank will give you a black display. This patch updates the timings to the 'typical' values from the LCD spec sheet. Also, the compatible string is completely bogus, as "osddisplays,osd057T0559-34ts" is _not_ a 480x272 panel. The panel on the board is a newhaven one. Update the compatible string to reflect this. Note that this hasn't caused any issues, as the "panel-dpi" matches the driver. Cc: <stable@vger.kernel.org> # v3.17+ Tested-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ravikumar Kattekola 提交于
As per the latest Data Manual, for newer samples, the nominal voltage required for VDD_CORE at OPP_NOM can be upto 1.06V which was 1.03V earlier. Update the regulator max voltage constraint for SMPS7, connected to VDD_CORE, to meet this requirement. Document reference: DRA74 Data Manual, SPRS857M - Dec 2012, Revised Oct 2014. DRA72 Data Manual, SPRS906G - Dec 2012, revised Oct 2014. Signed-off-by: NRavikumar Kattekola <rk@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Ravikumar Kattekola 提交于
The max expected voltage for VDD_GPU, connected to SMPS6, is 1.25V. Correct regulator max voltage constraint to meet this requirement. Document reference: DRA74 Data Manual, SPRS857M - Dec 2012, Revised Oct 2014. Fixes: c56a831c ("ARM: dts: DRA7: Add TPS659038 PMIC nodes") Signed-off-by: NRavikumar Kattekola <rk@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Lokesh Vutla 提交于
ES1.2 is a minor variant of ES1.1. Major changes since ES1.1 are updating ROM for fixing the following boot modes: - NAND boot - UART boot - Ethernet boot - USB HOST/Client boot This patch adds ID support for AM437x ES1.2 silicon. There are no additional kernel fixes required for ES1.2 silicon. Latest Technical Documentation can be found here: http://www.ti.com/lsds/ti/arm/sitara_arm_cortex_a_processor/arm_cortex_a9_core/am437x_arm_cortex_a9/tech_docs.pageSigned-off-by: NLokesh Vutla <lokeshvutla@ti.com> Reviewed-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Felipe Balbi 提交于
Caused by a copy & paste error. Note that even with this bug AM437x SK display still works because GPIO mux mode is always enabled. It's still wrong to mux somebody else's pin. Luckily ball D25 (offset 0x238 - gpio5_8) on AM437x isn't used for anything. While at that, also replace a pullup with a pulldown as that gpio should be normally low, not high. Cc: <stable@vger.kernel.org> # v3.17+ Acked-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Commit f4d809ec55b6 ("ARM: dts: Fix gpmc timings for omap 2430sdp") added GPMC timings for 2430sdp. This however broke the Ethernet for some versions of u-boot using a different L3 clock frequency: set_gpmc_timing_reg: GPMC error! CS5: cs_rd_off: 233 ns, 39 ticks > 31 omap-gpmc 6e000000.gpmc: failed to set gpmc timings for: ethernet This is because the smsc91x timings from 1.1.4 u-boot overflow the GPMC registers when booted with 1.1.3 version of u-boot. Let's fix this issue by using the better timings from u-boot 1.1.3 as they also work on 1.1.4 and are faster. Note that so far the attempts over the years to calculate the GPMC timings on the SDP boards have failed probably because of the unknown latencies added by the FPGA on the debug boards. Reported-by: NNishanth Menon <nm@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 10 12月, 2014 1 次提交
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由 Simon Horman 提交于
This reverts commit 2315f9fc. Unfortunately enabling RCAR_AUDMAC_PP support this patch breaks dmaengine support on R-Car Gen2 boards. This should be resolved by driver updates in v3.20. But v3.19 was too early for this defconfig change. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 06 12月, 2014 5 次提交
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由 Sonny Rao 提交于
This will enable use of physical arch timers on rk3288, where each core comes out of reset with a different virtual offset. Using physical timers will help with SMP booting on coreboot and older u-boot and should also allow suspend-resume and cpu-hotplug to work on all firmwares. Firmware which does initialize the cpu registers properly at boot and cpu-hotplug can remove this property from the device tree. Signed-off-by: NSonny Rao <sonnyrao@chromium.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Felipe Balbi 提交于
Many of AM335x and AM437x hook backlight to one of these two devices. By enabling their drivers we make sure pwm-backlight can do its thing. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Felipe Balbi 提交于
AM437x devices have a DWC3 IP inside of them. The host side implementation of DWC3 is XHCI compliant. By enabling XHCI driver, we get the USB host port on AM437x Starter Kit working out of the box. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Felipe Balbi 提交于
Without this, sound on AM437x Starter Kit will not work. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Felipe Balbi 提交于
AM437x Starter Kit ships with EDT FT5306 touchscreen device. By enabling the driver we make sure touchscreen will work out of the box. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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