- 16 12月, 2011 1 次提交
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由 Richard Kuo 提交于
As of commit dd472da3, rwsem.h was moved into asm-generic. This patch removes the arch file and points the build at its new location. Signed-off-by: NRichard Kuo <rkuo@codeaurora.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 09 12月, 2011 1 次提交
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由 Tony Breeds 提交于
Based on original work by David 'Shaggy' Kleikamp. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NJosh Boyer <jwboyer@gmail.com>
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- 08 12月, 2011 12 次提交
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由 Paul Mackerras 提交于
This fixes a problem where a CPU thread coming out of nap mode can think it has valid values in the nonvolatile GPRs (r14 - r31) as saved away in power7_idle, but in fact the values have been trashed because the thread was used for KVM in the mean time. The result is that the thread crashes because code that called power7_idle (e.g., pnv_smp_cpu_kill_self()) goes to use values in registers that have been trashed. The bit field in SRR1 that tells whether state was lost only reflects the most recent nap, which may not have been the nap instruction in power7_idle. So we need an extra PACA field to indicate that state has been lost even if SRR1 indicates that the most recent nap didn't lose state. We clear this field when saving the state in power7_idle, we set it to a non-zero value when we use the thread for KVM, and we test it in power7_wakeup_noloss. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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With CONFIG_STRICT_DEVMEM=y, user space cannot read any part of /dev/mem. Since this breaks librtas, punch a hole in /dev/mem to allow access to the rmo_buffer that librtas needs. Anton Blanchard reported the problem and helped with the fix. A quick test for this patch: # cat /proc/rtas/rmo_buffer 000000000f190000 10000 # python -c "print 0x000000000f190000 / 0x10000" 3865 # dd if=/dev/mem of=/tmp/foo count=1 bs=64k skip=3865 1+0 records in 1+0 records out 65536 bytes (66 kB) copied, 0.000205235 s, 319 MB/s # dd if=/dev/mem of=/tmp/foo dd: reading `/dev/mem': Operation not permitted 0+0 records in 0+0 records out 0 bytes (0 B) copied, 0.00022519 s, 0.0 kB/s Signed-off-by: NSukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Geoff Levand 提交于
The lv1 hcall #91 should be named lv1_read_repository_node, and not lv1_get_repository_node_value. Adjust the lv1 hcall table and all calls. Signed-off-by: NGeoff Levand <geoff@infradead.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Geoff Levand 提交于
The lv1_get_version_info hcall takes 2, not 1 output arguments. Adjust the lv1 hcall table and all calls. Usage: int lv1_get_version_info(u64 *version_number, u64 *vendor_id) Signed-off-by: NGeoff Levand <geoff@infradead.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Geoff Levand 提交于
The lv1_get_virtual_address_space_id_of_ppe hcall takes 0, not 1 input arguments. Adjust the lv1 hcall table and all calls. Signed-off-by: NGeoff Levand <geoff@infradead.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Geoff Levand 提交于
The lv1_net_stop_tx_dma and net_stop_rx_dma hcalls take 2, not 3 input arguments. Adjust the lv1 hcall table and all calls. Signed-off-by: NGeoff Levand <geoff@infradead.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
Our die() code was based off a very old x86 version. Update it to mirror the current x86 code. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
Remove some unnecessary defines and fix some spelling mistakes. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
We have a lot of complicated logic that handles possible recursion between kdump and a system reset exception. We can solve this in a much simpler way using the same setjmp/longjmp tricks xmon does. As a first step, this patch removes the old system reset code. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Deepthi Dharwar 提交于
This patch makes pseries_idle_driver not to be registered when power_save=off kernel boot option is specified. The cpuidle_disable variable used here is similar to its usage on x86. If cpuidle_disable is set then sysfs entries for cpuidle framework are not created and the required drivers are not loaded. Signed-off-by: NDeepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: NTrinabh Gupta <g.trinabh@gmail.com> Signed-off-by: NArun R Bharadwaj <arun.r.bharadwaj@gmail.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Deepthi Dharwar 提交于
This patch implements a back-end cpuidle driver for pSeries based on pseries_dedicated_idle_loop and pseries_shared_idle_loop routines. The driver is built only if CONFIG_CPU_IDLE is set. This cpuidle driver uses global registration of idle states and not per-cpu. Signed-off-by: NDeepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: NTrinabh Gupta <g.trinabh@gmail.com> Signed-off-by: NArun R Bharadwaj <arun.r.bharadwaj@gmail.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Deepthi Dharwar 提交于
This patch provides cpu_idle_wait() routine for the powerpc platform which is required by the cpuidle subsystem. This routine is required to change the idle handler on SMP systems. The equivalent routine for x86 is in arch/x86/kernel/process.c but the powerpc implementation is different. cpuidle_disable variable is to enable/disable cpuidle framework if power_save option is set during the boot time. Signed-off-by: NDeepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by: NTrinabh Gupta <g.trinabh@gmail.com> Signed-off-by: NArun R Bharadwaj <arun.r.bharadwaj@gmail.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 07 12月, 2011 11 次提交
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由 Benjamin Herrenschmidt 提交于
It's only used inside the same file where it's defined. There's also no point exporting it anymore. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
This adds some more interfaces for OPAL v2 Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Becky Bruce 提交于
Define HUGETLB_NEED_PRELOAD in mmu-book3e.h for CONFIG_PPC64 instead of having a much more complicated #if block. This is easier to read and maintain. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Becky Bruce 提交于
This avoids an extra find_vma() and is less error-prone. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Becky Bruce 提交于
For 64-bit FSL_BOOKE implementations, gigantic pages need to be reserved at boot time by the memblock code based on the command line. This adds the call that handles the reservation, and fixes some code comments. It also removes the previous pr_err when reserve_hugetlb_gpages is called on a system without hugetlb enabled - the way the code is structured, the call is unconditional and the resulting error message spurious and confusing. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Becky Bruce 提交于
The original 32-bit hugetlb implementation used PPC64 vs PPC32 to determine which code path to take. However, the final hugetlb implementation for 64-bit FSL ended up shared with the FSL 32-bit code so the actual check needs to be FSL_BOOK3E vs everything else. This patch changes the include protections to reflect this. There are also a couple of related comment fixes. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Becky Bruce 提交于
There was an unconditional return of "1" in the original code from David Gibson, and I dropped it because it wasn't needed for FSL BOOKE 32-bit. However, not all systems (including 64-bit FSL BOOKE) do loading of the hpte from the fault handler asm and depend on this function returning 1, which causes a call to update_mmu_cache() that writes an entry into the tlb. Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Becky Bruce 提交于
If we don't have slices, we should be able to use the generic hugetlb_get_unmapped_area() code Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
Store the node pointer in the MPIC during initialization so that all of the later operational code can just reuse the cached pointer. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
It turns out that there are only 2 in-tree platforms which use MPICs which are not "primary": IBM Cell and PowerMac. To reduce the complexity of the typical board setup code, invert the MPIC_PRIMARY bit into MPIC_SECONDARY. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kyle Moffett 提交于
The MPIC code can already perform an automatic OF address translation step as part of mpic_alloc(), but several boards need to use that base address when they perform mpic_assign_isu(). The easiest solution is to save the computed physical address into the "struct mpic" for later use by the board code. Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 28 11月, 2011 1 次提交
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As described in the help text in the patch, this token restricts general access to /dev/mem as a way of increasing the security. Specifically, access to exclusive IOMEM and kernel RAM is denied unless CONFIG_STRICT_DEVMEM is set to 'n'. Implement the 'devmem_is_allowed()' interface for Powerpc. It will be called from range_is_allowed() when userpsace attempts to access /dev/mem. This patch is based on an earlier patch from Steve Best and with input from Paul Mackerras and Scott Wood. [BenH] Fixed a typo or two and removed the generic change which should be submitted as a separate patch Signed-off-by: NSukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 25 11月, 2011 9 次提交
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由 Benjamin Herrenschmidt 提交于
This adds support for p7IOC (and possibly other IODA v1 IO Hubs) using OPAL v2 interfaces. We completely take over resource assignment and assign them using an algorithm that hands out device BARs in a way that makes them fit in individual segments of the M32 window of the bridge, which enables us to assign individual PEs to devices and functions. The current implementation gives out a PE per functions on PCIe, and a PE for the entire bridge for PCIe to PCI-X bridges. This can be adjusted / fine tuned later. We also setup DMA resources (32-bit only for now) and MSIs (both 32-bit and 64-bit MSI are supported). The DMA allocation tries to divide the available 256M segments of the 32-bit DMA address space "fairly" among PEs. This is done using a "weight" heuristic which assigns less value to things like OHCI USB controllers than, for example SCSI RAID controllers. This algorithm will probably want some fine tuning for specific devices or device types. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
This is used for newer IO Hubs such as p7IOC. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
Some platforms need to perform resource allocation using a custom algorithm due to HW constraints, or may want to tweak things globally below a host bridge. For example OPAL support for IODA will need to perform a resource allocation pass that applies IODA specific segmentation constraints to MMIO which cannot be done simply using the kernel generic resource management code. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Geoff Thorpe 提交于
This adds a pgprot combination required by some cache-enabled IO device mappings, such as Freescale datapath (QMan and BMan) portals. Signed-off-by: NGeoff Thorpe <geoff@geoffthorpe.net> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Ravi K. Nittala 提交于
The RTAS firmware flash update is conducted using an RTAS call that is serialized by lock_rtas() which uses spin_lock. While the flash is in progress, rtasd performs scan for any RTAS events that are generated by the system. rtasd keeps scanning for the RTAS events generated on the machine. This is performed via workqueue mechanism. The rtas_event_scan() also uses an RTAS call to scan the events, eventually trying to acquire the spin_lock before issuing the request. The flash update takes a while to complete and during this time, any other RTAS call has to wait. In this case, rtas_event_scan() waits for a long time on the spin_lock resulting in a soft lockup. Fix: Just before the flash update is performed, the queued rtas_event_scan() work item is cancelled from the work queue so that there is no other RTAS call issued while the flash is in progress. After the flash completes, the system reboots and the rtas_event_scan() is rescheduled. Signed-off-by: NSuzuki Poulose <suzuki@in.ibm.com> Signed-off-by: NRavi Nittala <ravi.nittala@in.ibm.com> Reported-by: NDivya Vikas <divya.vikas@in.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Jimi Xenidis 提交于
ICSWX is also used by the A2 processor to access coprocessors, although not all "chips" that contain A2s have coprocessors. Signed-off-by: NJimi Xenidis <jimix@pobox.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Milton Miller 提交于
Some pseries IOMMUs cache TCEs but don't snoop when the TCEs are changed in memory, hence we need manually invalidate in software. This adds code to do the invalidate. It keys off a device tree property to say where the to do the MMIO for the invalidate and some information on what the format of the invalidate including some magic routing info. it_busno get overloaded with this magic routing info and it_index with the MMIO address for the invalidate command. This then gets hooked into the building and freeing of TCEs. This is only useful on bare metal pseries. pHyp takes care of this when virtualised. Based on patch from Milton with cleanups from Mikey. Signed-off-by: NMilton Miller <miltonm@bga.com> Signed-off-by: NMichael Neuling <mikey@neuling.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
decrementer_check_overflow is called from arch_local_irq_restore so we want to make it as light weight as possible. As such, turn decrementer_check_overflow into an inline function. To avoid a circular mess of includes, separate out the two components of struct decrementer_clock and keep the struct clock_event_device part local to time.c. The fast path improves from: arch_local_irq_restore 0: mflr r0 4: std r0,16(r1) 8: stdu r1,-112(r1) c: stb r3,578(r13) 10: cmpdi cr7,r3,0 14: beq- cr7,24 <.arch_local_irq_restore+0x24> ... 24: addi r1,r1,112 28: ld r0,16(r1) 2c: mtlr r0 30: blr to: arch_local_irq_restore 0: std r30,-16(r1) 4: ld r30,0(r2) 8: stb r3,578(r13) c: cmpdi cr7,r3,0 10: beq- cr7,6c <.arch_local_irq_restore+0x6c> ... 6c: ld r30,-16(r1) 70: blr Unfortunately we still setup a local TOC (due to -mminimal-toc). Yet another sign we should be moving to -mcmodel=medium. Signed-off-by: NAnton Blanchard <anton@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Anton Blanchard 提交于
When re-enabling interrupts we have code to handle edge sensitive decrementers by resetting the decrementer to 1 whenever it is negative. If interrupts were disabled long enough that the decrementer wrapped to positive we do nothing. This means interrupts can be delayed for a long time until it finally goes negative again. While we hope interrupts are never be disabled long enough for the decrementer to go positive, we have a very good test team that can drive any kernel into the ground. The softlockup data we get back from these fails could be seconds in the future, completely missing the cause of the lockup. We already keep track of the timebase of the next event so use that to work out if we should trigger a decrementer exception. Signed-off-by: NAnton Blanchard <anton@samba.org> Cc: stable@kernel.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 24 11月, 2011 1 次提交
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由 Jia Hongtao 提交于
Power supply for LBC registers is off when system go to deep-sleep state. We save the values of registers before suspend and restore to registers after resume. We removed the last two reservation arrays from struct fsl_lbc_regs for allocating less memory and minimizing the memcpy size. Signed-off-by: NJiang Yutang <b14898@freescale.com> Signed-off-by: NJia Hongtao <B38951@freescale.com> Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 11月, 2011 3 次提交
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由 Alexander Graf 提交于
This reverts commit a15bd354. It exceeded the padding on the SREGS struct, rendering the ABI backwards-incompatible. Conflicts: arch/powerpc/kvm/powerpc.c include/linux/kvm.h Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Benjamin Herrenschmidt 提交于
The Documentation/memory-barriers.txt document requires that atomic operations that return a value act as a memory barrier both before and after the actual atomic operation. Our current implementation doesn't guarantee this. More specifically, while a load following the isync can not be issued before stwcx. has completed, that completion doesn't architecturally means that the result of stwcx. is visible to other processors (or any previous stores for that matter) (typically, the other processors L1 caches can still hold the old value). This has caused an actual crash in RCU torture testing on Power 7 This fixes it by changing those atomic ops to use new macros instead of RELEASE/ACQUIRE barriers, called ATOMIC_ENTRY and ATMOIC_EXIT barriers, which are then defined respectively to lwsync and sync. I haven't had a chance to measure the performance impact (or rather what I measured with kernel compiles is in the noise, I yet have to find a more precise benchmark) Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
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由 Kumar Gala 提交于
With the introduction of CONFIG_PPC_ADV_DEBUG_REGS user space debug is broken on Book-E 64-bit parts that support delayed debug events. When switch_booke_debug_regs() sets DBCR0 we'll start getting debug events as MSR_DE is also set and we aren't able to handle debug events from kernel space. We can remove the hack that always enables MSR_DE and loads up DBCR0 and just utilize switch_booke_debug_regs() to get user space debug working again. We still need to handle critical/debug exception stacks & proper save/restore of state for those exception levles to support debug events from kernel space like we have on 32-bit. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 16 11月, 2011 1 次提交
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由 Anton Blanchard 提交于
kdump fails because we try to execute an HV only instruction. Feature fixups are being applied after we copy the exception vectors down to 0 so they miss out on any updates. We have always had this issue but it only became critical in v3.0 when we added CFAR support (breaks POWER5) and v3.1 when we added POWERNV (breaks everyone). Signed-off-by: NAnton Blanchard <anton@samba.org> Cc: <stable@kernel.org> [v3.0+] Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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