1. 16 12月, 2011 1 次提交
  2. 09 12月, 2011 1 次提交
  3. 08 12月, 2011 12 次提交
  4. 07 12月, 2011 11 次提交
  5. 28 11月, 2011 1 次提交
    • S
      powerpc: Implement CONFIG_STRICT_DEVMEM · 1d54cf2b
      sukadev@linux.vnet.ibm.com 提交于
      As described in the help text in the patch, this token restricts general
      access to /dev/mem as a way of increasing the security. Specifically, access
      to exclusive IOMEM and kernel RAM is denied unless CONFIG_STRICT_DEVMEM is
      set to 'n'.
      
      Implement the 'devmem_is_allowed()' interface for Powerpc. It will be
      called from range_is_allowed() when userpsace attempts to access /dev/mem.
      
      This patch is based on an earlier patch from Steve Best and with input from
      Paul Mackerras and Scott Wood.
      
      [BenH] Fixed a typo or two and removed the generic change which should
             be submitted as a separate patch
      Signed-off-by: NSukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1d54cf2b
  6. 25 11月, 2011 9 次提交
    • B
      powerpc/powernv: PCI support for p7IOC under OPAL v2 · 184cd4a3
      Benjamin Herrenschmidt 提交于
      This adds support for p7IOC (and possibly other IODA v1 IO Hubs)
      using OPAL v2 interfaces.
      
      We completely take over resource assignment and assign them using an
      algorithm that hands out device BARs in a way that makes them fit in
      individual segments of the M32 window of the bridge, which enables us
      to assign individual PEs to devices and functions.
      
      The current implementation gives out a PE per functions on PCIe, and a
      PE for the entire bridge for PCIe to PCI-X bridges.
      
      This can be adjusted / fine tuned later.
      
      We also setup DMA resources (32-bit only for now) and MSIs (both 32-bit
      and 64-bit MSI are supported).
      
      The DMA allocation tries to divide the available 256M segments of the
      32-bit DMA address space "fairly" among PEs. This is done using a
      "weight" heuristic which assigns less value to things like OHCI USB
      controllers than, for example SCSI RAID controllers. This algorithm
      will probably want some fine tuning for specific devices or device
      types.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      184cd4a3
    • B
      powerpc/powernv: Add TCE SW invalidation support · 1f1616e8
      Benjamin Herrenschmidt 提交于
      This is used for newer IO Hubs such as p7IOC.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1f1616e8
    • B
      powerpc/pci: Add a platform hook after probe and before resource survey · 491b98c3
      Benjamin Herrenschmidt 提交于
      Some platforms need to perform resource allocation using a custom algorithm
      due to HW constraints, or may want to tweak things globally below a host
      bridge. For example OPAL support for IODA will need to perform a
      resource allocation pass that applies IODA specific segmentation
      constraints to MMIO which cannot be done simply using the kernel generic
      resource management code.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      491b98c3
    • G
      powerpc: Add pgprot_cached_noncoherent() · 09c188c4
      Geoff Thorpe 提交于
      This adds a pgprot combination required by some cache-enabled IO device
      mappings, such as Freescale datapath (QMan and BMan) portals.
      Signed-off-by: NGeoff Thorpe <geoff@geoffthorpe.net>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      09c188c4
    • R
      powerpc/pseries: Cancel RTAS event scan before firmware flash · df17f56d
      Ravi K. Nittala 提交于
      The RTAS firmware flash update is conducted using an RTAS call that is
      serialized by lock_rtas() which uses spin_lock. While the flash is in
      progress, rtasd performs scan for any RTAS events that are generated by
      the system. rtasd keeps scanning for the RTAS events generated on the
      machine. This is performed via workqueue mechanism. The rtas_event_scan()
      also uses an RTAS call to scan the events, eventually trying to acquire
      the spin_lock before issuing the request.
      
      The flash update takes a while to complete and during this time, any other
      RTAS call has to wait. In this case, rtas_event_scan() waits for a long time
      on the spin_lock resulting in a soft lockup.
      
      Fix: Just before the flash update is performed, the queued rtas_event_scan()
      work item is cancelled from the work queue so that there is no other RTAS
      call issued while the flash is in progress. After the flash completes, the
      system reboots and the rtas_event_scan() is rescheduled.
      Signed-off-by: NSuzuki Poulose <suzuki@in.ibm.com>
      Signed-off-by: NRavi Nittala <ravi.nittala@in.ibm.com>
      Reported-by: NDivya Vikas <divya.vikas@in.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      df17f56d
    • J
      powerpc/book3e: Add ICSWX/ACOP support to Book3e cores like A2 · fac26ad4
      Jimi Xenidis 提交于
      ICSWX is also used by the A2 processor to access coprocessors,
      although not all "chips" that contain A2s have coprocessors.
      Signed-off-by: NJimi Xenidis <jimix@pobox.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      fac26ad4
    • M
      powerpc/pseries: Software invalidatation of TCEs · 8d3d589a
      Milton Miller 提交于
      Some pseries IOMMUs cache TCEs but don't snoop when the TCEs are changed
      in memory, hence we need manually invalidate in software.
      
      This adds code to do the invalidate.  It keys off a device tree property
      to say where the to do the MMIO for the invalidate and some information
      on what the format of the invalidate including some magic routing info.
      
      it_busno get overloaded with this magic routing info and it_index with
      the MMIO address for the invalidate command.
      
      This then gets hooked into the building and freeing of TCEs.
      
      This is only useful on bare metal pseries.  pHyp takes care of this when
      virtualised.
      
      Based on patch from Milton with cleanups from Mikey.
      Signed-off-by: NMilton Miller <miltonm@bga.com>
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8d3d589a
    • A
      powerpc/time: Optimise decrementer_check_overflow · 7df10275
      Anton Blanchard 提交于
      decrementer_check_overflow is called from arch_local_irq_restore so
      we want to make it as light weight as possible. As such, turn
      decrementer_check_overflow into an inline function.
      
      To avoid a circular mess of includes, separate out the two components
      of struct decrementer_clock and keep the struct clock_event_device
      part local to time.c.
      
      The fast path improves from:
      
      arch_local_irq_restore
           0:       mflr    r0
           4:       std     r0,16(r1)
           8:       stdu    r1,-112(r1)
           c:       stb     r3,578(r13)
          10:       cmpdi   cr7,r3,0
          14:       beq-    cr7,24 <.arch_local_irq_restore+0x24>
      ...
          24:       addi    r1,r1,112
          28:       ld      r0,16(r1)
          2c:       mtlr    r0
          30:       blr
      
      to:
      
      arch_local_irq_restore
          0:       std     r30,-16(r1)
          4:       ld      r30,0(r2)
          8:       stb     r3,578(r13)
          c:       cmpdi   cr7,r3,0
         10:       beq-    cr7,6c <.arch_local_irq_restore+0x6c>
      ...
         6c:       ld      r30,-16(r1)
         70:       blr
      
      Unfortunately we still setup a local TOC (due to -mminimal-toc). Yet
      another sign we should be moving to -mcmodel=medium.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      7df10275
    • A
      powerpc/time: Handle wrapping of decrementer · 37fb9a02
      Anton Blanchard 提交于
      When re-enabling interrupts we have code to handle edge sensitive
      decrementers by resetting the decrementer to 1 whenever it is negative.
      If interrupts were disabled long enough that the decrementer wrapped to
      positive we do nothing. This means interrupts can be delayed for a long
      time until it finally goes negative again.
      
      While we hope interrupts are never be disabled long enough for the
      decrementer to go positive, we have a very good test team that can
      drive any kernel into the ground. The softlockup data we get back
      from these fails could be seconds in the future, completely missing
      the cause of the lockup.
      
      We already keep track of the timebase of the next event so use that
      to work out if we should trigger a decrementer exception.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Cc: stable@kernel.org
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      37fb9a02
  7. 24 11月, 2011 1 次提交
  8. 17 11月, 2011 3 次提交
    • A
      Revert "KVM: PPC: Add support for explicit HIOR setting" · bb75c627
      Alexander Graf 提交于
      This reverts commit a15bd354.
      
      It exceeded the padding on the SREGS struct, rendering the ABI
      backwards-incompatible.
      
      Conflicts:
      
      	arch/powerpc/kvm/powerpc.c
      	include/linux/kvm.h
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      bb75c627
    • B
      powerpc: Fix atomic_xxx_return barrier semantics · b97021f8
      Benjamin Herrenschmidt 提交于
      The Documentation/memory-barriers.txt document requires that atomic
      operations that return a value act as a memory barrier both before
      and after the actual atomic operation.
      
      Our current implementation doesn't guarantee this. More specifically,
      while a load following the isync can not be issued before stwcx. has
      completed, that completion doesn't architecturally means that the
      result of stwcx. is visible to other processors (or any previous stores
      for that matter) (typically, the other processors L1 caches can still
      hold the old value).
      
      This has caused an actual crash in RCU torture testing on Power 7
      
      This fixes it by changing those atomic ops to use new macros instead
      of RELEASE/ACQUIRE barriers, called ATOMIC_ENTRY and ATMOIC_EXIT barriers,
      which are then defined respectively to lwsync and sync.
      
      I haven't had a chance to measure the performance impact (or rather
      what I measured with kernel compiles is in the noise, I yet have to
      find a more precise benchmark)
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
      b97021f8
    • K
      powerpc/book3e-64: Fix debug support for userspace · 187b9f2a
      Kumar Gala 提交于
      With the introduction of CONFIG_PPC_ADV_DEBUG_REGS user space debug is
      broken on Book-E 64-bit parts that support delayed debug events.  When
      switch_booke_debug_regs() sets DBCR0 we'll start getting debug events as
      MSR_DE is also set and we aren't able to handle debug events from kernel
      space.
      
      We can remove the hack that always enables MSR_DE and loads up DBCR0 and
      just utilize switch_booke_debug_regs() to get user space debug working
      again.
      
      We still need to handle critical/debug exception stacks & proper
      save/restore of state for those exception levles to support debug events
      from kernel space like we have on 32-bit.
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      187b9f2a
  9. 16 11月, 2011 1 次提交