- 21 12月, 2008 2 次提交
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由 Lennert Buytenhek 提交于
Split off Orion GPIO IRQ handling code into plat-orion/. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 10 10月, 2008 1 次提交
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由 Sylver Bruneau 提交于
This patch allows the use of the hardware watchdog in the Marvell Orion series of ARM SoCs. Signed-off-by: NSylver Bruneau <sylver.bruneau@googlemail.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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- 26 9月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
The Orion-1-90 (88F6183) is another member of the Orion SoC family, which has a 16 bit DDR2 interface, one x1 PCIe port (configurable as Root Complex or Endpoint), one 10/100/1000 ethernet interface, one USB 2.0 port with PHY, one SPDIF/I2S interface, one SDIO interface, one TWSI interface, two UARTs, one SPI interface, a NAND controller, a crypto engine, and a 4-channel DMA engine. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 09 8月, 2008 2 次提交
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由 Saeed Bishara 提交于
Signed-off-by: NSaeed Bishara <saeed@marvell.com> Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
On D0 5281 SoCs, we need to disable the wait-for-interrupt instruction due to an erratum. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com> Acked-by: NMartin Michlmayr <tbm@cyrius.com>
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- 07 8月, 2008 1 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 6月, 2008 2 次提交
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由 Ke Wei 提交于
Some Feroceon-based SoCs have an MBUS bridge interrupt controller that requires writing a one instead of a zero to clear edge interrupt sources such as timer expiry. This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NRussell King <linux@arm.linux.org.uk>
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- 28 3月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e. not the plat-orion bits.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NSaeed Bishara <saeed@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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