1. 25 10月, 2015 2 次提交
  2. 05 10月, 2015 4 次提交
  3. 28 8月, 2015 1 次提交
  4. 13 8月, 2015 1 次提交
  5. 04 8月, 2015 2 次提交
  6. 26 6月, 2015 1 次提交
  7. 28 5月, 2015 1 次提交
  8. 02 4月, 2015 1 次提交
  9. 30 3月, 2015 1 次提交
  10. 18 3月, 2015 1 次提交
    • E
      iwlwifi: mvm: properly flush the queues for buffering transport · fe92e32a
      Emmanuel Grumbach 提交于
      There are transport that must buffer frames in the driver.
      This means that we have frames that are not in the op_mode
      and not visible to the firwmare. This causes issues when we
      flush the queues: the op_mode flushes a queue, and the
      firmware flushes all the frames that are *currently* on the
      rings, but if the transport buffers frames, it can submit
      these while we are flushing. This leads to a situation
      where we still have frames on the queues after we flushed
      them.
      Preventing those buffered frame from getting into the
      firmware is possible, but then, we have to run the Tx
      response path on frames that didn't reach the firmware
      which is not desirable.
      The way I solve this here is to let these frames go to the
      firmware, but make sure the firmware will not transmit them
      (by setting the station as draining). The op_mode then needs
      to wait until the transport itself is empty to be sure that
      the queue is really empty.
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      fe92e32a
  11. 12 3月, 2015 2 次提交
  12. 01 2月, 2015 1 次提交
  13. 22 1月, 2015 3 次提交
  14. 29 12月, 2014 2 次提交
  15. 24 11月, 2014 5 次提交
  16. 11 11月, 2014 1 次提交
  17. 29 10月, 2014 1 次提交
  18. 21 9月, 2014 1 次提交
  19. 16 9月, 2014 1 次提交
    • A
      iwlwifi: mvm: prepare for scheduler config command · 3edf8ff6
      Avri Altman 提交于
      The scheduler is a HW sub-block that directs the work of the Flow
      Handler by issuing requests for frame transfers, specifying source
      and destination. Its primary function is to allocate flows into the
      TX FIFOs based upon a pre-determined mapping.
      
      The driver has some responsibilities to the scheduler, namely
      initialising and maintaining the hardware registers. This is
      currently done by directly accessing them, which can cause races
      with the firmware also accessing the registers.
      
      To address this problem, change the driver to no longer directly
      access the registers but go through the firmware for this if the
      firmware has support for DQA and thus the new command.
      Signed-off-by: NAvri Altman <avri.altman@intel.com>
      Signed-off-by: NJohannes Berg <johannes.berg@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      3edf8ff6
  20. 14 9月, 2014 1 次提交
  21. 04 9月, 2014 5 次提交
  22. 21 7月, 2014 2 次提交