- 18 5月, 2010 4 次提交
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由 Linus Walleij 提交于
This adds an argument to the DMAengine control function, so that we can later provide control commands that need some external data passed in through an argument akin to the ioctl() operation prototype. [dan.j.williams@intel.com: fix up some missed conversions] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Marcin Mielczarczyk 提交于
Fix for allocation failure of logical channel when event line happens to be number 0. Signed-off-by: NMarcin Mielczarczyk <marcin.mielczarczyk@tieto.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Jonas Aaberg 提交于
Support determining whether a channel is paused or not using the status function. Signed-off-by: NJonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Tobias Klauser 提交于
Use the resource_size function instead of manually calculating the resource size. This reduces the chance of introducing off-by-one errors. Signed-off-by: NTobias Klauser <tklauser@distanz.ch> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 17 5月, 2010 1 次提交
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由 Jassi Brar 提交于
The member 'private' of 'struct dma_chan' is meant for passing data between client and the controller driver. The DMA client driver may point it to platform specific stuff after acquiring the channel. So, it is the responsiblity of the same code to reset it, if it must. The DMA engine doesn't set it and hence, shouldn't reset it either. This reseting of private by DMA Engine comes in the way of implementing default channel settings during DMAC probe. That capability is useful for not having the clients to always provide platform specific data, like Rx/Tx FIFO addresses, which usually doesn't change across channel requests. Signed-off-by: NJassi Brar <jassi.brar@samsung.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 15 4月, 2010 1 次提交
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由 Linus Walleij 提交于
This is a straightforward driver for the ST-Ericsson DMA40 DMA controller found in U8500, implemented akin to the existing COH 901 318 driver. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidh Kasagar <srinidhi.kasagar@stericsson.com> Cc: STEricsson_nomadik_linux@list.st.com Cc: Alessandro Rubini <rubini@unipv.it> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 30 3月, 2010 1 次提交
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由 Stephen Rothwell 提交于
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 27 3月, 2010 4 次提交
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由 Dan Williams 提交于
Simple conditional struct filler to cut out some duplicated code. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
Convert the device_is_tx_complete() operation on the DMA engine to a generic device_tx_status()operation which can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE, DMA_TX_PAUSED. [dan.j.williams@intel.com: update for timberdale] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Li Yang <leoli@freescale.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Magnus Damm <damm@opensource.se> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Joe Perches <joe@perches.com> Cc: Roland Dreier <rdreier@cisco.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
Convert the device_terminate_all() operation on the DMA engine to a generic device_control() operation which can now optionally support also pausing and resuming DMA on a certain channel. Implemented for the COH 901 318 DMAC as an example. [dan.j.williams@intel.com: update for timberdale] Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Li Yang <leoli@freescale.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Magnus Damm <damm@opensource.se> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Joe Perches <joe@perches.com> Cc: Roland Dreier <rdreier@cisco.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Richard Röjfors 提交于
An incremental patch which clarifies what the spinlock is used for and fixes a compiler warning. Signed-off-by: NRichard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 26 3月, 2010 1 次提交
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由 Richard Röjfors 提交于
Adds the support for the DMA engine withing the timberdale FPGA. The DMA channels are strict device to host, or host to device and can not be used for generic memcpy. Signed-off-by: NRichard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 25 3月, 2010 2 次提交
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由 Linus Walleij 提交于
This makes the function to get the number of bytes left in the ongoing DMA transaction actually work: the old code did not take neither lli:s nor queued jobs into account. Also fix a missing spinlock while we're at it. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
This fixes up the code with a lot of comments that make it readable, rename things with opaque names like "data" into something more appropriate, and remove some very confusing BUG() statements. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 08 3月, 2010 1 次提交
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由 Emese Revfy 提交于
Constify struct sysfs_ops. This is part of the ops structure constification effort started by Arjan van de Ven et al. Benefits of this constification: * prevents modification of data that is shared (referenced) by many other structure instances at runtime * detects/prevents accidental (but not intentional) modification attempts on archs that enforce read-only kernel data at runtime * potentially better optimized code as the compiler can assume that the const data cannot be changed * the compiler/linker move const data into .rodata and therefore exclude them from false sharing Signed-off-by: NEmese Revfy <re.emese@gmail.com> Acked-by: NDavid Teigland <teigland@redhat.com> Acked-by: NMatt Domsch <Matt_Domsch@dell.com> Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com> Acked-by: NHans J. Koch <hjk@linutronix.de> Acked-by: NPekka Enberg <penberg@cs.helsinki.fi> Acked-by: NJens Axboe <jens.axboe@oracle.com> Acked-by: NStephen Hemminger <shemminger@vyatta.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 07 3月, 2010 1 次提交
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由 Akinobu Mita 提交于
Rename for_each_bit to for_each_set_bit in the kernel source tree. To permit for_each_clear_bit(), should that ever be added. The patch includes a macro to map the old for_each_bit() onto the new for_each_set_bit(). This is a (very) temporary thing to ease the migration. [akpm@linux-foundation.org: add temporary for_each_bit()] Suggested-by: NAlexey Dobriyan <adobriyan@gmail.com> Suggested-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Russell King <rmk@arm.linux.org.uk> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Artem Bityutskiy <dedekind@infradead.org> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 04 3月, 2010 6 次提交
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由 Dan Williams 提交于
If the calling convention of ->timer_fn() and ->cleanup_fn() are unified across hardware versions we can drop parameters to ioat_init_channel() and unify ioat_is_dma_complete() implementations. Both ->timer_fn() and ->cleanup_fn() are modified to expect a struct dma_chan pointer. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Dan Williams 提交于
The hardware automatically disables further interrupts after each event until rearmed. This allows a delay to be injected between the occurence of the interrupt and the running of the cleanup routine. The delay is scaled by the descriptor backlog and then written to the INTRDELAY register which specifies the number of microseconds to hold off interrupt delivery after an interrupt event occurs. According to powertop this reduces the interrupt rate from ~5000 intr/s to ~150 intr/s per without affecting throughput (simple dd to a raid6 array). Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Dan Williams 提交于
Since ioat_cleanup_preamble() and the update of the last completed descriptor are not synchronized there is a chance that two cleanup threads can see descriptors to clean. If the first cleans up all pending descriptors then the second will trigger the BUG_ON. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Dan Williams 提交于
The pending == 2 case no longer exists in the driver so, we can use ioat2_ring_pending() outside the lock to determine if there might be any descriptors in the ring that the hardware has not seen. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Dan Williams 提交于
Replace open coded ioat2_quiesce() call in ioat3_restart_channel Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Dan Williams 提交于
We already disallow raid operations while DCA is globally enabled, so having it locally enabled is a nop and confusing when reading the code. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 03 3月, 2010 5 次提交
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由 Linus Walleij 提交于
This makes the COH 901 318 respect the scatter offset field by using the sg_phys() rather than the sg_dma_address() so we get a pointer to the actual data we want to send rather than the beginning of the buffer. Also initialize the lli:s a bit more thoroughly. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
This makes the COH 901 318 configure channel direction (to or from device) dynamically, instead of being passed in from the platform data. This was necessary in order to get the MMC/SD-card channel bidirectional (all other channels on the U300 were either RX or TX but this one was both). This also sets memcpy() alignent to even 2^2 (32bit) boundaries, which makes the memcpy() stress tests start working. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
This removes the pointless irq counting for the COH 901 318, as it turns out the hardware will only ever fire one IRQ for a linked list anyway. In the process also a missing spinlock was introduced. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
This centralize some spread-out initialization of descriptors into one function and cleans up the error paths. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
This cleans up the some debug code that was not working in the COH 901 318 driver, adds some helpful comments and rearrange the code a bit. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 02 3月, 2010 7 次提交
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由 Piotr Ziecik 提交于
Adds initial version of MPC512x DMA driver. Only memory to memory transfers are currenly supported. Signed-off-by: NPiotr Ziecik <kosmo@semihalf.com> Signed-off-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Cc: John Rigby <jcrigby@gmail.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
This adds Kconfig options for DEBUG and VERBOSE_DEBUG to the DMA engine subsystem, I got tired of editing the Makefile manually each time I want to debug things in here, modelled this on the debug switches for other subsystems and works like a charm when working on our DMA engines. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Guennadi Liakhovetski 提交于
This patch extends the .device_terminate_all() method of the shdma driver to return number of bytes transfered in the current descriptor. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Provided platforms implement runtime PM, this disables the controller, when not in use. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
The shdma dmaengine driver currently uses numerous macros to support various platforms, selected by ifdef's. Convert it to use platform device resources and lists of channel descriptors to specify register locations, interrupt numbers and other system-specific configuration variants. Unavoidably, we have to simultaneously convert all shdma users to provide those resources. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Guennadi Liakhovetski 提交于
Present DMA error ISR in shdma.c is bogus, it locks the system hard in multiple ways. Fix it to abort all queued transactions on all channels on the affected controller and giving submitters a chance to get a DMA_ERROR status for aborted transactions. Afterwards further functionality is again possible without the need to re-load the driver. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 01 3月, 2010 4 次提交
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由 Dan Williams 提交于
Just like commit ac5d73fc, we need to be careful to use 'src_cnt' as it contains the fixed up number of xor sources (forced odd) to meet dmatest's data verification scheme. Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Anatolij Gustschin 提交于
The number of PQ sources specified by module parameter "pq_sources" is always forced odd to fit into dmatest's destination verificaton scheme. But number of PQ sources and coefficients as passed to the driver's prep_dma_pq() is not adjusted accordingly. Fix it now to get correct PQ testing results in the case passed "pq_sources" parameter is even. Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Cc: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Steven J. Magnani 提交于
fsl_dma_update_completed_cookie() appears to calculate the last completed cookie incorrectly in the corner case where DMA on cookie 1 is in progress just following a cookie wrap. Signed-off-by: NSteven J. Magnani <steve@digidescorp.com> Acked-by: NIra W. Snyder <iws@ovro.caltech.edu> [dan.j.williams@intel.com: fix an integer overflow warning with INT_MAX] Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Steven J. Magnani 提交于
fsl_dma_tx_submit() only sets the cookie on the first descriptor of a transaction. It should set the cookie on all. Signed-off-by: NSteven J. Magnani <steve@digidescorp.com> Acked-by: NIra W. Snyder <iws@ovro.caltech.edu> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 17 2月, 2010 1 次提交
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由 Tejun Heo 提交于
Add __percpu sparse annotations to places which didn't make it in one of the previous patches. All converions are trivial. These annotations are to make sparse consider percpu variables to be in a different address space and warn if accessed without going through percpu accessors. This patch doesn't affect normal builds. Signed-off-by: NTejun Heo <tj@kernel.org> Acked-by: NBorislav Petkov <borislav.petkov@amd.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Huang Ying <ying.huang@intel.com> Cc: Len Brown <lenb@kernel.org> Cc: Neil Brown <neilb@suse.de>
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- 11 2月, 2010 1 次提交
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由 Julia Lawall 提交于
cohd_fin has already been verified not to be NULL, so the argument to BUG_ON cannot be true. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ expression *x; expression e; identifier l; @@ if (x == NULL || ...) { ... when forall return ...; } ... when != goto l; when != x = e when != &x *x == NULL // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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