There are several situations when dw_mci_submit_data_dma() decides to
fall back to PIO mode instead of using DMA, due to a short (to avoid
overhead) or "complex" (e.g. with unaligned buffers) transaction, even
though host->use_dma is set. However dw_mci_stop_dma() decides whether
to stop DMA or set the EVENT_XFER_COMPLETE event based on host->use_dma.
When falling back to PIO mode this results in data timeout errors
getting missed and the driver locking up.

Therefore add host->using_dma to indicate whether the current
transaction is using dma or not, and adjust dw_mci_stop_dma() to use
that instead.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Signed-off-by: NWonil Choi <wonil22.choi@samsung.com>
Signed-off-by: NMinho Ban <mhban@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

In general, SDHC hardware timeout cannot be avoided.
Accordingly, the maximum timeout is specified to limit
the maximum discard size.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some host controllers will not operate without a hardware
timeout that is limited in value.  However large discards
require large timeouts, so there needs to be a way to
specify the maximum discard size.

A host controller driver may now specify the maximum discard
timeout possible so that max_discard_sectors can be calculated.

However, for eMMC when the High Capacity Erase Group Size
is not in use, the timeout calculation depends on clock
rate which may change.  For that case Preferred Erase Size
is used instead.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The use of flag ESDHC_FLAG_GPIO_FOR_CD_WP is all CD related.  It does
not necessarily need to bother WP in the flag name.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The function esdhc_readl_le intends to clear bit SDHCI_CARD_PRESENT,
when the card detect gpio tells there is no card.  But it does not
clear the bit actually.  The patch gives a fix on that.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NWolfram Sang <w.sang@pengutronix.de>
Cc: <stable@kernel.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The issue was initially found by Eric Benard as below.

http://permalink.gmane.org/gmane.linux.ports.arm.kernel/108031

Not sure about other SDHCI based controller, but on Freescale eSDHC,
the SDHCI_INT_CARD_INSERT bits will be immediately set again when it
gets cleared, if a card is inserted. The driver need to mask the irq
to prevent interrupt storm which will freeze the system.  And the
SDHCI_INT_CARD_REMOVE gets the same situation.

The patch fixes the problem based on the initial idea from
Eric Benard.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Eric Benard <eric@eukrea.com>
Tested-by: NArnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

There is a race condition in the tmio_mmc_irq() interrupt handler,
caused by the presence of a while loop, which results in warnings of
spurious interrupts. This was found on an HP iPAQ hx4700 whose HTC
ASIC3 reportedly incorporates the Toshiba TC6380AF controller.

Towards the end of a multiple read (CMD18) operation the handler clears
the final RXRDY status bit in the first loop iteration, sees the DATAEND
status bit at the bottom of the loop, and so clears the DATAEND status
bit in the second loop iteration. However the DATAEND interrupt is still
queued in the system somewhere and can't be delivered until the handler
has returned. This second interrupt is then reported as spurious in the
next call to the handler. Likewise for single read (CMD17) operations.
And something similar occurs for multiple write (CMD25) and single write
(CMD24) operations, where CMDRESPEND and TXRQ status bits are cleared in
a single call.

In these cases the interrupt handler clears two separate interrupts when
it should only clear the one interrupt for which it was invoked. The fix
is to remove the while loop.
Signed-off-by: NPaul Parsons <lost.distance@yahoo.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Only compile tmio_mmc_dma.o when CONFIG_MMC_SDHI is selected (as y or m).
Signed-off-by: NPaul Parsons <lost.distance@yahoo.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Update functions for PIO pushing and pulling data to and from the FIFO
so that they can handle unaligned output buffers and unaligned buffer
lengths. This makes more of the tests in mmc_test pass.

Unaligned lengths in pulls are handled by reading the full FIFO item,
and storing the remaining bytes in a small internal buffer (part_buf).
The next data pull will copy data out of this buffer first before
accessing the FIFO again. Similarly, for pushes the final bytes that
don't fill a FIFO item are stored in the part_buf (or sent anyway if
it's the last transfer), and then the part_buf is included at the
beginning of the next buffer pushed.

Unaligned buffers in pulls are handled specially if the architecture
cannot do efficient unaligned accesses, by reading FIFO items into a
aligned local buffer, and memcpy'ing them into the output buffer, again
storing any remaining bytes in the internal buffer. Similarly for pushes
the buffer is memcpy'd into an aligned local buffer then written to the
FIFO.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The FIFO_DEPTH hardware configuration parameter can be found from the
power-on value of RX_WMark in the FIFOTH register. This is used to
initialise the watermarks, but when calculating the number of free fifo
spaces a preprocessor definition is used which is hard coded to 32.

Fix reading the value out of FIFOTH (the default value in the RX_WMark
field is FIFO_DEPTH-1 not FIFO_DEPTH). Allow the fifo depth to be
overriden by platform data (since a bootloader may have changed FIFOTH
making auto-detection unreliable). Store the fifo_depth for later use.
Also fix the calculation to find the number of free bytes in the fifo to
include the fifo depth in the left shift by the data shift, since the
fifo depth is measured in fifo items not bytes.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Add brackets around use of the dev argument to the
mci_{read,write}{w,l,q}() macros, for extra safety.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Convert the card insert/remove tasklet to a workqueue, and call the
setpower platform specific callback without the spinlock held. This
means neither of the setpower or get_cd callbacks are called from atomic
context which allows them to sleep.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

When a request is made, the card presence is checked and the request is
queued. These two parts must be atomic with respect to card removal, or
a card removal could be handled in between, and the new request wouldn't
get cancelled until another card was inserted. Therefore move the
spinlock protection from dw_mci_queue_request() up into dw_mci_request()
to cover the presence check.

Note that the test_bit() used for the presence check isn't atomic
itself, so should have been protected by a spinlock anyway.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

DMA is only used for transactions exceeding a certain length, otherwise
PIO is used. The TXDR and RXDR interrupts are masked when in DMA mode
but still fire. When switching to PIO mode (e.g. to get SCR field when
an SD card is inserted) these interrupts are not cleared and so they
trigger the ISR as soon as they are unmasked. If the previous DMA did a
write, then the ISR will handle the TXDR interrupt even if the
transaction is a read, completing the transaction without modifying the
read buffer.

This is fixed primarily by clearing these two interrupts before
unmasking them when setting up PIO mode, and also by making the ISR more
robust by only handling TXDR/RXDR in the correct read/write direction.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some controllers require waiting for the bus to become idle
before writing to some registers. I have implemented this
by adding a hook to sd_ctrl_write16() and implementing
a hook for SDHI which waits for the bus to become idle.

Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NChris Ball <cjb@laptop.org>

Move register access functions into a shared header.
Use sd_ctrl_write16 in tmio_mmc_dma.c:tmio_mmc_enable_dma().

Other than avoiding (trivial) open-coding, the motivation for
this is to allow platform-hooks in access functions to
be applied across all applicable accesses.

Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NChris Ball <cjb@laptop.org>

This reflects at least the current usage of this register
and I think it improves the readability of the code ever so slightly.

Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NChris Ball <cjb@laptop.org>

Check the status bits in the r/w command response for any errors.
If error bits are set, then we won't have seen any data transferred,
so it's pointless doing any further checking.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Tested-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Command channel errors fall into four classes:

1. The command was issued with the card in the wrong state
2. The command failed to be received by the card correctly
3. The cards response failed to be received by the host (CRC error)
4. The card failed to respond to the card

For (1), in theory we should know that the card is in the correct state.
However, a failed stop command (or other failure) may result in the card
remaining in a data transfer state from the previous command.  If we
detect this condition, we try to recover by sending a stop command.

For the initial commands (set block count and the read/write command)
no data will have been transferred.  All that we need deal with is
retrying at this point.  A failed stop command can be remedied as
above.

If we are unable to recover the card (eg, the card ignores our requests
for status, or we don't recognise the error code) then we immediately
fail the request.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Tested-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

If the MMC_SEND_STATUS command is not successful, we should not return
a zero status word, but instead allow the caller to know positively
that an error occurred.

Convert the open-coded get_card_status() to use the helper function,
and provide definitions for the card state field.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Tested-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Response timeout (RTO), Response crc error (RCRC) and Response error (RE)
signals come with command done (CD) and can be raised preceding command
done (CD). That is these error interrupts and CD can be handled in
separate dw_mci_interrupt(). If mmc_request_done() is called because of
a response timeout before command done has occured, we might send the
next request before the CD of current request is finished. This can
bring about a broken sequence of request and request-done.

And Data error interrupt (DRTO, DCRC, SBE, EBE) and data transfer
over (DTO) have the same problem.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch sets the card_width bit of CTYPE for the corresponding card.

CTYPE[31] and CTYPE[16] correspond respectively to card[15] and card[0]
for 8-bit mode. And CTYPE[15] and CTYPE[0] correspond respectively to
card[15] and CTYPE[0] for 1-bit or 4-bit mode.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

As suggested by Arnd, move platform data to include/linux/platform_data
in order to improve build coverage for the driver.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

Delete obsolete sdhci-pxa.c, which was previously shared amongst the
entire PXA series.  Instead we now use sdhci-pxav3.c for mmp2 and
sdhci-pxav2.c for pxa9xx.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

sdhci-pltfm driver for PXAV2 SoCs, such as pxa910.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: NJun Nie <njun@marvell.com>
Signed-off-by: NQiming Wu <wuqm@marvell.com>
Acked-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

sdhci-pltfm driver for PXAV3 SoCs, such as MMP2.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

There are a couple of problems left from the sdhci pltfm and OF
consolidation changes.

* When building more than one sdhci-pltfm based drivers in the same
  image, linker will give multiple definition error on the sdhci-pltfm
  helper functions.  For example right now, building sdhci-of-esdhc
  and sdhci-of-hlwd together is a valid combination from Kconfig view.

* With the current build method, there is error with building the
  drivers as module, but module installation fails with modprobe.

The patch fixes above problems by changing sdhci-pltfm into a module.
To avoid EXPORT_SYMBOL on so many big endian IO accessors, it moves
these accessors into sdhci-pltfm.h as the 'static inline' functions.
As a result, sdhci.h needs to be included in sdhci-pltfm.h, and in
turn can be removed from individual drivers which already include
sdhci-pltfm.h.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The structure sdhci_pltfm_data is not necessarily to be in a public
header like include/linux/mmc/sdhci-pltfm.h, so the patch moves it
into drivers/mmc/host/sdhci-pltfm.h and eliminates the former one.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NGrant Likely <grant.likely@secretlab.ca>
Reviewed-by: NWolfram Sang <w.sang@pengutronix.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

The patch turns the sdhci-of-core common stuff into helper functions
added into sdhci-pltfm.c, and makes sdhci-of device drviers self
registered using the same pair of .probe and .remove used by
sdhci-pltfm device drivers.

As a result, sdhci-of-core.c and sdhci-of.h can be eliminated with
those common things merged into sdhci-pltfm.c and sdhci-pltfm.h
respectively.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Reviewed-by: NWolfram Sang <w.sang@pengutronix.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

The patch migrates the use of sdhci_of_host and sdhci_of_data to
sdhci_pltfm_host and sdhci_pltfm_data, so that the former pair can
be eliminated.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NGrant Likely <grant.likely@secretlab.ca>
Reviewed-by: NWolfram Sang <w.sang@pengutronix.de>
Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The patch turns the common stuff in sdhci-pltfm.c into functions, and
add device drivers their own .probe and .remove which in turn call
into the common functions, so that those sdhci-pltfm device drivers
register itself and keep all device specific things away from common
sdhci-pltfm file.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Reviewed-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

On reading the ext_csd for the first time (in 1 bit mode), save the
ext_csd information needed for bus width compare.

On every pass we make re-reading the ext_csd, compare the data
against the saved ext_csd data.

This fixes a regression introduced in 3.0-rc1 by 08ee80cc
("mmc: core: eMMC bus width may not work on all platforms"), which
incorrectly assumed we would be re-reading the ext_csd at resume-
time.
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Stresstesting insert/remove of SD-cards can trigger
a StartBitErr. This made the driver to hang in forever
waiting for a non ocurring data timeout.

This bit and interrupt is documented in the original
PL180 TRM, just never implemented until now.
Signed-off-by: NUlf Hansson <ulf.hansson@stericsson.com>
Reviewed-by: NLinus Walleij <linus.walleij@stericsson.com>
Reviewed-by: NJonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

SCSI defines discard alignment as the offset to the first
optimal discard.  In the case of SD/MMC, that is always zero
which is the default.

SCSI defines discard granularity as a hint of a optimal
discard size.  That is much better expressed by the MMC
"preferred erase size" (pref_erase) field.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

For example, an eMMC with 2 boot partitions will have 3 threads.
The names change from:

   40 ?        00:00:00 mmcqd/0
   41 ?        00:00:00 mmcqd/0
   42 ?        00:00:00 mmcqd/0

to:

   40 ?        00:00:00 mmcqd/0
   41 ?        00:00:00 mmcqd/0boot0
   42 ?        00:00:00 mmcqd/0boot1
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Cc: Andrei Warkentin <andreiw@motorola.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The erase timeout calculation may depend on clock rate
which is zero if the clock is gated, so use
mmc_host_clk_rate() which allows for that case.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The MMC block driver and other drivers (e.g. mmc-test) will expect
the card to be switched to the User Data Area eMMC partition when
they start.  Hence the MMC block driver should ensure it is that
way when it is removed.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Cc: Andrei Warkentin <andreiw@motorola.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

mmc_sdio_power_restore() skips some steps that are performed in other
power-related codepaths which are necessary to fully reset the card.
Without this, runtime PM fails for SD8686 SDIO wifi on OLPC XO-1.5.
Signed-off-by: NDaniel Drake <dsd@laptop.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Don't try to allocate DMA resources if the platform didn't specify
positive DMA slave IDs.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NChris Ball <cjb@laptop.org>