1. 22 10月, 2015 1 次提交
    • V
      powerpc/rtas: Validate rtas.entry before calling enter_rtas() · 8832317f
      Vasant Hegde 提交于
      Currently we do not validate rtas.entry before calling enter_rtas(). This
      leads to a kernel oops when user space calls rtas system call on a powernv
      platform (see below). This patch adds code to validate rtas.entry before
      making enter_rtas() call.
      
        Oops: Exception in kernel mode, sig: 4 [#1]
        SMP NR_CPUS=1024 NUMA PowerNV
        task: c000000004294b80 ti: c0000007e1a78000 task.ti: c0000007e1a78000
        NIP: 0000000000000000 LR: 0000000000009c14 CTR: c000000000423140
        REGS: c0000007e1a7b920 TRAP: 0e40   Not tainted  (3.18.17-340.el7_1.pkvm3_1_0.2400.1.ppc64le)
        MSR: 1000000000081000 <HV,ME>  CR: 00000000  XER: 00000000
        CFAR: c000000000009c0c SOFTE: 0
        NIP [0000000000000000]           (null)
        LR [0000000000009c14] 0x9c14
        Call Trace:
        [c0000007e1a7bba0] [c00000000041a7f4] avc_has_perm_noaudit+0x54/0x110 (unreliable)
        [c0000007e1a7bd80] [c00000000002ddc0] ppc_rtas+0x150/0x2d0
        [c0000007e1a7be30] [c000000000009358] syscall_exit+0x0/0x98
      
      Cc: stable@vger.kernel.org # v3.2+
      Fixes: 55190f88 ("powerpc: Add skeleton PowerNV platform")
      Reported-by: NNAGESWARA R. SASTRY <nasastry@in.ibm.com>
      Signed-off-by: NVasant Hegde <hegdevasant@linux.vnet.ibm.com>
      [mpe: Reword change log, trim oops, and add stable + fixes]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      8832317f
  2. 21 10月, 2015 4 次提交
    • P
      powerpc/powernv: Handle irq_happened flag correctly in off-line loop · 53c656c4
      Paul Mackerras 提交于
      This fixes a bug where it is possible for an off-line CPU to fail to go
      into a low-power state (nap/sleep/winkle), and to become unresponsive to
      requests from the KVM subsystem to wake up and run a VCPU. What can
      happen is that a maskable interrupt of some kind (external, decrementer,
      hypervisor doorbell, or HMI) after we have called local_irq_disable() at
      the beginning of pnv_smp_cpu_kill_self() and before interrupts are
      hard-disabled inside power7_nap/sleep/winkle(). In this situation, the
      pending event is marked in the irq_happened flag in the PACA. This
      pending event prevents power7_nap/sleep/winkle from going to the
      requested low-power state; instead they return immediately. We don't
      deal with any of these pending event flags in the off-line loop in
      pnv_smp_cpu_kill_self() because power7_nap et al. return 0 in this case,
      so we will have srr1 == 0, and none of the processing to clear
      interrupts or doorbells will be done.
      
      Usually, the most obvious symptom of this is that a KVM guest will fail
      with a console message saying "KVM: couldn't grab cpu N".
      
      This fixes the problem by making sure we handle the irq_happened flags
      properly. First, we hard-disable before the off-line loop. Once we have
      hard-disabled, the irq_happened flags can't change underneath us. We
      unconditionally clear the DEC and HMI flags: there is no processing of
      timer interrupts while off-line, and the necessary HMI processing is all
      done in lower-level code. We leave the EE and DBELL flags alone for the
      first iteration of the loop, so that we won't fail to respond to a
      split-core request that came in just before hard-disabling. Within the
      loop, we handle external interrupts if the EE bit is set in irq_happened
      as well as if the low-power state was interrupted by an external
      interrupt. (We don't need to do the msgclr for a pending doorbell in
      irq_happened, because doorbells are edge-triggered and don't remain
      pending in hardware.) Then we clear both the EE and DBELL flags, and
      once clear, they cannot be set again (until this CPU comes online again,
      that is).
      
      This also fixes the debug check to not be done when we just ran a KVM
      guest or when the sleep didn't happen because of a pending event in
      irq_happened.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      53c656c4
    • P
      powerpc: Revert "Use the POWER8 Micro Partition Prefetch Engine in KVM HV on POWER8" · 23316316
      Paul Mackerras 提交于
      This reverts commit 9678cdaa ("Use the POWER8 Micro Partition
      Prefetch Engine in KVM HV on POWER8") because the original commit had
      multiple, partly self-cancelling bugs, that could cause occasional
      memory corruption.
      
      In fact the logmpp instruction was incorrectly using register r0 as the
      source of the buffer address and operation code, and depending on what
      was in r0, it would either do nothing or corrupt the 64k page pointed to
      by r0.
      
      The logmpp instruction encoding and the operation code definitions could
      be corrected, but then there is the problem that there is no clearly
      defined way to know when the hardware has finished writing to the
      buffer.
      
      The original commit attempted to work around this by aborting the
      write-out before starting the prefetch, but this is ineffective in the
      case where the virtual core is now executing on a different physical
      core from the one where the write-out was initiated.
      
      These problems plus advice from the hardware designers not to use the
      function (since the measured performance improvement from using the
      feature was actually mostly negative), mean that reverting the code is
      the best option.
      
      Fixes: 9678cdaa ("Use the POWER8 Micro Partition Prefetch Engine in KVM HV on POWER8")
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      23316316
    • A
      KVM: arm: use GIC support unconditionally · 4a5d69b7
      Arnd Bergmann 提交于
      The vgic code on ARM is built for all configurations that enable KVM,
      but the parent_data field that it references is only present when
      CONFIG_IRQ_DOMAIN_HIERARCHY is set:
      
      virt/kvm/arm/vgic.c: In function 'kvm_vgic_map_phys_irq':
      virt/kvm/arm/vgic.c:1781:13: error: 'struct irq_data' has no member named 'parent_data'
      
      This flag is implied by the GIC driver, and indeed the VGIC code only
      makes sense if a GIC is present. This changes the CONFIG_KVM symbol
      to always select GIC, which avoids the issue.
      
      Fixes: 662d9715 ("arm/arm64: KVM: Kill CONFIG_KVM_ARM_{VGIC,TIMER}")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
      4a5d69b7
    • P
      KVM: arm/arm64: Fix memory leak if timer initialization fails · 399ea0f6
      Pavel Fedin 提交于
      Jump to correct label and free kvm_host_cpu_state
      Reviewed-by: NWei Huang <wei@redhat.com>
      Signed-off-by: NPavel Fedin <p.fedin@samsung.com>
      Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
      399ea0f6
  3. 20 10月, 2015 5 次提交
  4. 19 10月, 2015 4 次提交
    • T
      ARM: OMAP2+: Fix imprecise external abort caused by bogus SRAM init · 57df5380
      Tony Lindgren 提交于
      Some omaps are producing imprecise external aborts because we are
      wrongly trying to init SRAM for device tree based booting. Only
      omap3 is still using the legacy SRAM code, so we need to make it
      omap3 specific. Otherwise we can get errors like this on at least
      dm814x:
      
      Unhandled fault: imprecise external abort (0xc06) at 0xc08b156c
      ...
      (omap_rev) from [<c08b12e0>] (omap_sram_init+0xf8/0x3e0)
      (omap_sram_init) from [<c08aca0c>] (omap_sdrc_init+0x10/0xb0)
      (omap_sdrc_init) from [<c08b581c>] (pdata_quirks_init+0x18/0x44)
      (pdata_quirks_init) from [<c08b5478>] (omap_generic_init+0x10/0x1c)
      (omap_generic_init) from [<c08a57e0>] (customize_machine+0x1c/0x40)
      (customize_machine) from [<c00098a4>] (do_one_initcall+0x80/0x1dc)
      (do_one_initcall) from [<c08a2ec4>] (kernel_init_freeable+0x218/0x2e8)
      (kernel_init_freeable) from [<c063a554>] (kernel_init+0x8/0xec)
      (kernel_init) from [<c000f890>] (ret_from_fork+0x14/0x24)
      
      Let's fix the issue by making sure omap_sdrc_init only gets called for
      omap3. To do that, we need to have compatible "ti,omap3" in the dts
      files. And let's also use "ti,omap3630" instead of "ti,omap36xx" like
      we're supposed to.
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      57df5380
    • A
      x86, kasan: Fix build failure on KASAN=y && KMEMCHECK=y kernels · a75ca545
      Andrey Ryabinin 提交于
      Declaration of memcpy() is hidden under #ifndef CONFIG_KMEMCHECK.
      In asm/efi.h under #ifdef CONFIG_KASAN we #undef memcpy(), due to
      which the following happens:
      
        In file included from arch/x86/kernel/setup.c:96:0:
        ./arch/x86/include/asm/desc.h: In function ‘native_write_idt_entry’:
        ./arch/x86/include/asm/desc.h:122:2: error: implicit declaration of function ‘memcpy’ [-Werror=implicit-function-declaration]   memcpy(&idt[entry], gate, sizeof(*gate));
          ^
          cc1: some warnings being treated as errors
          make[2]: *** [arch/x86/kernel/setup.o] Error 1
      
      We will get rid of that #undef in asm/efi.h eventually.
      But in the meanwhile move memcpy() declaration out of #ifdefs
      to fix the build.
      Reported-by: NBorislav Petkov <bp@alien8.de>
      Signed-off-by: NAndrey Ryabinin <aryabinin@virtuozzo.com>
      Cc: Andy Lutomirski <luto@amacapital.net>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Link: http://lkml.kernel.org/r/1444994933-28328-1-git-send-email-aryabinin@virtuozzo.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      a75ca545
    • L
      x86/smpboot: Fix CPU #1 boot timeout · fcafddec
      Len Brown 提交于
      The following commit:
      
        a9bcaa02 ("x86/smpboot: Remove SIPI delays from cpu_up()")
      
      Caused some Intel Core2 processors to time-out when bringing up CPU #1,
      resulting in the missing of that CPU after bootup.
      
      That patch reduced the SIPI delays from udelay() 300, 200 to udelay() 0,
      0 on modern processors.
      
      Several Intel(R) Core(TM)2 systems failed to bring up CPU #1 10/10 times
      after that change.
      
      Increasing either of the SIPI delays to udelay(1) results in
      success. So here we increase both to udelay(10).  While this may
      be 20x slower than the absolute minimum, it is still 20x to 30x
      faster than the original code.
      Tested-by: NDonald Parsons <dparsons@brightdsl.net>
      Tested-by: NShane <shrybman@teksavvy.com>
      Signed-off-by: NLen Brown <len.brown@intel.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: dparsons@brightdsl.net
      Cc: shrybman@teksavvy.com
      Link: http://lkml.kernel.org/r/6dd554ee8945984d85aafb2ad35793174d068af0.1444968087.git.len.brown@intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      fcafddec
    • L
      x86/smpboot: Fix cpu_init_udelay=10000 corner case boot parameter misbehavior · f1ccd249
      Len Brown 提交于
      For legacy machines cpu_init_udelay defaults to 10,000.
      For modern machines it is set to 0.
      
      The user should be able to set cpu_init_udelay to
      any value on the cmdline, including 10,000.
      
      Before this patch, that was seen as "unchanged from default"
      and thus on a modern machine, the user request was ignored
      and the delay was set to 0.
      Signed-off-by: NLen Brown <len.brown@intel.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: dparsons@brightdsl.net
      Cc: shrybman@teksavvy.com
      Link: http://lkml.kernel.org/r/de363cdbbcfcca1d22569683f7eb9873e0177251.1444968087.git.len.brown@intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      f1ccd249
  5. 17 10月, 2015 2 次提交
    • T
      ARM: OMAP2+: Fix oops with LPAE and more than 2GB of memory · 6a3b764b
      Tony Lindgren 提交于
      On boards with more than 2GB of RAM booting goes wrong with things not
      working and we're getting lots of l3 warnings:
      
      WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147
      l3_interrupt_handler+0x260/0x384()
      44000000.ocp:L3 Custom Error: MASTER MMC6 TARGET DMM1 (Idle):
      Data Access in User mode during Functional access
      ...
      [<c044e158>] (scsi_add_host_with_dma) from [<c04705c8>]
      (ata_scsi_add_hosts+0x5c/0x18c)
      [<c04705c8>] (ata_scsi_add_hosts) from [<c046b13c>]
      (ata_host_register+0x150/0x2cc)
      [<c046b13c>] (ata_host_register) from [<c046b38c>]
      (ata_host_activate+0xd4/0x124)
      [<c046b38c>] (ata_host_activate) from [<c047f42c>]
      (ahci_host_activate+0x5c/0x194)
      [<c047f42c>] (ahci_host_activate) from [<c0480854>]
      (ahci_platform_init_host+0x1f0/0x3f0)
      [<c0480854>] (ahci_platform_init_host) from [<c047c9dc>]
      (ahci_probe+0x70/0x98)
      [<c047c9dc>] (ahci_probe) from [<c04220cc>]
      (platform_drv_probe+0x54/0xb4)
      
      Let's fix the issue by enabling ZONE_DMA for LPAE. Note that we need to
      limit dma_zone_size to 2GB as the rest of the RAM is beyond the 4GB limit.
      
      Let's also fix things for dra7 as done in similar patches in the TI tree
      by Lokesh Vutla <lokeshvutla@ti.com>.
      Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      6a3b764b
    • R
      sh: add copy_user_page() alias for __copy_user() · 934ed25e
      Ross Zwisler 提交于
      copy_user_page() is needed by DAX.  Without this we get a compile error
      for DAX on SH:
      
        fs/dax.c:280:2: error: implicit declaration of function `copy_user_page' [-Werror=implicit-function-declaration]
          copy_user_page(vto, (void __force *)vfrom, vaddr, to);
            ^
      
      This was done with a random config that happened to include DAX support.
      
      This patch has only been compile tested.
      Signed-off-by: NRoss Zwisler <ross.zwisler@linux.intel.com>
      Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Matthew Wilcox <willy@linux.intel.com>
      Cc: Matt Fleming <matt@codeblueprint.co.uk>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      934ed25e
  6. 16 10月, 2015 2 次提交
    • V
      x86/ioapic: Disable interrupts when re-routing legacy IRQs · c0ff971e
      Vitaly Kuznetsov 提交于
      A sporadic hang with consequent crash is observed when booting Hyper-V Gen1
      guests:
      
       Call Trace:
        <IRQ>
        [<ffffffff810ab68d>] ? trace_hardirqs_off+0xd/0x10
        [<ffffffff8107b616>] queue_work_on+0x46/0x90
        [<ffffffff81365696>] ? add_interrupt_randomness+0x176/0x1d0
        ...
        <EOI>
        [<ffffffff81471ddb>] ? _raw_spin_unlock_irqrestore+0x3b/0x60
        [<ffffffff810c295e>] __irq_put_desc_unlock+0x1e/0x40
        [<ffffffff810c5c35>] irq_modify_status+0xb5/0xd0
        [<ffffffff8104adbb>] mp_register_handler+0x4b/0x70
        [<ffffffff8104c55a>] mp_irqdomain_alloc+0x1ea/0x2a0
        [<ffffffff810c7f10>] irq_domain_alloc_irqs_recursive+0x40/0xa0
        [<ffffffff810c860c>] __irq_domain_alloc_irqs+0x13c/0x2b0
        [<ffffffff8104b070>] alloc_isa_irq_from_domain.isra.1+0xc0/0xe0
        [<ffffffff8104bfa5>] mp_map_pin_to_irq+0x165/0x2d0
        [<ffffffff8104c157>] pin_2_irq+0x47/0x80
        [<ffffffff81744253>] setup_IO_APIC+0xfe/0x802
        ...
        [<ffffffff814631c0>] ? rest_init+0x140/0x140
      
      The issue is easily reproducible with a simple instrumentation: if
      mdelay(10) is put between mp_setup_entry() and mp_register_handler() calls
      in mp_irqdomain_alloc() Hyper-V guest always fails to boot when re-routing
      IRQ0. The issue seems to be caused by the fact that we don't disable
      interrupts while doing IOPIC programming for legacy IRQs and IRQ0 actually
      happens. 
      
      Protect the setup sequence against concurrent interrupts.
      
      [ tglx: Make the protection unconditional and not only for legacy
        	interrupts ]
      Signed-off-by: NVitaly Kuznetsov <vkuznets@redhat.com>
      Cc: Jiang Liu <jiang.liu@linux.intel.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: K. Y. Srinivasan <kys@microsoft.com>
      Link: http://lkml.kernel.org/r/1444930943-19336-1-git-send-email-vkuznets@redhat.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      c0ff971e
    • P
      x86/setup: Extend low identity map to cover whole kernel range · f5f3497c
      Paolo Bonzini 提交于
      On 32-bit systems, the initial_page_table is reused by
      efi_call_phys_prolog as an identity map to call
      SetVirtualAddressMap.  efi_call_phys_prolog takes care of
      converting the current CPU's GDT to a physical address too.
      
      For PAE kernels the identity mapping is achieved by aliasing the
      first PDPE for the kernel memory mapping into the first PDPE
      of initial_page_table.  This makes the EFI stub's trick "just work".
      
      However, for non-PAE kernels there is no guarantee that the identity
      mapping in the initial_page_table extends as far as the GDT; in this
      case, accesses to the GDT will cause a page fault (which quickly becomes
      a triple fault).  Fix this by copying the kernel mappings from
      swapper_pg_dir to initial_page_table twice, both at PAGE_OFFSET and at
      identity mapping.
      
      For some reason, this is only reproducible with QEMU's dynamic translation
      mode, and not for example with KVM.  However, even under KVM one can clearly
      see that the page table is bogus:
      
          $ qemu-system-i386 -pflash OVMF.fd -M q35 vmlinuz0 -s -S -daemonize
          $ gdb
          (gdb) target remote localhost:1234
          (gdb) hb *0x02858f6f
          Hardware assisted breakpoint 1 at 0x2858f6f
          (gdb) c
          Continuing.
      
          Breakpoint 1, 0x02858f6f in ?? ()
          (gdb) monitor info registers
          ...
          GDT=     0724e000 000000ff
          IDT=     fffbb000 000007ff
          CR0=0005003b CR2=ff896000 CR3=032b7000 CR4=00000690
          ...
      
      The page directory is sane:
      
          (gdb) x/4wx 0x32b7000
          0x32b7000:	0x03398063	0x03399063	0x0339a063	0x0339b063
          (gdb) x/4wx 0x3398000
          0x3398000:	0x00000163	0x00001163	0x00002163	0x00003163
          (gdb) x/4wx 0x3399000
          0x3399000:	0x00400003	0x00401003	0x00402003	0x00403003
      
      but our particular page directory entry is empty:
      
          (gdb) x/1wx 0x32b7000 + (0x724e000 >> 22) * 4
          0x32b7070:	0x00000000
      
      [ It appears that you can skate past this issue if you don't receive
        any interrupts while the bogus GDT pointer is loaded, or if you avoid
        reloading the segment registers in general.
      
        Andy Lutomirski provides some additional insight:
      
         "AFAICT it's entirely permissible for the GDTR and/or LDT
          descriptor to point to unmapped memory.  Any attempt to use them
          (segment loads, interrupts, IRET, etc) will try to access that memory
          as if the access came from CPL 0 and, if the access fails, will
          generate a valid page fault with CR2 pointing into the GDT or
          LDT."
      
        Up until commit 23a0d4e8 ("efi: Disable interrupts around EFI
        calls, not in the epilog/prolog calls") interrupts were disabled
        around the prolog and epilog calls, and the functional GDT was
        re-installed before interrupts were re-enabled.
      
        Which explains why no one has hit this issue until now. ]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Reported-by: NLaszlo Ersek <lersek@redhat.com>
      Cc: <stable@vger.kernel.org>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Andy Lutomirski <luto@amacapital.net>
      Signed-off-by: NMatt Fleming <matt.fleming@intel.com>
      [ Updated changelog. ]
      f5f3497c
  7. 15 10月, 2015 4 次提交
    • T
      ARM: tegra: Comment out gpio-ranges properties · 4f1d8414
      Thierry Reding 提交于
      While the addition of these properties is technically correct it unveils
      a bug with deferred probe. The problem is that the presence of the gpio-
      range property causes the gpio-tegra driver to defer probe (it needs the
      pinctrl driver to be ready). That's technically correct, but it causes a
      couple of issues:
      
        - The keyboard on Chromebooks stops working. The reason for that is
          that the gpio-tegra device has not registered an IRQ domain by the
          time the EC SPI device is registered, hence the interrupt number
          resolves to 0. This is technically a bug in the SPI core, since it
          should really resolve the interrupt at probe time and defer if the
          IRQ domain isn't available yet. This is similar to what's done for
          I2C and platform device already.
      
        - The gpio-tegra device deferring probe means that it is moved to the
          end of the dpm_list. This list defines the suspend/resume order for
          devices. However the core lacks a way to move all users of the
          gpio-tegra device to the end of the dpm_list at the same time. This
          in turn results in a subtle bug on Jetson TK1, where the gpio-keys
          device is used to expose the power key as input. The power key is a
          convenient way to wake the system from suspend. Interestingly, the
          gpio-keys device ends up getting probed at a point after gpio-tegra
          has been probed successfully from having been deferred earlier. As
          such the driver doesn't need to defer the probe itself, and hence
          the device isn't moved to the end of the dpm_list. This causes the
          gpio-tegra device to be suspended before gpio-keys, which in turn
          leaves gpio-keys unable to wake the system from suspend.
      
      There are patches in the works to fix both of the above issues, but they
      are too involved to make it into v4.3, so in the meantime let's fix the
      regressions by commenting out the gpio-ranges properties until the fixes
      have landed.
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      4f1d8414
    • M
      ARM: dts: uniphier: fix IRQ number for devices on PH1-LD6b ref board · 2e4e5da5
      Masahiro Yamada 提交于
      The IRQ signal from external devices on this board is connected to
      the XIRQ4 pin of the SoC.  The IRQ number should be 52, not 50.
      
      Fixes: a5e921b4 ("ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support")
      Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      2e4e5da5
    • M
      ARM: mvebu: correct a385-db-ap compatible string · db347f1a
      Marcin Wojtas 提交于
      This commit enables standby support on Armada 385 DB-AP board, because
      the PM initalization routine requires "marvell,armada380" compatible
      string for all Armada 38x-based platforms.
      
      Beside the compatible "marvell,armada38x" was wrong and should be fixed
      in the stable kernels too.
      
      [gregory.clement@free-electrons.com: add information, about the fixes]
      Fixes: e5ee1281 ("ARM: mvebu: Add Armada 385 Access Point
      Development Board support")
      Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
      Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      Cc: <stable@vger.kernel.org>
      db347f1a
    • C
      ARM: meson6: DTS: Fix wrong reg mapping and IRQ numbers · f9e5ca86
      Carlo Caione 提交于
      The DTS erronously uses the wrong reg mapping and IRQ numbers for some
      UART, WDT and timer nodes. Fix this.
      Reported-by: NJohn Wehle <john@feith.com>
      Signed-off-by: NCarlo Caione <carlo@endlessm.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      f9e5ca86
  8. 14 10月, 2015 10 次提交
  9. 13 10月, 2015 5 次提交
    • T
      ARM: dts: am57xx-beagle-x15: set VDD_SD to always-on · 7e381ec6
      Tomi Valkeinen 提交于
      LDO1 regulator (VDD_SD) is connected to SoC's vddshv8. vddshv8 needs to
      be kept always powered (see commit 5a0f93c6 ("ARM: dts: Add
      am57xx-beagle-x15"), but at the moment VDD_SD is enabled/disabled
      depending on whether an SD card is inserted or not.
      
      This patch sets LDO1 regulator to always-on.
      
      This patch has a side effect of fixing another issue, HDMI DDC not
      working when SD card is not inserted:
      
      Why this happens is that the tpd12s015 (HDMI level shifter/ESD
      protection chip) has LS_OE GPIO input, which needs to be enabled for the
      HDMI DDC to work. LS_OE comes from gpio6_28. The pin that provides
      gpio6_28 is powered by vddshv8, and vddshv8 comes from VDD_SD.
      
      So when SD card is not inserted, VDD_SD is disabled, and LS_OE stays
      off.
      
      The proper fix for the HDMI DDC issue would be to maybe have the pinctrl
      framework manage the pin specific power.
      
      Apparently this fixes also a third issue (copy paste from Kishon's
      patch):
      
      ldo1_reg in addition to being connected to the io lines is also
      connected to the card detect line. On card removal, omap_hsmmc
      driver does a regulator_disable causing card detect line to be
      pulled down. This raises a card insertion interrupt and once the
      MMC core detects there is no card inserted, it does a
      regulator disable which again raises a card insertion interrupt.
      This happens in a loop causing infinite MMC interrupts.
      
      Fixes: 5a0f93c6 ("ARM: dts: Add am57xx-beagle-x15")
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      Reported-by: NLouis McCarthy <compeoree@gmail.com>
      Acked-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7e381ec6
    • A
      ARM: dts: Fix audio card detection on Peach boards · b8bb9baa
      Alim Akhtar 提交于
      Since commit 2fad972d ("ARM: dts: Add mclk entry for Peach boards"),
      sound card detection is broken on peach boards and gives below errors:
      
      [    3.630457] max98090 7-0010: MAX98091 REVID=0x51
      [    3.634233] max98090 7-0010: use default 2.8v micbias
      [    3.640985] snow-audio sound: HiFi <-> 3830000.i2s mapping ok
      [    3.645307] max98090 7-0010: Invalid master clock frequency
      [    3.650824] snow-audio sound: ASoC: Peach-Pi-I2S-MAX98091 late_probe() failed: -22
      [    3.658914] snow-audio sound: snd_soc_register_card failed (-22)
      [    3.664366] snow-audio: probe of sound failed with error -22
      
      This patch adds missing assigned-clocks and assigned-clock-parents for
      pmu_system_controller node which is used as "mclk" for audio codec.
      
      Fixes: 2fad972d ("ARM: dts: Add mclk entry for Peach boards")
      Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com>
      Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NKukjin Kim <kgene@kernel.org>
      b8bb9baa
    • K
      ARM: EXYNOS: Fix double of_node_put() when parsing child power domains · 51a6256b
      Krzysztof Kozlowski 提交于
      On each next iteration of for_each_compatible_node() the reference
      counter for current device node is already decreased by the loop
      iterator. The manual call to of_node_get() is required only on loop
      break which is not happening here.
      
      The double of_node_get() (with enabled CONFIG_OF_DYNAMIC) lead to
      decreasing the counter below expected, initial value.
      
      Fixes: fe4034a3 ("ARM: EXYNOS: Add missing of_node_put() when parsing power domains")
      Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NKukjin Kim <kgene@kernel.org>
      51a6256b
    • M
      arm64: Fix MINSIGSTKSZ and SIGSTKSZ · c9692657
      Manjeet Pawar 提交于
      MINSIGSTKSZ and SIGSTKSZ for ARM64 are not correctly set in latest kernel.
      This patch fixes this issue.
      
      This issue is reported in LTP (testcase: sigaltstack02.c).
      Testcase failed when sigaltstack() called with stack size "MINSIGSTKSZ - 1"
      Since in Glibc-2.22, MINSIGSTKSZ is set to 5120 but in kernel
      it is set to 2048 so testcase gets failed.
      
      Testcase Output:
      sigaltstack02 1  TPASS  :  stgaltstack() fails, Invalid Flag value,errno:22
      sigaltstack02 2  TFAIL  :  sigaltstack() returned 0, expected -1,errno:12
      
      Reported Issue in Glibc Bugzilla:
      Bugfix in Glibc-2.22: [Bug 16850]
      https://sourceware.org/bugzilla/show_bug.cgi?id=16850Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NAkhilesh Kumar <akhilesh.k@samsung.com>
      Signed-off-by: NManjeet Pawar <manjeet.p@samsung.com>
      Signed-off-by: NRohit Thapliyal <r.thapliyal@samsung.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      c9692657
    • W
      arm64: errata: use KBUILD_CFLAGS_MODULE for erratum #843419 · b6dd8e07
      Will Deacon 提交于
      Commit df057cc7 ("arm64: errata: add module build workaround for
      erratum #843419") sets CFLAGS_MODULE to ensure that the large memory
      model is used by the compiler when building kernel modules.
      
      However, CFLAGS_MODULE is an environment variable and intended to be
      overridden on the command line, which appears to be the case with the
      Ubuntu kernel packaging system, so use KBUILD_CFLAGS_MODULE instead.
      
      Cc: <stable@vger.kernel.org>
      Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
      Fixes: df057cc7 ("arm64: errata: add module build workaround for erratum #843419")
      Reported-by: NDann Frazier <dann.frazier@canonical.com>
      Tested-by: NDann Frazier <dann.frazier@canonical.com>
      Signed-off-by: NWill Deacon <will.deacon@arm.com>
      b6dd8e07
  10. 09 10月, 2015 2 次提交
    • D
      powerpc/powernv: Panic on unhandled Machine Check · f2dd80ec
      Daniel Axtens 提交于
      All unrecovered machine check errors on PowerNV should cause an
      immediate panic. There are 2 reasons that this is the right policy:
      it's not safe to continue, and we're already trying to reboot.
      
      Firstly, if we go through the recovery process and do not successfully
      recover, we can't be sure about the state of the machine, and it is
      not safe to recover and proceed.
      
      Linux knows about the following sources of Machine Check Errors:
      - Uncorrectable Errors (UE)
      - Effective - Real Address Translation (ERAT)
      - Segment Lookaside Buffer (SLB)
      - Translation Lookaside Buffer (TLB)
      - Unknown/Unrecognised
      
      In the SLB, TLB and ERAT cases, we can further categorise these as
      parity errors, multihit errors or unknown/unrecognised.
      
      We can handle SLB errors by flushing and reloading the SLB. We can
      handle TLB and ERAT multihit errors by flushing the TLB. (It appears
      we may not handle TLB and ERAT parity errors: I will investigate
      further and send a followup patch if appropriate.)
      
      This leaves us with uncorrectable errors. Uncorrectable errors are
      usually the result of ECC memory detecting an error that it cannot
      correct, but they also crop up in the context of PCI cards failing
      during DMA writes, and during CAPI error events.
      
      There are several types of UE, and there are 3 places a UE can occur:
      Skiboot, the kernel, and userspace. For Skiboot errors, we have the
      facility to make some recoverable. For userspace, we can simply kill
      (SIGBUS) the affected process. We have no meaningful way to deal with
      UEs in kernel space or in unrecoverable sections of Skiboot.
      
      Currently, these unrecovered UEs fall through to
      machine_check_expection() in traps.c, which calls die(), which OOPSes
      and sends SIGBUS to the process. This sometimes allows us to stumble
      onwards. For example we've seen UEs kill the kernel eehd and
      khugepaged. However, the process killed could have held a lock, or it
      could have been a more important process, etc: we can no longer make
      any assertions about the state of the machine. Similarly if we see a
      UE in skiboot (and again we've seen this happen), we're not in a
      position where we can make any assertions about the state of the
      machine.
      
      Likewise, for unknown or unrecognised errors, we're not able to say
      anything about the state of the machine.
      
      Therefore, if we have an unrecovered MCE, the most appropriate thing
      to do is to panic.
      
      The second reason is that since e784b649 ("powerpc/powernv: Invoke
      opal_cec_reboot2() on unrecoverable machine check errors."), we
      attempt a special OPAL reboot on an unhandled MCE. This is so the
      hardware can record error data for later debugging.
      
      The comments in that commit assert that we are heading down the panic
      path anyway. At the moment this is not always true. With UEs in kernel
      space, for instance, they are marked as recoverable by the hardware,
      so if the attempt to reboot failed (e.g. old Skiboot), we wouldn't
      panic() but would simply die() and OOPS. It doesn't make sense to be
      staggering on if we've just tried to reboot: we should panic().
      
      Explicitly panic() on unrecovered MCEs on PowerNV.
      Update the comments appropriately.
      
      This fixes some hangs following EEH events on cxlflash setups.
      Signed-off-by: NDaniel Axtens <dja@axtens.net>
      Reviewed-by: NAndrew Donnellan <andrew.donnellan@au1.ibm.com>
      Reviewed-by: NIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      f2dd80ec
    • C
      powerpc: Fix checkstop in native_hpte_clear() with lockdep · fdf880a6
      Cyril Bur 提交于
      native_hpte_clear() is called in real mode from two places:
      - Early in boot during htab initialisation if firmware assisted dump is
        active.
      - Late in the kexec path.
      
      In both contexts there is no need to disable interrupts are they are
      already disabled. Furthermore, locking around the tlbie() is only required
      for pre POWER5 hardware.
      
      On POWER5 or newer hardware concurrent tlbie()s work as expected and on pre
      POWER5 hardware concurrent tlbie()s could result in deadlock. This code
      would only be executed at crashdump time, during which all bets are off,
      concurrent tlbie()s are unlikely and taking locks is unsafe therefore the
      best course of action is to simply do nothing. Concurrent tlbie()s are not
      possible in the first case as secondary CPUs have not come up yet.
      Signed-off-by: NCyril Bur <cyrilbur@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      fdf880a6
  11. 08 10月, 2015 1 次提交