This avoids going through the list unnecessarily when
idling devices for runtime PM.

Based on an earlier patch by sricharan <r.sricharan@ti.com>.
Signed-off-by: Nsricharan <r.sricharan@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The patch adds the new power management trace points for
the OMAP architecture.

The trace points are for:
- default idle handler. Since the cpuidle framework is
  instrumented in the generic way there is no need to
  add trace points in the OMAP specific cpuidle handler;
- SoC clocks changes (enable, disable, set_rate),
- power domain states: the desired target state and -if different-
  the actually hit state.

Because of the generic nature of the changes, OMAP3 and OMAP4 are supported.

Tested on OMAP3 with suspend/resume, cpuidle, basic DVFS.
Signed-off-by: NJean Pihet <j-pihet@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

This Patch adds OPP enteries for IVA  in OMAP4 OPP Table

Tested on OMAP4430 SDP Board.
Signed-off-by: NShweta Gulati <shweta.gulati@ti.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Update MPU, IVA and CORE voltage Rail values obtained from
OMAP4430 Data Manual Operating Condition Addendum_v0.4.

Tested on OMAP4430 SDP Board.
Signed-off-by: NShweta Gulati <shweta.gulati@ti.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Almost all OMAP4 boards support OPP 800 MHz and OPP 1 GHz.
Enable them in OPP Table. For small minority of boards which use
OMAP4430-800 MHz device OPP 1GHz is not supported,
OPP 1GHz should be disabled from board file.
Signed-off-by: NShweta Gulati <shweta.gulati@ti.com>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Since all voltage data is now centralized in oppxxx_data.c, we can replace
the values in the opp table with the macros used for voltage values.

This will avoid opp table and voltage layer having conflicting values.
Signed-off-by: NVishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The HW superwised smart idle for wdtimer in OMAP3 prevents
CORE power domain idle transitions. Disable it by swithing
to SW supervised transitions.

This could be a hardware bug in the OMAP3 wdtimer2 block.
Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@nokia.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Acked-by: NKevin Hilman <khilman@ti.com>

This is a first pass at reorganizing mach-omap2/voltage.c:

- Separate almost all of the data from the code of mach-omap2/voltage.c.
  The code remains in mach-omap2/voltage.c.  The data goes into one
  of several places, depending on what type of data it is:

  - Silicon process/validation data: mach-omap2/opp*_data.c
  - VC (Voltage Controller) data: mach-omap2/vc*_data.c
  - VP (Voltage Processor) data: mach-omap2/vp*_data.c
  - Voltage domain data: mach-omap2/voltagedomains*_data.c

  The ultimate goal is for all this data to be autogenerated, the same
  way we autogenerate the rest of our data.

- Separate VC and VP common data from VDD-specific VC and VP data.

- Separate common voltage.c code from SoC-specific code; reuse common code.

- Reorganize structures to avoid unnecessary memory loss due to unpacked
  fields.

There is much left to be done.  VC code and VP code should be separated out
into vc*.c and vp*.c files.  Many fields in the existing structures are
superfluous, and should be removed.  Some code in voltage.c seems to be
duplicated; that code should be moved into functions of its own.  Proper
voltage domain code should be created, as was done with the powerdomain
and clockdomains, and powerdomains should reference voltagedomains.

Thanks to Shweta Gulati <shweta.gulati@ti.com> for comments.  Thanks
to Rajendra Nayak <rnayak@ti.com> for finding and fixing some bugs
that prevented OMAP4 from booting:

   https://patchwork.kernel.org/patch/587311/

His patch has been folded into this one to avoid breaking OMAP4
between patches.  Thanks also to Kevin Hilman <khilman@ti.com> for
finding and fixing a compile problem when !CONFIG_PM:

   http://www.spinics.net/lists/arm-kernel/msg118067.html

His patch has also been folded into this one to avoid breaking
!CONFIG_PM builds.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Shweta Gulati <shweta.gulati@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Kevin Hilman <khilman@ti.com>

On the newer ARM processors like CortexA8, CortexA9, the caches can be
speculatively loaded while they are getting flushed.

Clear the SCTLR C bit to prevent further data cache allocation as
part of cache clean routine
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The current code saves few un-necessary registers which are read-only or
write-only, unused CP15 registers.

Remove them and keep only necessary CP15 registers part of
low power context save/restore.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

When L1 cache is suppose to be lost, it needs to be cleaned before
entrering to the low power mode.

While at this, also fix few comments and remove un-necessary
clean_l2 lable.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add necessary barriers after enabling MMU. Also use the sane way to
load pc and jump to it instead of executing ldma first up.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

On ARMv7 dsb, dmb instructions are supported and can be used directly
instead of their cp15 equivalnet. Also remove the opcodes for smc
and use the available instruction directly in OMAP3 low power asm code
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

This saves some power. OMAP4 version should check for GPT module ID, as
autoidle is only supported on a subset of these.
Signed-off-by: NTero Kristo <tero.kristo@nokia.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Add a new clockdomain flag, CLKDM_NO_AUTODEPS, which, when marked on a
clockdomain, will prevent "autodeps" from being associated with the
clockdomain.  ("Autodeps" are sleep dependencies and wakeup
dependencies from/to processor modules that are automatically added to
a clockdomain when it is in hardware-supervised idle mode.  They are
deprecated -- a relic from the old CDP trees -- but are still in use
for OMAP3.)

Also, prevent the hwmod code from adding or removing initiator
dependencies for clockdomains with this flag set.

This patch should allow others to test which clockdomains actually
still need autodeps.

Thanks to Kevin Hilman <khilman@ti.com> for noting that the original
version should also modify the hwmod code.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>

Create a new API that forms a wrapper to _set_module_autoidle()
to modify the AUTOIDLE bit.

This API is intended to be used by drivers that requires direct
manipulation of the AUTOIDLE bits in SYSCONFIG register.
McBSP driver requires autoidle bit to be enabled/disabled while
using sidetone feature.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: restrict the hwmod states that the autoidle bit can be changed
 in; changed function name; dropped "int" from "unsigned int long"]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Some boards can't tolerate IP blocks being reset when they are initialized.
Michael Büsch cites a case with the Nokia N810:

    http://www.spinics.net/lists/linux-omap/msg47277.html

To allow such boards to continue working normally, allow board file
maintainers to mark IP blocks to prevent them from being reset upon
init.  This is done via a hwmod function, omap_hwmod_no_setup_reset().
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Michael Buesch <mb@bu3sch.de>

On OMAP2 and OMAP3 the reset ctrl shift doesn't match the
status bit, as it does on OMAP4, when handling the reset lines.

This patch adds a new member in the reset info structure, so now it
can be added as part of hwmod data, and checked accordingly for
OMAP2 or 3; otherwise, there could be cases when the shift masks
doesn't match both of the registers, and a successful reset might
throw an error message or vice versa.
Signed-off-by: NOmar Ramirez Luna <omar.ramirez@ti.com>
[paul@pwsan.com: added a warning if st_shift used on OMAP4; renamed 'r'
 variable; improved some documentation]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The documented name of the HWMOD_NO_OCP_AUTOIDLE flag was incorrect; fix it.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

_init_clock always returns 0 and does
not propogate the error (in case of failure)
back to the caller, causing _init_clocks to
fail silently.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Acked-by: NBenoît Cousson <b-cousson@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Some of the omap2, omap3 peripherals support software reset. This
can be done through the softreset bit in sysconfig register.
The reset status can be checked through resetdone bit of
sysstatus register. syss_has_reset_status is added to the hwmod
database of peripherals which have resetdone bit in sysstatus register.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Reviewed-by: NGovindraj.R <govindraj.raja@ti.com>
Signed-off-by: NAvinash.H.M <avinashhm@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Autoidle is a single bit, TIOCP_CFG[0], setting on OMAP1/2/3/4 platforms.
In _set_module_autoidle() I am seeing 0x3 value where the mask is computed.
This should be 0x1.

v2:
(1) Modified the subject.
(2) Modified the description with further specific information.

Baseline:
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

Tested Info:
Boot tested on OMAP 1/2/3/4.
Signed-off-by: NTarun Kanti DebBarma <tarun.kanti@ti.com>
Acked-by: NRajendra Nayak <rnayak@ti.com>
Acked-by: NBenoit Cousson <b-cousson@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Master ports from interconnect are generating some annoying circular
references that become tricky to handle if we have to dynamically
remove some IP on some variant platforms.
Since they are not used for the moment, and since we can still build
that relation using the reverse relation (slave port from the IP
toward master port of the interconnect), let remove them for the
moment like it is done on OMAP4.
Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Sanjeev Premi <premi@ti.com>

Commit d3442726 ("OMAP3: PM: Adding
smartreflex hwmod data") added data that claims that the L4 CORE has
two slave interfaces that originate from the SmartReflex modules,
omap3_l4_core__sr1 and omap3_l4_core__sr2.  But as those two data
structure records show, it's L4 CORE that has a master port towards
SR1 and SR2.
Move the incorrect data from slaves list to master list.

Based on a path by Paul Walmsley <paul@pwsan.com>

    https://patchwork.kernel.org/patch/623171/

That is based on a patch by Benoît Cousson <b-cousson@ti.com>:

    https://patchwork.kernel.org/patch/590561/Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NBenoît Cousson <b-cousson@ti.com>
Cc: Sanjeev Premi <premi@ti.com>
Cc: Thara Gopinath <thara@ti.com>

if building kernels without OMAP2 support, we
will see a warning such as:

arch/arm/mach-omap2/io.c: In function 'omap2_init_common_infrastructure':
arch/arm/mach-omap2/io.c:389:3: warning: statement with no effect
arch/arm/mach-omap2/io.c:391:3: warning: statement with no effect
Signed-off-by: NFelipe Balbi <balbi@ti.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

omap_sr_probe() creates the smartreflex debug directory and its
underlying nvalue debug directory. These directories are removed in
omap_sr_remove().

Basic smartreflex functionality tested on OMAP3630 Zoom3 & OMAP4430 SDP
Signed-off-by: NAnand S Sawant <sawant@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

 * Build unconditionally as ARM for correct interoperation with
   OMAP firmware.

 * Fix an out-of-range ADR when building for ARM.

 * Remove deprecated PC-relative stores.

 * Add the required ENDPROC() directive for each ENTRY().

 * .align before data words.

 * Handle non-interworking return from v7_flush_dcache_all.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NKevin Hilman <khilman@ti.com>

 * Build unconditionally as ARM for correct interoperation with
   OMAP firmware.

 * Remove deprecated PC-relative stores

 * Add the required ENDPROC() directive for each ENTRY().

 * .align before data words
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NJean Pihet <j-pihet@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

For various reasons, Linux now only officially supports being built
with tools which are new enough to understand the SMC instruction.

Replacing the hand-encoded instructions when the mnemonic also
allows for correct assembly in Thumb-2 (otherwise, the result is
random data in the middle of the code).

The Makefile already ensures that this file is built with a high
enough gcc -march= flag (armv7-a).
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NJean Pihet <j-pihet@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Code marked with ENTRY() also needs a matching ENDPROC() directive,
in order to ensure that the type and instruction set of the
symbol are correctly annotated.

ENDPROC() tags the affected symbol as a function symbol, which will
ensure that link-time fixups don't accidentally switch to the
wrong instruction set.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

For CONFIG_THUMB2_KERNEL, the existing definition of do_wfi() will
insert invalid code into the instruction stream.

Any assembler which can assemble Thumb-2 is guaranteed to accept
the "wfi" mnemonic, so for the Thumb-2 case, just use the mnemonic.

The ARM case is left as-is.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NKevin Hilman <khilman@ti.com>

IVA device is not present in many OMAP3 variants.

This patch ensures that initialization is tied to
the presence of IVA on the device.
Signed-off-by: NSanjeev Premi <premi@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Voltage control on TWL can be done using VMODE/I2C1/I2C_SR.
Since almost all platforms use I2C_SR on omap3, omap3_twl_init by
default expects that OMAP's I2C_SR is plugged in to TWL's I2C
and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected,
the board files are expected to call omap3_twl_set_sr_bit(false) to
ensure that I2C_SR path is not set for voltage control and prevent
the default behavior of omap3_twl_init.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NThara Gopinath <thara@ti.com>
Signed-off-by: NShweta Gulati <shweta.gulati@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add a description field to each idle C-state. This helps to give
better data with PowerTop and one don't have to refer to the code
to link what Cx means from system point of view while analysing
PowerTop data.

No functional change.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Remove the custom restore_control_register() and use the exported
set_cr() instead to set the system control register(SCTRL) value.

No functional change.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The OMAP2 and OMAP3 PM code clears clockdomain wakeup and sleep
dependencies.  This is unnecessary after commit
6f7f63cc ("OMAP clockdomain:
initialize clockdomain registers when the clockdomain layer starts")
which clears these dependencies during clockdomain init.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Now that omap_hwmod + omap_device is used for OMAP UART device and
driver code, we no longer need the UART physical addresses in
omap_globals.

Note that the #defines for the base addresses are still left in
<plat/serial.h> since they are used by DEBUG_LL and uncompress code.

Build tested for OMAP1 (omap1_defconfig) and OMAP2+ (omap2plus_defconfig)
Signed-off-by: NKevin Hilman <khilman@ti.com>

kzalloc() may fail, if so return -ENOMEM.  Also Walter Harms suggested
to use kasprintf() instead of kzalloc+strcpy+strcat.
Signed-off-by: NVasiliy Kulikov <segoon@openwall.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

OMP3630 silicon can enable higher frequencies only depending on the board
characteristics meeting the recommended standards, and has to be selectively
toggled.

Beagle XM uses 3730 variant and the board design allows enabling 800MHz and
1GHz OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz
safely.  For the moment, we tweak the default table to allow for 800Mhz OPP
usage.
Reported-by: NKoen Kooi <koen@beagleboard.org>
Tested-by: NKoen Kooi <koen@beagleboard.org>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

omap3 and omap4 opp_init should be made non-static to allow
for platform specific opp table tweaking. making these static
conflicts with the definition in pm.h(global) as well.
we include pm.h as well to ensure that there are no such prototype
conflicts with actual implementation in the future.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>