1. 16 7月, 2011 1 次提交
    • A
      USB: OHCI: fix another regression for NVIDIA controllers · 6ea12a04
      Alan Stern 提交于
      The NVIDIA series of OHCI controllers continues to be troublesome.  A
      few people using the MCP67 chipset have reported that even with the
      most recent kernels, the OHCI controller fails to handle new
      connections and spams the system log with "unable to enumerate USB
      port" messages.  This is different from the other problems previously
      reported for NVIDIA OHCI controllers, although it is probably related.
      
      It turns out that the MCP67 controller does not like to be kept in the
      RESET state very long.  After only a few seconds, it decides not to
      work any more.  This patch (as1479) changes the PCI initialization
      quirk code so that NVIDIA controllers are switched into the SUSPEND
      state after 50 ms of RESET.  With no interrupts enabled and all the
      downstream devices reset, and thus unable to send wakeup requests,
      this should be perfectly safe (even for non-NVIDIA hardware).
      
      The removal code in ohci-hcd hasn't been changed; it will still leave
      the controller in the RESET state.  As a result, if someone unloads
      ohci-hcd and then reloads it, the controller won't work again until
      the system is rebooted.  If anybody complains about this, the removal
      code can be updated similarly.
      
      This fixes Bugzilla #22052.
      Tested-by: NLarry Finger <Larry.Finger@lwfinger.net>
      Cc: stable <stable@kernel.org>
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      6ea12a04
  2. 09 7月, 2011 10 次提交
    • K
      usb: r8a66597-hcd: fixup USB_PORT_STAT_C_SUSPEND shift · 35da4137
      Kuninori Morimoto 提交于
      This is typo fix of
      749da5f8 (USB: straighten out port feature vs. port status usage)
      Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      35da4137
    • Y
    • Y
      usb: r8a66597-hcd: add function for external controller · f2e9039a
      Yoshihiro Shimoda 提交于
      R8A66597 has the pin of WR0 and WR1. So, if one write-pin of CPU
      connects to the pins, we have to change the setting of FIFOSEL
      register in the controller. If we don't change the setting,
      the controller cannot send the data of odd length.
      Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      f2e9039a
    • S
      EHCI: only power off port if over-current is active · 81463c1d
      Sergei Shtylyov 提交于
      MAX4967 USB power supply chip we use on our boards signals over-current when
      power is not enabled; once it's enabled, over-current signal returns to normal.
      That unfortunately caused the endless stream of "over-current change on port"
      messages. The EHCI root hub code reacts on every over-current signal change
      with powering off the port -- such change event is generated the moment the
      port power is enabled, so once enabled the power is immediately cut off.
      I think we should only cut off power when we're seeing the active over-current
      signal, so I'm adding such check to that code. I also think that the fact that
      we've cut off the port power should be reflected in the result of GetPortStatus
      request immediately, hence I'm adding a PORTSCn register readback after write...
      Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
      Cc: stable@kernel.org
      Acked-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      81463c1d
    • A
      USB: EHCI: go back to using the system clock for QH unlinks · 004c1968
      Alan Stern 提交于
      This patch (as1477) fixes a problem affecting a few types of EHCI
      controller.  Contrary to what one might expect, these controllers
      automatically stop their internal frame counter when no ports are
      enabled.  Since ehci-hcd currently relies on the frame counter for
      determining when it should unlink QHs from the async schedule, those
      controllers run into trouble: The frame counter stops and the QHs
      never get unlinked.
      
      Some systems have also experienced other problems traced back to
      commit b9638011 (USB: ehci-hcd unlink
      speedups), which made the original switch from using the system clock
      to using the frame counter.  It never became clear what the reason was
      for these problems, but evidently it is related to use of the frame
      counter.
      
      To fix all these problems, this patch more or less reverts that commit
      and goes back to using the system clock.  But this can't be done
      cleanly because other changes have since been made to the scan_async()
      subroutine.  One of these changes involved the tricky logic that tries
      to avoid rescanning QHs that have already been seen when the scanning
      loop is restarted, which happens whenever an URB is given back.
      Switching back to clock-based unlinks would make this logic even more
      complicated.
      
      Therefore the new code doesn't rescan the entire async list whenever a
      giveback occurs.  Instead it rescans only the current QH and continues
      on from there.  This requires the use of a separate pointer to keep
      track of the next QH to scan, since the current QH may be unlinked
      while the scanning is in progress.  That new pointer must be global,
      so that it can be adjusted forward whenever the _next_ QH gets
      unlinked.  (uhci-hcd uses this same trick.)
      
      Simplification of the scanning loop removes a level of indentation,
      which accounts for the size of the patch.  The amount of code changed
      is relatively small, and it isn't exactly a reversion of the
      b9638011 commit.
      
      This fixes Bugzilla #32432.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      CC: <stable@kernel.org>
      Tested-by: NMatej Kenda <matejken@gmail.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      004c1968
    • A
      ehci: add pci quirk for Ordissimo and RM Slate 100 too · 0c42a4e8
      Anisse Astier 提交于
      Add another variant of the Pegatron tablet used by Ordissimo, and
      apparently RM Slate 100, to the list of models that should skip the
      negociation for the handoff of the EHCI controller.
      Signed-off-by: NAnisse Astier <anisse@astier.eu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      0c42a4e8
    • A
      ehci: refactor pci quirk to use standard dmi_check_system method · 03c75362
      Anisse Astier 提交于
      In commit 3610ea53 (ehci: workaround for pci
      quirk timeout on ExoPC), a workaround was added to skip the negociation for
      the handoff of the EHCI controller.
      
      Refactor the DMI detection code to use standard dmi_check_system function.
      Signed-off-by: NAnisse Astier <anisse@astier.eu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      03c75362
    • K
      USB: EHCI: Allow users to override 80% max periodic bandwidth · cc62a7eb
      Kirill Smelkov 提交于
      There are cases, when 80% max isochronous bandwidth is too limiting.
      
      For example I have two USB video capture cards which stream uncompressed
      video, and to stream full NTSC + PAL videos we'd need
      
          NTSC 640x480 YUV422 @30fps      ~17.6 MB/s
          PAL  720x576 YUV422 @25fps      ~19.7 MB/s
      
      isoc bandwidth.
      
      Now, due to limited alt settings in capture devices NTSC one ends up
      streaming with max_pkt_size=2688  and  PAL with max_pkt_size=2892, both
      with interval=1. In terms of microframe time allocation this gives
      
          NTSC    ~53us
          PAL     ~57us
      
      and together
      
          ~110us  >  100us == 80% of 125us uframe time.
      
      So those two devices can't work together simultaneously because the'd
      over allocate isochronous bandwidth.
      
      80% seemed a bit arbitrary to me, and I've tried to raise it to 90% and
      both devices started to work together, so I though sometimes it would be
      a good idea for users to override hardcoded default of max 80% isoc
      bandwidth.
      
      After all, isn't it a user who should decide how to load the bus? If I
      can live with 10% or even 5% bulk bandwidth that should be ok. I'm a USB
      newcomer, but that 80% set in stone by USB 2.0 specification seems to be
      chosen pretty arbitrary to me, just to serve as a reasonable default.
      
      NOTE 1
      ~~~~~~
      
      for two streams with max_pkt_size=3072 (worst case) both time
      allocation would be 60us+60us=120us which is 96% periodic bandwidth
      leaving 4% for bulk and control.  Alan Stern suggested that bulk then
      would be problematic (less than 300*8 bittimes left per microframe), but
      I think that is still enough for control traffic.
      
      NOTE 2
      ~~~~~~
      
      Sarah Sharp expressed concern that maxing out periodic bandwidth
      could lead to vendor-specific hardware bugs on host controllers, because
      
      > It's entirely possible that you'll run into
      > vendor-specific bugs if you try to pack the schedule with isochronous
      > transfers.  I don't think any hardware designer would seriously test or
      > validate their hardware with a schedule that is basically a violation of
      > the USB bus spec (more than 80% for periodic transfers).
      
      So far I've only tested this patch on my HP Mini 5103 with N10 chipset
      
          kirr@mini:~$ lspci
          00:00.0 Host bridge: Intel Corporation N10 Family DMI Bridge
          00:02.0 VGA compatible controller: Intel Corporation N10 Family Integrated Graphics Controller
          00:02.1 Display controller: Intel Corporation N10 Family Integrated Graphics Controller
          00:1b.0 Audio device: Intel Corporation N10/ICH 7 Family High Definition Audio Controller (rev 02)
          00:1c.0 PCI bridge: Intel Corporation N10/ICH 7 Family PCI Express Port 1 (rev 02)
          00:1c.3 PCI bridge: Intel Corporation N10/ICH 7 Family PCI Express Port 4 (rev 02)
          00:1d.0 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #1 (rev 02)
          00:1d.1 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 (rev 02)
          00:1d.2 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 (rev 02)
          00:1d.3 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 (rev 02)
          00:1d.7 USB Controller: Intel Corporation N10/ICH 7 Family USB2 EHCI Controller (rev 02)
          00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev e2)
          00:1f.0 ISA bridge: Intel Corporation NM10 Family LPC Controller (rev 02)
          00:1f.2 SATA controller: Intel Corporation N10/ICH7 Family SATA AHCI Controller (rev 02)
          01:00.0 Network controller: Broadcom Corporation BCM4313 802.11b/g/n Wireless LAN Controller (rev 01)
          02:00.0 Ethernet controller: Marvell Technology Group Ltd. 88E8059 PCI-E Gigabit Ethernet Controller (rev 11)
      
      and the system works stable with 110us/uframe (~88%) isoc bandwith allocated for
      above-mentioned isochronous transfers.
      
      NOTE 3
      ~~~~~~
      
      This feature is off by default. I mean max periodic bandwidth is set to
      100us/uframe by default exactly as it was before the patch. So only those of us
      who need the extreme settings are taking the risk - normal users who do not
      alter uframe_periodic_max sysfs attribute should not see any change at all.
      
      NOTE 4
      ~~~~~~
      
      I've tried to update documentation in Documentation/ABI/ thoroughly, but
      only "TBD" was put into Documentation/usb/ehci.txt -- the text there seems
      to be outdated and much needing refreshing, before it could be amended.
      
      Cc: Sarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: NKirill Smelkov <kirr@mns.spb.ru>
      Acked-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      cc62a7eb
    • K
      USB: EHCI: Move sysfs related bits into ehci-sysfs.c · 4c67045b
      Kirill Smelkov 提交于
      The only sysfs attr implemented so far is "companion" from ehci-hub.c,
      but in the next patch we are going to add another sysfs file, so prior
      to that let's structure things and move already-in-there sysfs code to
      separate file.
      
      NOTE: All the code I'm moving into this new file was written by Alan
      Stern (in 57e06c11 "EHCI: force high-speed devices to run at full
      speed"; Jan 16 2007), that's why I'm putting
      
          Copyright (C) 2007 by Alan Stern
      
      there after explicit request from the author.
      Signed-off-by: NKirill Smelkov <kirr@mns.spb.ru>
      Acked-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      4c67045b
    • M
      2cb30bb1
  3. 08 6月, 2011 2 次提交
  4. 07 6月, 2011 1 次提交
  5. 06 6月, 2011 1 次提交
    • D
      USB: xhci - fix interval calculation for FS isoc endpoints · cd3c18ba
      Dmitry Torokhov 提交于
      Full-speed isoc endpoints specify interval in exponent based form in
      frames, not microframes, so we need to adjust accordingly.
      
      NEC xHCI host controllers will return an error code of 0x11 if a full
      speed isochronous endpoint is added with the Interval field set to
      something less than 3 (2^3 = 8 microframes, or one frame).  It is
      impossible for a full speed device to have an interval smaller than one
      frame.
      
      This was always an issue in the xHCI driver, but commit
      dfa49c4a "USB: xhci - fix math in
      xhci_get_endpoint_interval()" removed the clamping of the minimum value
      in the Interval field, which revealed this bug.
      
      This needs to be backported to stable kernels back to 2.6.31.
      Reported-by: NMatt Evans <matt@ozlabs.org>
      Signed-off-by: NDmitry Torokhov <dtor@vmware.com>
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      Cc: stable@kernel.org
      cd3c18ba
  6. 03 6月, 2011 5 次提交
  7. 02 6月, 2011 1 次提交
  8. 28 5月, 2011 3 次提交
    • S
      Intel xhci: Limit number of active endpoints to 64. · 2cf95c18
      Sarah Sharp 提交于
      The Panther Point chipset has an xHCI host controller that has a limit to
      the number of active endpoints it can handle.  Ideally, it would signal
      that it can't handle anymore endpoints by returning a Resource Error for
      the Configure Endpoint command, but they don't.  Instead it needs software
      to keep track of the number of active endpoints, across configure endpoint
      commands, reset device commands, disable slot commands, and address device
      commands.
      
      Add a new endpoint context counter, xhci_hcd->num_active_eps, and use it
      to track the number of endpoints the xHC has active.  This gets a little
      tricky, because commands to change the number of active endpoints can
      fail.  This patch adds a new xHCI quirk for these Intel hosts, and the new
      code should not have any effect on other xHCI host controllers.
      
      Fail a new device allocation if we don't have room for the new default
      control endpoint.  Use the endpoint ring pointers to determine what
      endpoints were active before a Reset Device command or a Disable Slot
      command, and drop those once the command completes.
      
      Fail a configure endpoint command if it would add too many new endpoints.
      We have to be a bit over zealous here, and only count the number of new
      endpoints to be added, without subtracting the number of dropped
      endpoints.  That's because a second configure endpoint command for a
      different device could sneak in before we know if the first command is
      completed.  If the first command dropped resources, the host controller
      fails the command for some reason, and we're nearing the limit of
      endpoints, we could end up oversubscribing the host.
      
      To fix this race condition, when evaluating whether a configure endpoint
      command will fix in our bandwidth budget, only add the new endpoints to
      xhci->num_active_eps, and don't subtract the dropped endpoints.  Ignore
      changed endpoints (ones that are dropped and then re-added), as that
      shouldn't effect the host's endpoint resources.  When the configure
      endpoint command completes, subtract off the dropped endpoints.
      
      This may mean some configuration changes may temporarily fail, but it's
      always better to under-subscribe than over-subscribe resources.
      
      (Originally my plan had been to push the resource allocation down into the
      ring allocation functions.  However, that would cause us to allocate
      unnecessary resources when endpoints were changed, because the xHCI driver
      allocates a new ring for the changed endpoint, and only deletes the old
      ring once the Configure Endpoint command succeeds.  A further complication
      would have been dealing with the per-device endpoint ring cache.)
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      2cf95c18
    • S
      Intel xhci: Ignore spurious successful event. · ad808333
      Sarah Sharp 提交于
      The xHCI host controller in the Panther Point chipset sometimes produces
      spurious events on the event ring.  If it receives a short packet, it
      first puts a Transfer Event with a short transfer completion code on the
      event ring.  Then it puts a Transfer Event with a successful completion
      code on the ring for the same TD.  The xHCI driver correctly processes the
      short transfer completion code, gives the URB back to the driver, and then
      prints a warning in dmesg about the spurious event.  These warning
      messages really fill up dmesg when an HD webcam is plugged into xHCI.
      
      This spurious successful event behavior isn't technically disallowed by
      the xHCI specification, so make the xHCI driver just ignore the spurious
      completion event.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      ad808333
    • S
      Intel xhci: Support EHCI/xHCI port switching. · 69e848c2
      Sarah Sharp 提交于
      The Intel Panther Point chipsets contain an EHCI and xHCI host controller
      that shares some number of skew-dependent ports.  These ports can be
      switched from the EHCI to the xHCI host (and vice versa) by a hardware MUX
      that is controlled by registers in the xHCI PCI configuration space.  The
      USB 3.0 SuperSpeed terminations on the xHCI ports can be controlled
      separately from the USB 2.0 data wires.
      
      This switchover mechanism is there to support users who do a custom
      install of certain non-Linux operating systems that don't have official
      USB 3.0 support.  By default, the ports are under EHCI, SuperSpeed
      terminations are off, and USB 3.0 devices will show up under the EHCI
      controller at reduced speeds.  (This was more palatable for the marketing
      folks than having completely dead USB 3.0 ports if no xHCI drivers are
      available.)  Users should be able to turn on xHCI by default through a
      BIOS option, but users are happiest when they don't have to change random
      BIOS settings.
      
      This patch introduces a driver method to switchover the ports from EHCI to
      xHCI before the EHCI driver finishes PCI enumeration.  We want to switch
      the ports over before the USB core has the chance to enumerate devices
      under EHCI, or boot from USB mass storage will fail if the boot device
      connects under EHCI first, and then gets disconnected when the port
      switches over to xHCI.
      
      Add code to the xHCI PCI quirk to switch the ports from EHCI to xHCI.  The
      PCI quirks code will run before any other PCI probe function is called, so
      this avoids the issue with boot devices.
      
      Another issue is with BIOS behavior during system resume from hibernate.
      If the BIOS doesn't support xHCI, it may switch the devices under EHCI to
      allow use of the USB keyboard, mice, and mass storage devices.  It's
      supposed to remember the value of the port routing registers and switch
      them back when the OS attempts to take control of the xHCI host controller,
      but we all know not to trust BIOS writers.
      
      Make both the xHCI driver and the EHCI driver attempt to switchover the
      ports in their PCI resume functions.  We can't guarantee which PCI device
      will be resumed first, so this avoids any race conditions.  Writing a '1'
      to an already set port switchover bit or a '0' to a cleared port switchover
      bit should have no effect.
      
      The xHCI PCI configuration registers will be documented in the EDS-level
      chipset spec, which is not public yet.  I have permission from legal and
      the Intel chipset group to release this patch early to allow good Linux
      support at product launch.  I've tried to document the registers as much
      as possible, so please let me know if anything is unclear.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      69e848c2
  9. 26 5月, 2011 5 次提交
    • S
      xhci: STFU: Be quieter during URB submission and completion. · f444ff27
      Sarah Sharp 提交于
      Unsurprisingly, URBs get submitted and completed a lot in the xHCI
      driver.  If we have to print 10 lines of debug for every URB submitted
      or completed, then that can cause the whole system to stay in the
      interrupt handler too long, and can cause Missed Service completion
      codes for isochronous transfers.
      
      Cut down the debugging in the URB submission and completion paths:
       - Don't squawk about successful transfers, only unsuccessful ones.
       - Only print the number of bytes transferred if this was a short
         transfer.
       - Don't print the endpoint index for successful transfers (will add
         more debug to failed transfers to show endpoint index there later).
       - Stop printing MMIO writes.  This debugging shows up when the endpoint
         doorbell is rung a to start a transfer (basically for every URB).
       - Don't print out the ring enqueue and dequeue pointers
       - Stop printing when we're pointing to a link TRB.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      f444ff27
    • S
      xhci: STFU: Don't print event ring dequeue pointer. · 5153b7b3
      Sarah Sharp 提交于
      Stop printing out the event ring dequeue pointer and status register in
      the operational register set.  The host will report an OK status 99% of
      the time the interrupt handler is called, and usually when it's really
      hosed, a host controller won't even call the interrupt handler.  So the
      line is really useless.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      5153b7b3
    • S
      xhci: STFU: Remove function tracing. · 380032c3
      Sarah Sharp 提交于
      Remove unnecessary debugging from the xHCI driver.  We don't need to
      know what function we're calling or returning from.  Now I know how to
      use markup-oops.pl to de-mystify stack dumps of crashes.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      380032c3
    • S
      xhci: Don't submit commands when the host is dead. · fe6c6c13
      Sarah Sharp 提交于
      When the xHCI host controller dies, the USB core may attempt to reset the
      devices to their default configuration before disconnecting them.  This
      causes calls into the xHCI bandwidth allocation functions.  Don't allow
      those functions to submit commands or work on xHCI structures if the host
      controller is marked as dying.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      fe6c6c13
    • S
      xhci: Clear stopped_td when Stop Endpoint command completes. · 0714a57c
      Sarah Sharp 提交于
      When an URB is cancelled, the xHCI driver issues a Stop Endpoint command
      so that it can manipulate the ring and remove the transfer.  The xHC
      hardware then places a transfer event with the completion code "Stopped"
      or "Stopped Invalid" to let the driver know what TD it was in the middle
      of processing.  This TD and TRB is stored in ep->stopped_td and
      ep->stopped_trb.  These pointers are also used in handling stalled
      endpoints.
      
      By design, the Stop Endpoint command can race with URB completion.  By
      the time the Stop Endpoint command is handled, the URBs to be cancelled
      may have been given back to the driver.  Unfortunately, the stopped_td
      and stopped_trb pointers were not getting cleared in this case.
      
      The USB core unconditionally tries to reset the toggle bits on any
      endpoints when a new alternate interface setting is installed.  When the
      xHCI driver saw that ep->stopped_td was still set from the Stop Endpoint
      command, xhci_reset_endpoint assumed the endpoint was actually stalled,
      and attempted to clean up the endpoint rings.  This would manifest
      itself in a failed Reset Endpoint command and failed Set TR dequeue
      Pointer command after a successful Configure Endpoint command.  It may
      have also been causing driver oops when the stopped_td was accessed.
      
      This patch should be backported to stable kernels since 2.6.31.  Before
      2.6.33, stopped_td was found in the xhci_endpoint_ring, not the
      xhci_virt_ep.
      Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>
      0714a57c
  10. 21 5月, 2011 1 次提交
    • L
      sanitize <linux/prefetch.h> usage · 268bb0ce
      Linus Torvalds 提交于
      Commit e66eed65 ("list: remove prefetching from regular list
      iterators") removed the include of prefetch.h from list.h, which
      uncovered several cases that had apparently relied on that rather
      obscure header file dependency.
      
      So this fixes things up a bit, using
      
         grep -L linux/prefetch.h $(git grep -l '[^a-z_]prefetchw*(' -- '*.[ch]')
         grep -L 'prefetchw*(' $(git grep -l 'linux/prefetch.h' -- '*.[ch]')
      
      to guide us in finding files that either need <linux/prefetch.h>
      inclusion, or have it despite not needing it.
      
      There are more of them around (mostly network drivers), but this gets
      many core ones.
      Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      268bb0ce
  11. 20 5月, 2011 8 次提交
  12. 18 5月, 2011 2 次提交
    • A
      EHCI: don't rescan interrupt QHs needlessly · 1e12c910
      Alan Stern 提交于
      This patch (as1466) speeds up processing of ehci-hcd's periodic list.
      The existing code will pointlessly rescan an interrupt endpoint queue
      each time it encounters the queue's QH in the periodic list, which can
      happen quite a few times if the endpoint's period is low.  On some
      embedded systems, this useless overhead can waste so much time that
      the driver falls hopelessly behind and loses events.
      
      The patch introduces a "periodic_stamp" variable, which gets
      incremented each time scan_periodic() runs and each time the scan
      advances to a new frame.  If the corresponding stamp in an interrupt
      QH is equal to the current periodic_stamp, we assume the QH has
      already been scanned and skip over it.  Otherwise we scan the QH as
      usual, and if none of its URBs have completed then we store the
      current periodic_stamp in the QH's stamp, preventing it from being
      scanned again.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      1e12c910
    • A
      OHCI: fix regression caused by nVidia shutdown workaround · 2b7aaf50
      Alan Stern 提交于
      This patch (as1463) fixes a regression caused by commit
      3df7169e (OHCI: work around for nVidia
      shutdown problem).
      
      The original problem encountered by people using NVIDIA chipsets was
      that USB devices were not turning off when the system shut down.  For
      example, the LED on an optical mouse would remain on, draining a
      laptop's battery.  The problem was caused by a bug in the chipset; an
      OHCI controller in the Reset state would continue to drive a bus reset
      signal even after system shutdown.  The workaround was to put the
      controllers into the Suspend state instead.
      
      It turns out that later NVIDIA chipsets do not suffer from this bug.
      Instead some have the opposite bug: If a system is shut down while an
      OHCI controller is in the Suspend state, USB devices remain powered!
      On other systems, shutting down with a Suspended controller causes the
      system to reboot immediately.  Thus, working around the original bug
      on some machines exposes other bugs on other machines.
      
      The best solution seems to be to limit the workaround to OHCI
      controllers with a low-numbered PCI product ID.  I don't know exactly
      at what point NVIDIA changed their chipsets; the value used here is a
      guess.  So far it was worked out okay for all the people who have
      tested it.
      
      This fixes Bugzilla #35032.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Tested-by: NAndre "Osku" Schmidt <andre.osku.schmidt@googlemail.com>
      Tested-by: NYury Siamashka <yurand2@gmail.com>
      CC: <stable@kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      2b7aaf50