- 09 10月, 2013 1 次提交
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由 Sonic Zhang 提交于
Also avoid use NULL pointer in error message. v2-changes: - use port pinter only after checking Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 10月, 2013 5 次提交
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由 Laxman Dewangan 提交于
Palmas devices do not support the default bias configuration and hence removing this option from valid pin config parameters. Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Rong Wang 提交于
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1). here we add this pinmux capability. USB1/UART1 mode selection has dedicated control register in RSC module, here we attach the register offset of private data of related pin groups. Signed-off-by: NRong Wang <Rong.Wang@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Qipan Li 提交于
USP(Universal Serial Ports) can be UART as commit 5df83111, this patch defines the USP-based UART function pin groups for prima2. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Qipan Li 提交于
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Sachin Kamat 提交于
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. This is a squash commit of: pinctrl: at91: Remove redundant of_match_ptr pinctrl: exynos5440: Remove redundant of_match_ptr pinctrl: imx35: Remove redundant of_match_ptr pinctrl: imx51: Remove redundant of_match_ptr pinctrl: imx53: Remove redundant of_match_ptr pinctrl: imx6dl: Remove redundant of_match_ptr pinctrl: imx6q: Remove redundant of_match_ptr pinctrl: samsung: Remove redundant of_match_ptr pinctrl: vf610: Remove redundant of_match_ptr pinctrl: imx6sl: Remove redundant of_match_ptr pinctrl: plgpio: Remove redundant of_match_ptr Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 9月, 2013 8 次提交
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由 Laxman Dewangan 提交于
Recent movement of all configurations of pin in the single call of pin_config_set(), it is aborting configuration if BIAS_PULL_PIN_DEFAULT is selected as return of configuration. The original idea was to just avoid any update on register for pull up/down configuration if this option is selected. Fixing this by just bypassing any register update for BIAS_PULL_PIN_DEFAULT and continuing the remaining configuration. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Laxman Dewangan 提交于
Palmas pinmux and pin configuration support the single pin level configuration in place of pin group. Hence it is only require to pin_config_{set|get} and do not require pin_config_group_{set|get}. As core framework already check for require APIs availability, it is not require to implement as dummy for non-require ops and so removing it. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Mateusz Krawczuk 提交于
Values of pins in table s5pv210 bank are incorrect. This patch correct values. Signed-off-by: NMateusz Krawczuk <m.krawczuk@partner.samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Current code hold port->lock spinlock and then try to grab the lock again in adi_gpio_set_value(). Fix it. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Boris BREZILLON 提交于
Replace at91_mux_get_deglitch with at91_mux_pio3_get_deglitch when using sam9x5 (pio3) IP. at91_mux_get_deglitch only test the activation of the "Input Filter" which may be overloaded by the activation of the "Input Filter Slow Clock" to use the input filter as a debounce filter instead of a deglitch filter. Fix at91_mux_pio3_get_debounce to test the activation of the Input Filter before testing the activation of the debounce filter (Input Filter Slow Clock depends on Input Filter). Fix at91_mux_pio3_set_debounce function to avoid disabling the deglitch filter ("Input Filter") when debounce filter is disabled. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Boris BREZILLON 提交于
Fix AT91_PINCTRL_DEBOUNCE_VAL dt macro typo. Fix at91_pinctrl_mux_ops callback typos. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Guennadi Liakhovetski 提交于
There are four I2C interfaces on r8a7790, each of them can be connected to one of the two respective I2C controllers, e.g. interface #0 can be configured to work with I2C0 or with IIC0. Additionally some of those interfaces can also use one of several pin sets. Interface #3 is special, because it can be used in automatic mode for DVFS. It only has one set of pins available and those pins cannot be used for anything else, they also lack the GPIO function. This patch uses the sh-pfc ability to configure pins, not associated with GPIOs and adds support for I2C3 to the r8a7790 PFC set up. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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- 24 9月, 2013 2 次提交
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由 Ulrich Hecht 提交于
Adds pinmux for i2c bus 1 and 2. (Pins for 0 and 3 are not multiplexed.) Signed-off-by: NUlrich Hecht <ulrich.hecht@gmail.com> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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由 Kuninori Morimoto 提交于
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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- 23 9月, 2013 4 次提交
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由 Dan Carpenter 提交于
sizeof() is already size_t so there is no need to cast here. Generally, casting inside the min() macro instead of using min_t() is considered bad style. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Vincent Stehlé 提交于
Have pinconf_dbg_config_write() return a ssize_t. This fixes the following compilation warning: drivers/pinctrl/pinconf.c:617:2: warning: initialization from incompatible pointer type [enabled by default] drivers/pinctrl/pinconf.c:617:2: warning: (near initialization for ‘pinconf_dbg_pinconfig_fops.write’) [enabled by default] Signed-off-by: NVincent Stehlé <vincent.stehle@laposte.net> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Sonic Zhang 提交于
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Sonic Zhang 提交于
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 9月, 2013 2 次提交
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由 Sonic Zhang 提交于
The new ADI GPIO2 controller was introduced since the BF548 and BF60x processors. It differs a lot from the old one on BF5xx processors. So, create a pinctrl driver under the pinctrl framework. - Define gpio ports and pin interrupt controllers as individual platform devices. - Register a pinctrl driver for the whole GPIO ports and pin interrupt devices. - Probe pint devices before port devices. Put device instances into the global gpio and pint lists. - Define peripheral, irq and gpio reservation bit masks for each gpio port as runtime resources. - Save and restore gpio port and pint status MMRs in syscore PM functions. - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Handle peripheral and gpio requests in pinctrl operation functions. - Demux gpio IRQs via the irq_domain created by each GPIO port. v2-changes: - Remove unlinke() directive. v3-changes: - Rename struct adi_pmx to adi_pinctrl. - Fix the comments of struct gpio_pint. - Remove unused pin_base in struct gpio_port. - Change pint_assign into bool type. - Add comments about the relationship between pint device and port device to the driver header. - Use BIT macro to shift bit. - Remove all bitmap reservation help functions. Inline reservation functions into the actual code. - Remove gpio and offset mutual reference help functions. - Remove all help functions to find gpio_port and adi_pinctrl structs. Get range by pinctrl_find_gpio_range_from_pin(), find gpio_port object by container_of() and find adi_pinctrl by pin control device name. - Pass bool type usage variable to port_setup help function. - Separate long bit operations into several lines and add comments. - Use debugfs to output all GPIO request information. - Avoid to set drvdata to NULL - Add explanation to function adi_gpio_init_int() - Call gpiochip_add_pin_range() in gpio device probe function to register range cross reference between gpio device and pin control device. - Remove the reference to pin control device from the gpio_port struct. Remove the reference list to gpio device from the adi_pinctrl struct. Replace the global adi_pinctrl list with adi_gpio_port_list. Walk through the gpio list to do power suspend and resume operations. - Remove the global GPIO base from struct adi_pinctrl, define pin base in the platform data for each GPIO port device. - Initialize adi_pinctrl_setup in arch_initcall(). - print the status of triggers, whether it is in GPIO mode, if it is flagged to be used as IRQ, etc in adi_pin_dbg_show(). - Create the plug-in subdrivers to hold the pinctrl soc data for bf54x and bf60x. Add soc data into struct adi_pinctrl. Initialize the soc data in pin controller probe function. Get the pin groups and functions via the soc data reference. v4-changes: - remove useless system_state checking. - replace dev_err with dev_warn in both irq and gpio pin cases. - comment on relationship between irq type and invert operation. - It is not necessary to check the reservation mode of the requested pin in IRQ chip operation. Remove the reservation map. - Use existing gpio/pinctrl subsystem debugfs files. Remove pinctrl-adi2 driver specific debugfs output. - Add linkport group and function information for bf60x. - Separate uart and ctsrts pins into 2 groups. - Separate APAPI and alternative ATAPI pins into 2 groups. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
The driver cannot be built as a module, so having a MODULE_ALIAS() isn't useful. While at it, fix a small typo in the file header comment and make the module description string consistent with those for earlier Tegra SoCs. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 8月, 2013 2 次提交
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由 Axel Lin 提交于
The valid offset range should be 0 ... chip->ngpio - 1. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
I forgot to drop the lock for the return inside the loop protected by the spinlock in the pin config routine when merging in -rc7 in commit 6ad30ce0Reported-by: NSherman Yin <syin@broadcom.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 8月, 2013 4 次提交
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由 Axel Lin 提交于
It does not make sense to show ti prefix in pinconf_generic_dt_subnode_to_map() dev_err messages. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Implement .request() and .free() callbacks on the GPIO chips to inform pinctrl when a GPIO is requested or freed. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Boris BREZILLON 提交于
In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the pullup/down for this pin (pin is represented as a bit position) is disabled. Cc: stable <stable@vger.kernel.org> # 3.8+ Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jingoo Han 提交于
The driver core clears the driver data to NULL after device_release or on probe failure. Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 8月, 2013 12 次提交
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由 Mateusz Krawczuk 提交于
This patch implements pinctrl support and adds device tree bindings for s5pv210. Signed-off-by: NMateusz Krawczuk <m.krawczuk@partner.samsung.com> Acked-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Laxman Dewangan 提交于
Include "linux/export.h" to avoid following warnings during compilation: /*** pinctrl/pinctrl-utils.c:53:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:53:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:53:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:70:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:70:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:70:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:98:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:98:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:98:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:122:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:122:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:122:1: warning: parameter names (without types) in function declaration [enabled by default] pinctrl/pinctrl-utils.c:135:1: warning: data definition has no type or storage class [enabled by default] pinctrl/pinctrl-utils.c:135:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL_GPL' [-Wimplicit-int] pinctrl/pinctrl-utils.c:135:1: warning: parameter names (without types) in function declaration [enabled by default] **/ Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dan Carpenter 提交于
If "irq == NUM_EINT" then it writes one space beyond the end of the eint_data->domains[] array. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Reviewed-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dan Carpenter 提交于
We wanted to test "*map" here instead of "map". Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Dan Carpenter 提交于
The intent here was to test if the bit was set or not but there is a logical vs bitwise AND typo so it is true if any bits are set. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jisheng Zhang 提交于
The resource mapped by of_iomap() isn't unmapped in error path. This patch fix the resource leakage by using devm_ioremap_resource() instead of of_iomap(). Signed-off-by: NJisheng Zhang <jszhang@marvell.com> Reviewed-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NJason Cooper <jason@lakedaemon.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Sherman Yin 提交于
When setting pin configuration in the pinctrl framework, pin_config_set() or pin_config_group_set() is called in a loop to set one configuration at a time for the specified pin or group. This patch 1) removes the loop and 2) changes the API to pass the whole pin config array to the driver. It is now up to the driver to loop through the configs. This allows the driver to potentially combine configs and reduce the number of writes to pin config registers. All c files changed have been build-tested to verify the change compiles and that the corresponding .o is successfully generated. Signed-off-by: NSherman Yin <syin@broadcom.com> Reviewed-by: NChristian Daudt <csd@broadcom.com> Reviewed-by: NMatt Porter <matt.porter@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Using the new devm_ioremap_resource() we can greatly simplify resource handling. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
If (b->pin_base + b->nr_pins - 1) < pin is true, pin >= b->pin_base is always true because b->nr_pins is never less than 0. Thus this patch simplify the equation. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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