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  1. 16 12月, 2015 1 次提交
    • A
      ARM: debug-ll: rework footbridge handling · 0045c0dd
      由 Arnd Bergmann 提交于 
      Footbridge has two debug ports that are handled a bit differently:

The 8250 port uses the normal debug/8250.S implementation that is shared
with a lot of other platforms, but it relies on the DEBUG_UART_8250
option to be turned on automatically instead of being selected by
DEBUG_FOOTBRIDGE_COM1 as we do for most other platforms. I'm changing
this to use a 'select' and change the dependency to the debug symbol
rather than the platform symbol for consistency.

The DC21285 UART has a separate top-level option, and relies on
the traditional include/mach/debug-macro.S method. With the s3c64xx
multiplatform series queued up for 4.5, it is now the last one that does
this, so by moving this file to include/debug/dc21285.S, we can get
all platforms to do things the same way.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      0045c0dd
  3. 21 9月, 2015 1 次提交
  5. 05 8月, 2015 1 次提交
  7. 22 7月, 2015 1 次提交
  9. 14 7月, 2015 1 次提交
  11. 03 6月, 2015 1 次提交
  13. 21 5月, 2015 1 次提交
  15. 16 5月, 2015 1 次提交
  17. 12 5月, 2015 1 次提交
  19. 28 3月, 2015 1 次提交
  21. 05 3月, 2015 1 次提交
  23. 28 1月, 2015 1 次提交
  25. 21 1月, 2015 2 次提交
  27. 20 1月, 2015 2 次提交
  29. 15 1月, 2015 1 次提交
  31. 14 1月, 2015 1 次提交
  33. 28 11月, 2014 1 次提交
  35. 20 11月, 2014 1 次提交
  37. 17 11月, 2014 1 次提交
    • G
      ARM: shmobile: Add early debugging support using SCIF(A) · 7a2071c5
      由 Geert Uytterhoeven 提交于 
      Add serial port debug macros for the SCIF(A) serial ports.
This includes all supported shmobile SoCs, except for EMEV2.

The configuration logic (both Kconfig and #ifdef) is more complicated than
one would expect, for several reasons:
  1. Not all SoCs have the same serial devices, and they're not always
     at the same addresses.
  2. There are two different types: SCIF and SCIFA. Fortunately they can
     easily be distinguished by physical address.
  3. Not all boards use the same serial port for the console.
     The defaults correspond to the boards that are supported in
     mainline. If you want to use a different serial port, just change
     the value of CONFIG_DEBUG_UART_PHYS, and the rest will auto-adapt.
  4. debug_ll_io_init() maps the SCIF(A) registers to a fixed virtual
     address. 0xfdxxxxxx was chosen, as it should lie below VMALLOC_END
     = 0xff000000, and must not conflict with the 2 MiB reserved region
     at PCI_IO_VIRT_BASE = 0xfee00000.
       - On SoCs not using the legacy machine_desc.map_io(),
	 debug_ll_io_init() is called by the ARM core code.
       - On SoCs using the legacy machine_desc.map_io(),
	 debug_ll_io_init() must be called explicitly. Calls are added
	 for r8a7740, r8a7779, sh7372, and sh73a0.

This was derived from the r8a7790 version by Laurent Pinchart.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Tested-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      7a2071c5
  39. 25 9月, 2014 1 次提交
  41. 18 9月, 2014 1 次提交
  43. 19 7月, 2014 1 次提交
  45. 07 7月, 2014 1 次提交
  47. 26 5月, 2014 1 次提交
  49. 23 5月, 2014 1 次提交
  51. 20 5月, 2014 2 次提交
  53. 16 5月, 2014 1 次提交
  55. 30 4月, 2014 1 次提交
  57. 22 3月, 2014 1 次提交
  59. 17 3月, 2014 1 次提交
  61. 14 2月, 2014 1 次提交
  63. 09 12月, 2013 1 次提交
  65. 05 12月, 2013 2 次提交
    • S
      ARM: tegra: don't hard-code DEBUG_LL baud rate · 2f1d70af
      由 Stephen Warren 提交于 
      Stop writing to the UART clock divider registers in the Tegra DEBUG_LL
code. This allows the DEBUG_LL output to use whatever baud rate was set
up by the bootloader. Some users are using higher rates than 115200.

This removes the only usage of tegra_uart_config[3], so reduce the size
allocated for that array.

Finally, fix busyuart() so that it only waits for THRE and not TEMT. For
some reason, TEMT doesn't get asserted (at least on Tegra30 Beaver) at
9600 baud, even though it does at 115200 baud. This sounds like a HW bug,
but I haven't investigated. For reference, U-Boot's serial code has
always only checked THRE, and not checked TEMT.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NPaul Walmsley <pwalmsley@nvidia.com>
Reviewed-by: NThierry Reding <treding@nvidia.com>
      2f1d70af
    • S
      ARM: tegra: fix DEBUG_LL combined with LPAE · 354935a9
      由 Stephen Warren 提交于 
      The DEBUG_LL UART address is mapped as an MMU section, hence, the
virtual address must be section-aligned. Sections are 1MB without LPAE
and 2MB with LPAE. Tegra's virtual address was only aligned to 1MB, and
hence the mapping was set up incorrectly with LPAE enabled, thus causing
a hang early during boot. Fix this by picking a different virtual address
that is aligned to 2MB.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NThierry Reding <treding@nvidia.com>
      354935a9
  67. 29 10月, 2013 2 次提交
  69. 21 10月, 2013 1 次提交