change print level of RAS error log from warning to error

driver inclusion
category: bugfix
bugzilla: NA
CVE: NA

Change print level of RAS error log from warning to error. Because
ROCE RAS error and its recovery process could cause application failure.

Feature or Bugfix: Bugfix
Signed-off-by: Ntanxiaofei <tanxiaofei@huawei.com>
Reviewed-by: Nliweihang <liweihang@hisilicon.com>
Reviewed-by: Nliuyixian <liuyixian@huawei.com>
Reviewed-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

@@ -1365,15 +1365,15 @@ static int hclge_log_rocee_axi_error(struct hclge_dev *hdev)
 		return ret;
 	}
 
-	dev_info(dev, "AXI1: %08X %08X %08X %08X %08X %08X\n",
+	dev_err(dev, "AXI1: %08X %08X %08X %08X %08X %08X\n",
 		 le32_to_cpu(desc[0].data[0]), le32_to_cpu(desc[0].data[1]),
 		 le32_to_cpu(desc[0].data[2]), le32_to_cpu(desc[0].data[3]),
 		 le32_to_cpu(desc[0].data[4]), le32_to_cpu(desc[0].data[5]));
-	dev_info(dev, "AXI2: %08X %08X %08X %08X %08X %08X\n",
+	dev_err(dev, "AXI2: %08X %08X %08X %08X %08X %08X\n",
 		 le32_to_cpu(desc[1].data[0]), le32_to_cpu(desc[1].data[1]),
 		 le32_to_cpu(desc[1].data[2]), le32_to_cpu(desc[1].data[3]),
 		 le32_to_cpu(desc[1].data[4]), le32_to_cpu(desc[1].data[5]));
-	dev_info(dev, "AXI3: %08X %08X %08X %08X\n",
+	dev_err(dev, "AXI3: %08X %08X %08X %08X\n",
 		 le32_to_cpu(desc[2].data[0]), le32_to_cpu(desc[2].data[1]),
 		 le32_to_cpu(desc[2].data[2]), le32_to_cpu(desc[2].data[3]));
 
@@ -1394,11 +1394,11 @@ static int hclge_log_rocee_ecc_error(struct hclge_dev *hdev)
 		return ret;
 	}
 
-	dev_info(dev, "ECC1: %08X %08X %08X %08X %08X %08X\n",
+	dev_err(dev, "ECC1: %08X %08X %08X %08X %08X %08X\n",
 		 le32_to_cpu(desc[0].data[0]), le32_to_cpu(desc[0].data[1]),
 		 le32_to_cpu(desc[0].data[2]), le32_to_cpu(desc[0].data[3]),
 		 le32_to_cpu(desc[0].data[4]), le32_to_cpu(desc[0].data[5]));
-	dev_info(dev, "ECC2: %08X %08X %08X\n", le32_to_cpu(desc[1].data[0]),
+	dev_err(dev, "ECC2: %08X %08X %08X\n", le32_to_cpu(desc[1].data[0]),
 		 le32_to_cpu(desc[1].data[1]), le32_to_cpu(desc[1].data[2]));
 
 	return 0;
@@ -1428,7 +1428,7 @@ static int hclge_log_rocee_ovf_error(struct hclge_dev *hdev)
 			  le32_to_cpu(desc[0].data[0]);
 		while (err->msg) {
 			if (err->int_msk == err_sts) {
-				dev_warn(dev, "%s [error status=0x%x] found\n",
+				dev_err(dev, "%s [error status=0x%x] found\n",
 					 err->msg,
 					 le32_to_cpu(desc[0].data[0]));
 				break;
@@ -1438,12 +1438,12 @@ static int hclge_log_rocee_ovf_error(struct hclge_dev *hdev)
 	}
 
 	if (le32_to_cpu(desc[0].data[1]) & HCLGE_ROCEE_OVF_ERR_INT_MASK) {
-		dev_warn(dev, "ROCEE TSP OVF [error status=0x%x] found\n",
+		dev_err(dev, "ROCEE TSP OVF [error status=0x%x] found\n",
 			 le32_to_cpu(desc[0].data[1]));
 	}
 
 	if (le32_to_cpu(desc[0].data[2]) & HCLGE_ROCEE_OVF_ERR_INT_MASK) {
-		dev_warn(dev, "ROCEE SCC OVF [error status=0x%x] found\n",
+		dev_err(dev, "ROCEE SCC OVF [error status=0x%x] found\n",
 			 le32_to_cpu(desc[0].data[2]));
 	}
 
@@ -1473,31 +1473,25 @@ hclge_log_and_clear_rocee_ras_error(struct hclge_dev *hdev)
 
 	if (status & HCLGE_ROCEE_AXI_ERR_INT_MASK) {
 		if (status & HCLGE_ROCEE_RERR_INT_MASK)
-			dev_warn(dev, "ROCEE RAS AXI rresp error\n");
+			dev_err(dev, "ROCEE RAS AXI rresp error\n");
 
 		if (status & HCLGE_ROCEE_BERR_INT_MASK)
-			dev_warn(dev, "ROCEE RAS AXI bresp error\n");
+			dev_err(dev, "ROCEE RAS AXI bresp error\n");
 
 		reset_type = HNAE3_FUNC_RESET;
 
 		ret = hclge_log_rocee_axi_error(hdev);
-		if (ret) {
-			dev_err(dev, "failed(%d) to process axi error\n", ret);
-			/* reset everything for now */
+		if (ret)
 			return HNAE3_GLOBAL_RESET;
-		}
 	}
 
 	if (status & HCLGE_ROCEE_ECC_INT_MASK) {
-		dev_warn(dev, "ROCEE RAS 2bit ECC error\n");
+		dev_err(dev, "ROCEE RAS 2bit ECC error\n");
 		reset_type = HNAE3_GLOBAL_RESET;
 
 		ret = hclge_log_rocee_ecc_error(hdev);
-		if (ret) {
-			dev_err(dev, "failed(%d) to process ecc error\n", ret);
-			/* reset everything for now */
+		if (ret)
 			return HNAE3_GLOBAL_RESET;
-		}
 	}
 
 	if (status & HCLGE_ROCEE_OVF_INT_MASK) {