提交 f2d40cd9 编写于 作者: D David Woodhouse
......@@ -45,6 +45,7 @@ o nfs-utils 1.0.5 # showmount --version
o procps 3.2.0 # ps --version
o oprofile 0.9 # oprofiled --version
o udev 081 # udevinfo -V
o grub 0.93 # grub --version
Kernel compilation
==================
......
......@@ -3754,7 +3754,7 @@ L: linux-usb-devel@lists.sourceforge.net
W: http://www.linux-usb.org/gadget
S: Maintained
USB HID/HIDBP DRIVERS
USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)
P: Jiri Kosina
M: jkosina@suse.cz
L: linux-usb-devel@lists.sourceforge.net
......
......@@ -400,7 +400,8 @@ int __init pcibios_init(void)
__reg_MB86943_pci_sl_mem_base = __region_CS2 + 0x08000000;
mb();
*(volatile unsigned long *)(__region_CS2+0x01300014) == 1;
/* enable PCI arbitration */
__reg_MB86943_pci_arbiter = MB86943_PCIARB_EN;
ioport_resource.start = (__reg_MB86943_sl_pci_io_base << 9) & 0xfffffc00;
ioport_resource.end = (__reg_MB86943_sl_pci_io_range << 9) | 0x3ff;
......
......@@ -127,7 +127,7 @@ static int get_edd_info(u8 devno, struct edd_info *ei)
ax = 0x4800;
dx = devno;
asm("pushfl; int $0x13; popfl"
: "+a" (ax), "+d" (dx)
: "+a" (ax), "+d" (dx), "=m" (ei->params)
: "S" (&ei->params)
: "ebx", "ecx", "edi");
......
......@@ -268,7 +268,7 @@ void vesa_store_edid(void)
dx = 0; /* EDID block number */
di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */
asm(INT10
: "+a" (ax), "+b" (bx), "+d" (dx)
: "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info)
: "c" (cx), "D" (di)
: "esi");
#endif /* CONFIG_FIRMWARE_EDID */
......
......@@ -34,7 +34,6 @@
#include <linux/uio.h>
#include <linux/nfs_fs.h>
#include <linux/quota.h>
#include <linux/syscalls.h>
#include <linux/sunrpc/svc.h>
#include <linux/nfsd/nfsd.h>
#include <linux/nfsd/cache.h>
......
......@@ -142,7 +142,7 @@ struct iosapic_rte_info {
static struct iosapic_intr_info {
struct list_head rtes; /* RTEs using this vector (empty =>
* not an IOSAPIC interrupt) */
int count; /* # of RTEs that shares this vector */
int count; /* # of registered RTEs */
u32 low32; /* current value of low word of
* Redirection table entry */
unsigned int dest; /* destination CPU physical ID */
......@@ -313,7 +313,7 @@ mask_irq (unsigned int irq)
int rte_index;
struct iosapic_rte_info *rte;
if (list_empty(&iosapic_intr_info[irq].rtes))
if (!iosapic_intr_info[irq].count)
return; /* not an IOSAPIC interrupt! */
/* set only the mask bit */
......@@ -331,7 +331,7 @@ unmask_irq (unsigned int irq)
int rte_index;
struct iosapic_rte_info *rte;
if (list_empty(&iosapic_intr_info[irq].rtes))
if (!iosapic_intr_info[irq].count)
return; /* not an IOSAPIC interrupt! */
low32 = iosapic_intr_info[irq].low32 &= ~IOSAPIC_MASK;
......@@ -363,7 +363,7 @@ iosapic_set_affinity (unsigned int irq, cpumask_t mask)
dest = cpu_physical_id(first_cpu(mask));
if (list_empty(&iosapic_intr_info[irq].rtes))
if (!iosapic_intr_info[irq].count)
return; /* not an IOSAPIC interrupt */
set_irq_affinity_info(irq, dest, redir);
......@@ -542,7 +542,7 @@ iosapic_reassign_vector (int irq)
{
int new_irq;
if (!list_empty(&iosapic_intr_info[irq].rtes)) {
if (iosapic_intr_info[irq].count) {
new_irq = create_irq();
if (new_irq < 0)
panic("%s: out of interrupt vectors!\n", __FUNCTION__);
......@@ -560,7 +560,7 @@ iosapic_reassign_vector (int irq)
}
}
static struct iosapic_rte_info *iosapic_alloc_rte (void)
static struct iosapic_rte_info * __init_refok iosapic_alloc_rte (void)
{
int i;
struct iosapic_rte_info *rte;
......@@ -677,7 +677,7 @@ get_target_cpu (unsigned int gsi, int irq)
* In case of vector shared by multiple RTEs, all RTEs that
* share the vector need to use the same destination CPU.
*/
if (!list_empty(&iosapic_intr_info[irq].rtes))
if (iosapic_intr_info[irq].count)
return iosapic_intr_info[irq].dest;
/*
......@@ -794,8 +794,9 @@ iosapic_register_intr (unsigned int gsi,
err = register_intr(gsi, irq, IOSAPIC_LOWEST_PRIORITY,
polarity, trigger);
if (err < 0) {
spin_unlock(&irq_desc[irq].lock);
irq = err;
goto unlock_all;
goto unlock_iosapic_lock;
}
/*
......@@ -811,7 +812,7 @@ iosapic_register_intr (unsigned int gsi,
gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
(polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
cpu_logical_id(dest), dest, irq_to_vector(irq));
unlock_all:
spin_unlock(&irq_desc[irq].lock);
unlock_iosapic_lock:
spin_unlock_irqrestore(&iosapic_lock, flags);
......
......@@ -101,15 +101,6 @@ int check_irq_used(int irq)
return -1;
}
static void reserve_irq(unsigned int irq)
{
unsigned long flags;
spin_lock_irqsave(&vector_lock, flags);
irq_status[irq] = IRQ_RSVD;
spin_unlock_irqrestore(&vector_lock, flags);
}
static inline int find_unassigned_irq(void)
{
int irq;
......@@ -302,10 +293,14 @@ static cpumask_t vector_allocation_domain(int cpu)
void destroy_and_reserve_irq(unsigned int irq)
{
unsigned long flags;
dynamic_irq_cleanup(irq);
clear_irq_vector(irq);
reserve_irq(irq);
spin_lock_irqsave(&vector_lock, flags);
__clear_irq_vector(irq);
irq_status[irq] = IRQ_RSVD;
spin_unlock_irqrestore(&vector_lock, flags);
}
static int __reassign_irq_vector(int irq, int cpu)
......
......@@ -1750,8 +1750,17 @@ format_mca_init_stack(void *mca_data, unsigned long offset,
strncpy(p->comm, type, sizeof(p->comm)-1);
}
/* Do per-CPU MCA-related initialization. */
/* Caller prevents this from being called after init */
static void * __init_refok mca_bootmem(void)
{
void *p;
p = alloc_bootmem(sizeof(struct ia64_mca_cpu) * NR_CPUS +
KERNEL_STACK_SIZE);
return (void *)ALIGN((unsigned long)p, KERNEL_STACK_SIZE);
}
/* Do per-CPU MCA-related initialization. */
void __cpuinit
ia64_mca_cpu_init(void *cpu_data)
{
......@@ -1763,11 +1772,7 @@ ia64_mca_cpu_init(void *cpu_data)
int cpu;
first_time = 0;
mca_data = alloc_bootmem(sizeof(struct ia64_mca_cpu)
* NR_CPUS + KERNEL_STACK_SIZE);
mca_data = (void *)(((unsigned long)mca_data +
KERNEL_STACK_SIZE - 1) &
(-KERNEL_STACK_SIZE));
mca_data = mca_bootmem();
for (cpu = 0; cpu < NR_CPUS; cpu++) {
format_mca_init_stack(mca_data,
offsetof(struct ia64_mca_cpu, mca_stack),
......
......@@ -60,7 +60,6 @@
#include <asm/smp.h>
#include <asm/system.h>
#include <asm/unistd.h>
#include <asm/system.h>
#if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
# error "struct cpuinfo_ia64 too big!"
......
......@@ -346,7 +346,7 @@ smp_flush_tlb_mm (struct mm_struct *mm)
}
/*
* Run a function on another CPU
* Run a function on a specific CPU
* <func> The function to run. This must be fast and non-blocking.
* <info> An arbitrary pointer to pass to the function.
* <nonatomic> Currently unused.
......@@ -366,9 +366,11 @@ smp_call_function_single (int cpuid, void (*func) (void *info), void *info, int
int me = get_cpu(); /* prevent preemption and reschedule on another processor */
if (cpuid == me) {
printk(KERN_INFO "%s: trying to call self\n", __FUNCTION__);
local_irq_disable();
func(info);
local_irq_enable();
put_cpu();
return -EBUSY;
return 0;
}
data.func = func;
......
......@@ -240,7 +240,21 @@ ia64_init_itm (void)
if (!nojitter)
itc_jitter_data.itc_jitter = 1;
#endif
}
} else
/*
* ITC is drifty and we have not synchronized the ITCs in smpboot.c.
* ITC values may fluctuate significantly between processors.
* Clock should not be used for hrtimers. Mark itc as only
* useful for boot and testing.
*
* Note that jitter compensation is off! There is no point of
* synchronizing ITCs since they may be large differentials
* that change over time.
*
* The only way to fix this would be to repeatedly sync the
* ITCs. Until that time we have to avoid ITC.
*/
clocksource_itc.rating = 50;
/* Setup the CPU local timer tick */
ia64_cpu_local_tick();
......
......@@ -391,7 +391,7 @@ void sn_bus_free_sysdata(void)
* hubdev_init_node() - Creates the HUB data structure and link them to it's
* own NODE specific data area.
*/
void hubdev_init_node(nodepda_t * npda, cnodeid_t node)
void __init hubdev_init_node(nodepda_t * npda, cnodeid_t node)
{
struct hubdev_info *hubdev_info;
int size;
......
......@@ -25,7 +25,6 @@
#include <linux/interrupt.h>
#include <linux/acpi.h>
#include <linux/compiler.h>
#include <linux/sched.h>
#include <linux/root_dev.h>
#include <linux/nodemask.h>
#include <linux/pm.h>
......
......@@ -23,16 +23,14 @@
extern unsigned long sn_rtc_cycles_per_second;
static void __iomem *sn2_mc;
static cycle_t read_sn2(void)
{
return (cycle_t)readq(sn2_mc);
return (cycle_t)readq(RTC_COUNTER_ADDR);
}
static struct clocksource clocksource_sn2 = {
.name = "sn2_rtc",
.rating = 300,
.rating = 450,
.read = read_sn2,
.mask = (1LL << 55) - 1,
.mult = 0,
......@@ -58,7 +56,6 @@ ia64_sn_udelay (unsigned long usecs)
void __init sn_timer_init(void)
{
sn2_mc = RTC_COUNTER_ADDR;
clocksource_sn2.fsys_mmio = RTC_COUNTER_ADDR;
clocksource_sn2.mult = clocksource_hz2mult(sn_rtc_cycles_per_second,
clocksource_sn2.shift);
......
......@@ -890,37 +890,46 @@ static void ich_set_dmamode (struct ata_port *ap, struct ata_device *adev)
}
#ifdef CONFIG_PM
static struct dmi_system_id piix_broken_suspend_dmi_table[] = {
{
.ident = "TECRA M5",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"),
},
},
{
.ident = "Satellite U200",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U200"),
static int piix_broken_suspend(void)
{
static struct dmi_system_id sysids[] = {
{
.ident = "TECRA M5",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"),
},
},
},
{
.ident = "Satellite U205",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U205"),
{
.ident = "Satellite U205",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U205"),
},
},
},
{
.ident = "Portege M500",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M500"),
{
.ident = "Portege M500",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M500"),
},
},
},
{ }
};
{ }
};
static const char *oemstrs[] = {
"Tecra M3,",
};
int i;
if (dmi_check_system(sysids))
return 1;
for (i = 0; i < ARRAY_SIZE(oemstrs); i++)
if (dmi_find_device(DMI_DEV_TYPE_OEM_STRING, oemstrs[i], NULL))
return 1;
return 0;
}
static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
{
......@@ -937,8 +946,7 @@ static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
* cycles and power trying to do something to the sleeping
* beauty.
*/
if (dmi_check_system(piix_broken_suspend_dmi_table) &&
mesg.event == PM_EVENT_SUSPEND) {
if (piix_broken_suspend() && mesg.event == PM_EVENT_SUSPEND) {
pci_save_state(pdev);
/* mark its power state as "unknown", since we don't
......@@ -973,10 +981,10 @@ static int piix_pci_device_resume(struct pci_dev *pdev)
pci_restore_state(pdev);
/* PCI device wasn't disabled during suspend. Use
* __pci_reenable_device() to avoid affecting the
* enable count.
* pci_reenable_device() to avoid affecting the enable
* count.
*/
rc = __pci_reenable_device(pdev);
rc = pci_reenable_device(pdev);
if (rc)
dev_printk(KERN_ERR, &pdev->dev, "failed to enable "
"device after resume (%d)\n", rc);
......
......@@ -3788,6 +3788,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
{ "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
{ "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
{ "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
{ "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
/* Devices with NCQ limits */
......
......@@ -573,6 +573,10 @@ int ata_pci_init_bmdma(struct ata_host *host)
struct pci_dev *pdev = to_pci_dev(gdev);
int i, rc;
/* No BAR4 allocation: No DMA */
if (pci_resource_start(pdev, 4) == 0)
return 0;
/* TODO: If we get no DMA mask we should fall back to PIO */
rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
if (rc)
......
......@@ -31,7 +31,7 @@
#include <linux/libata.h>
#define DRV_NAME "pata_cmd64x"
#define DRV_VERSION "0.2.3"
#define DRV_VERSION "0.2.4"
/*
* CMD64x specific registers definition.
......@@ -397,7 +397,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f,
.mwdma_mask = 0x07,
.udma_mask = ATA_UDMA1,
.udma_mask = ATA_UDMA2,
.port_ops = &cmd64x_port_ops
},
{ /* CMD 646 rev 1 */
......@@ -412,7 +412,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f,
.mwdma_mask = 0x07,
.udma_mask = ATA_UDMA2,
.udma_mask = ATA_UDMA4,
.port_ops = &cmd648_port_ops
},
{ /* CMD 649 */
......@@ -420,7 +420,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f,
.mwdma_mask = 0x07,
.udma_mask = ATA_UDMA3,
.udma_mask = ATA_UDMA5,
.port_ops = &cmd648_port_ops
}
};
......
......@@ -2,6 +2,7 @@
* pata_sis.c - SiS ATA driver
*
* (C) 2005 Red Hat <alan@redhat.com>
* (C) 2007 Bartlomiej Zolnierkiewicz
*
* Based upon linux/drivers/ide/pci/sis5513.c
* Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
......@@ -35,7 +36,7 @@
#include "sis.h"
#define DRV_NAME "pata_sis"
#define DRV_VERSION "0.5.1"
#define DRV_VERSION "0.5.2"
struct sis_chipset {
u16 device; /* PCI host ID */
......@@ -237,7 +238,7 @@ static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
}
/**
* sis_100_set_pioode - Initialize host controller PATA PIO timings
* sis_100_set_piomode - Initialize host controller PATA PIO timings
* @ap: Port whose timings we are configuring
* @adev: Device we are configuring for.
*
......@@ -262,7 +263,7 @@ static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
}
/**
* sis_133_set_pioode - Initialize host controller PATA PIO timings
* sis_133_set_piomode - Initialize host controller PATA PIO timings
* @ap: Port whose timings we are configuring
* @adev: Device we are configuring for.
*
......@@ -334,7 +335,7 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
int drive_pci = sis_old_port_base(adev);
u16 timing;
const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 };
const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 };
pci_read_config_word(pdev, drive_pci, &timing);
......@@ -342,15 +343,15 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
if (adev->dma_mode < XFER_UDMA_0) {
/* bits 3-0 hold recovery timing bits 8-10 active timing and
the higer bits are dependant on the device */
timing &= ~ 0x870F;
timing &= ~0x870F;
timing |= mwdma_bits[speed];
pci_write_config_word(pdev, drive_pci, timing);
} else {
/* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
speed = adev->dma_mode - XFER_UDMA_0;
timing &= ~0x6000;
timing |= udma_bits[speed];
}
pci_write_config_word(pdev, drive_pci, timing);
}
/**
......@@ -373,7 +374,7 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
int drive_pci = sis_old_port_base(adev);
u16 timing;
const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 };
const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
pci_read_config_word(pdev, drive_pci, &timing);
......@@ -432,8 +433,7 @@ static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
* @adev: Device to program
*
* Set UDMA/MWDMA mode for device, in host controller PCI config space.
* Handles early SiS 961 bridges. Supports MWDMA as well unlike
* the old ide/pci driver.
* Handles early SiS 961 bridges.
*
* LOCKING:
* None (inherited from caller).
......@@ -467,8 +467,6 @@ static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *a
* @adev: Device to program
*
* Set UDMA/MWDMA mode for device, in host controller PCI config space.
* Handles early SiS 961 bridges. Supports MWDMA as well unlike
* the old ide/pci driver.
*
* LOCKING:
* None (inherited from caller).
......
......@@ -743,7 +743,7 @@ static struct hid_device *usb_hid_configure(struct usb_interface *intf)
hid->quirks = quirks;
if (!(usbhid = kzalloc(sizeof(struct usbhid_device), GFP_KERNEL)))
goto fail;
goto fail_no_usbhid;
hid->driver_data = usbhid;
usbhid->hid = hid;
......@@ -878,6 +878,8 @@ static struct hid_device *usb_hid_configure(struct usb_interface *intf)
usb_free_urb(usbhid->urbout);
usb_free_urb(usbhid->urbctrl);
hid_free_buffers(dev, hid);
kfree(usbhid);
fail_no_usbhid:
hid_free_device(hid);
return NULL;
......@@ -913,6 +915,7 @@ static void hid_disconnect(struct usb_interface *intf)
usb_free_urb(usbhid->urbout);
hid_free_buffers(hid_to_usb_dev(hid), hid);
kfree(usbhid);
hid_free_device(hid);
}
......
......@@ -61,7 +61,9 @@
#define USB_DEVICE_ID_APPLE_GEYSER4_JIS 0x021c
#define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a
#define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b
#define USB_DEVICE_ID_APPLE_IR 0x8240
#define USB_VENDOR_ID_ASUS 0x0b05
#define USB_DEVICE_ID_ASUS_LCM 0x1726
#define USB_VENDOR_ID_ATEN 0x0557
#define USB_DEVICE_ID_ATEN_UC100KM 0x2004
......@@ -198,6 +200,70 @@
#define USB_VENDOR_ID_LOGITECH 0x046d
#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101
#define USB_DEVICE_ID_LOGITECH_HARMONY 0xc110
#define USB_DEVICE_ID_LOGITECH_HARMONY_2 0xc111
#define USB_DEVICE_ID_LOGITECH_HARMONY_3 0xc112
#define USB_DEVICE_ID_LOGITECH_HARMONY_4 0xc113
#define USB_DEVICE_ID_LOGITECH_HARMONY_5 0xc114
#define USB_DEVICE_ID_LOGITECH_HARMONY_6 0xc115
#define USB_DEVICE_ID_LOGITECH_HARMONY_7 0xc116
#define USB_DEVICE_ID_LOGITECH_HARMONY_8 0xc117
#define USB_DEVICE_ID_LOGITECH_HARMONY_9 0xc118
#define USB_DEVICE_ID_LOGITECH_HARMONY_10 0xc119
#define USB_DEVICE_ID_LOGITECH_HARMONY_11 0xc11a
#define USB_DEVICE_ID_LOGITECH_HARMONY_12 0xc11b
#define USB_DEVICE_ID_LOGITECH_HARMONY_13 0xc11c
#define USB_DEVICE_ID_LOGITECH_HARMONY_14 0xc11d
#define USB_DEVICE_ID_LOGITECH_HARMONY_15 0xc11e
#define USB_DEVICE_ID_LOGITECH_HARMONY_16 0xc11f
#define USB_DEVICE_ID_LOGITECH_HARMONY_17 0xc120
#define USB_DEVICE_ID_LOGITECH_HARMONY_18 0xc121
#define USB_DEVICE_ID_LOGITECH_HARMONY_19 0xc122
#define USB_DEVICE_ID_LOGITECH_HARMONY_20 0xc123
#define USB_DEVICE_ID_LOGITECH_HARMONY_21 0xc124
#define USB_DEVICE_ID_LOGITECH_HARMONY_22 0xc125
#define USB_DEVICE_ID_LOGITECH_HARMONY_23 0xc126
#define USB_DEVICE_ID_LOGITECH_HARMONY_24 0xc127
#define USB_DEVICE_ID_LOGITECH_HARMONY_25 0xc128
#define USB_DEVICE_ID_LOGITECH_HARMONY_26 0xc129
#define USB_DEVICE_ID_LOGITECH_HARMONY_27 0xc12a
#define USB_DEVICE_ID_LOGITECH_HARMONY_28 0xc12b
#define USB_DEVICE_ID_LOGITECH_HARMONY_29 0xc12c
#define USB_DEVICE_ID_LOGITECH_HARMONY_30 0xc12d
#define USB_DEVICE_ID_LOGITECH_HARMONY_31 0xc12e
#define USB_DEVICE_ID_LOGITECH_HARMONY_32 0xc12f
#define USB_DEVICE_ID_LOGITECH_HARMONY_33 0xc130
#define USB_DEVICE_ID_LOGITECH_HARMONY_34 0xc131
#define USB_DEVICE_ID_LOGITECH_HARMONY_35 0xc132
#define USB_DEVICE_ID_LOGITECH_HARMONY_36 0xc133
#define USB_DEVICE_ID_LOGITECH_HARMONY_37 0xc134
#define USB_DEVICE_ID_LOGITECH_HARMONY_38 0xc135
#define USB_DEVICE_ID_LOGITECH_HARMONY_39 0xc136
#define USB_DEVICE_ID_LOGITECH_HARMONY_40 0xc137
#define USB_DEVICE_ID_LOGITECH_HARMONY_41 0xc138
#define USB_DEVICE_ID_LOGITECH_HARMONY_42 0xc139
#define USB_DEVICE_ID_LOGITECH_HARMONY_43 0xc13a
#define USB_DEVICE_ID_LOGITECH_HARMONY_44 0xc13b
#define USB_DEVICE_ID_LOGITECH_HARMONY_45 0xc13c
#define USB_DEVICE_ID_LOGITECH_HARMONY_46 0xc13d
#define USB_DEVICE_ID_LOGITECH_HARMONY_47 0xc13e
#define USB_DEVICE_ID_LOGITECH_HARMONY_48 0xc13f
#define USB_DEVICE_ID_LOGITECH_HARMONY_49 0xc140
#define USB_DEVICE_ID_LOGITECH_HARMONY_50 0xc141
#define USB_DEVICE_ID_LOGITECH_HARMONY_51 0xc142
#define USB_DEVICE_ID_LOGITECH_HARMONY_52 0xc143
#define USB_DEVICE_ID_LOGITECH_HARMONY_53 0xc144
#define USB_DEVICE_ID_LOGITECH_HARMONY_54 0xc145
#define USB_DEVICE_ID_LOGITECH_HARMONY_55 0xc146
#define USB_DEVICE_ID_LOGITECH_HARMONY_56 0xc147
#define USB_DEVICE_ID_LOGITECH_HARMONY_57 0xc148
#define USB_DEVICE_ID_LOGITECH_HARMONY_58 0xc149
#define USB_DEVICE_ID_LOGITECH_HARMONY_59 0xc14a
#define USB_DEVICE_ID_LOGITECH_HARMONY_60 0xc14b
#define USB_DEVICE_ID_LOGITECH_HARMONY_61 0xc14c
#define USB_DEVICE_ID_LOGITECH_HARMONY_62 0xc14d
#define USB_DEVICE_ID_LOGITECH_HARMONY_63 0xc14e
#define USB_DEVICE_ID_LOGITECH_HARMONY_64 0xc14f
#define USB_DEVICE_ID_LOGITECH_WHEEL 0xc294
#define USB_DEVICE_ID_LOGITECH_KBD 0xc311
#define USB_DEVICE_ID_S510_RECEIVER 0xc50c
......@@ -221,6 +287,9 @@
#define USB_DEVICE_ID_NCR_FIRST 0x0300
#define USB_DEVICE_ID_NCR_LAST 0x03ff
#define USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR 0x0400
#define USB_DEVICE_ID_N_S_HARMONY 0xc359
#define USB_VENDOR_ID_NEC 0x073e
#define USB_DEVICE_ID_NEC_USB_GAME_PAD 0x0301
......@@ -315,7 +384,7 @@ static const struct hid_blacklist {
{ USB_VENDOR_ID_AIPTEK, USB_DEVICE_ID_AIPTEK_24, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_AIRCABLE, USB_DEVICE_ID_AIRCABLE1, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_ALCOR, USB_DEVICE_ID_ALCOR_USBRS232, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_IR, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_ASUS, USB_DEVICE_ID_ASUS_LCM, HID_QUIRK_IGNORE},
{ USB_VENDOR_ID_BERKSHIRE, USB_DEVICE_ID_BERKSHIRE_PCWD, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_CIDC, 0x0103, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_HIDCOM, HID_QUIRK_IGNORE },
......@@ -463,6 +532,71 @@ static const struct hid_blacklist {
{ USB_VENDOR_ID_DELL, USB_DEVICE_ID_DELL_W7658, HID_QUIRK_RESET_LEDS },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_KBD, HID_QUIRK_RESET_LEDS },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_2, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_3, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_4, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_5, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_6, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_7, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_8, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_9, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_10, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_11, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_12, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_13, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_14, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_15, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_16, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_17, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_18, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_19, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_20, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_21, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_22, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_23, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_24, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_25, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_26, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_27, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_28, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_29, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_30, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_31, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_32, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_33, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_34, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_35, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_36, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_37, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_38, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_39, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_40, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_41, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_42, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_43, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_44, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_45, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_46, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_47, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_48, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_49, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_50, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_51, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_52, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_53, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_54, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_55, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_56, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_57, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_58, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_59, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_60, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_61, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_62, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_63, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_HARMONY_64, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR, USB_DEVICE_ID_N_S_HARMONY, HID_QUIRK_IGNORE },
{ 0, 0 }
};
......
......@@ -693,13 +693,12 @@ icside_probe(struct expansion_card *ec, const struct ecard_id *id)
if (ret)
goto out;
state = kmalloc(sizeof(struct icside_state), GFP_KERNEL);
state = kzalloc(sizeof(struct icside_state), GFP_KERNEL);
if (!state) {
ret = -ENOMEM;
goto release;
}
memset(state, 0, sizeof(state));
state->type = ICS_TYPE_NOTYPE;
state->dev = &ec->dev;
......
......@@ -640,7 +640,7 @@ typedef enum {
} idetape_chrdev_direction_t;
struct idetape_bh {
unsigned short b_size;
u32 b_size;
atomic_t b_count;
struct idetape_bh *b_reqnext;
char *b_data;
......
......@@ -593,7 +593,7 @@ static struct dmi_system_id cable_dmi_table[] = {
.ident = "HP Pavilion N5430",
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
},
},
{ }
......
......@@ -475,11 +475,11 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
switch (rev) {
case 0x07:
case 0x05:
printk("%s: UltraDMA capable", name);
printk("%s: UltraDMA capable\n", name);
break;
case 0x03:
default:
printk("%s: MultiWord DMA force limited", name);
printk("%s: MultiWord DMA force limited\n", name);
break;
case 0x01:
printk("%s: MultiWord DMA limited, "
......
......@@ -133,7 +133,7 @@ static void cs5520_tune_drive(ide_drive_t *drive, u8 pio)
static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
{
/* Tune the drive for PIO modes up to PIO 4 */
cs5520_tune_drive(drive, 4);
cs5520_tune_drive(drive, 255);
/* Then tell the core to use DMA operations */
return 0;
......
......@@ -2,6 +2,7 @@
* linux/drivers/ide/pci/cs5535.c
*
* Copyright (C) 2004-2005 Advanced Micro Devices, Inc.
* Copyright (C) 2007 Bartlomiej Zolnierkiewicz
*
* History:
* 09/20/2005 - Jaya Kumar <jayakumar.ide@gmail.com>
......@@ -83,14 +84,17 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
/* Set the PIO timings */
if ((speed & XFER_MODE) == XFER_PIO) {
u8 pioa;
u8 piob;
u8 cmd;
ide_drive_t *pair = &drive->hwif->drives[drive->dn ^ 1];
u8 cmd, pioa;
pioa = speed - XFER_PIO_0;
piob = ide_get_best_pio_mode(&(drive->hwif->drives[!unit]),
255, 4);
cmd = pioa < piob ? pioa : piob;
cmd = pioa = speed - XFER_PIO_0;
if (pair->present) {
u8 piob = ide_get_best_pio_mode(pair, 255, 4);
if (piob < cmd)
cmd = piob;
}
/* Write the speed of the current drive */
reg = (cs5535_pio_cmd_timings[cmd] << 16) |
......@@ -116,7 +120,7 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
reg &= 0x80000000UL; /* Preserve the PIO format bit */
if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_7)
if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_4)
reg |= cs5535_udma_timings[speed - XFER_UDMA_0];
else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0];
......@@ -151,32 +155,22 @@ static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
*
* A callback from the upper layers for PIO-only tuning.
*/
static void cs5535_tuneproc(ide_drive_t *drive, u8 xferspeed)
static void cs5535_tuneproc(ide_drive_t *drive, u8 pio)
{
u8 modes[] = { XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3,
XFER_PIO_4 };
/* cs5535 max pio is pio 4, best_pio will check the blacklist.
i think we don't need to rate_filter the incoming xferspeed
since we know we're only going to choose pio */
xferspeed = ide_get_best_pio_mode(drive, xferspeed, 4);
ide_config_drive_speed(drive, modes[xferspeed]);
cs5535_set_speed(drive, xferspeed);
pio = ide_get_best_pio_mode(drive, pio, 4);
ide_config_drive_speed(drive, XFER_PIO_0 + pio);
cs5535_set_speed(drive, XFER_PIO_0 + pio);
}
static int cs5535_dma_check(ide_drive_t *drive)
{
u8 speed;
drive->init_speed = 0;
if (ide_tune_dma(drive))
return 0;
if (ide_use_fast_pio(drive)) {
speed = ide_get_best_pio_mode(drive, 255, 4);
cs5535_set_drive(drive, speed);
}
if (ide_use_fast_pio(drive))
cs5535_tuneproc(drive, 255);
return -1;
}
......
......@@ -21,7 +21,7 @@
* it8213_dma_2_pio - return the PIO mode matching DMA
* @xfer_rate: transfer speed
*
* Returns the nearest equivalent PIO timing for the PIO or DMA
* Returns the nearest equivalent PIO timing for the DMA
* mode requested by the controller.
*/
......@@ -35,34 +35,28 @@ static u8 it8213_dma_2_pio (u8 xfer_rate) {
case XFER_UDMA_1:
case XFER_UDMA_0:
case XFER_MW_DMA_2:
case XFER_PIO_4:
return 4;
case XFER_MW_DMA_1:
case XFER_PIO_3:
return 3;
case XFER_SW_DMA_2:
case XFER_PIO_2:
return 2;
case XFER_MW_DMA_0:
case XFER_SW_DMA_1:
case XFER_SW_DMA_0:
case XFER_PIO_1:
case XFER_PIO_0:
case XFER_PIO_SLOW:
default:
return 0;
}
}
/*
* it8213_tuneproc - tune a drive
* it8213_tune_pio - tune a drive
* @drive: drive to tune
* @pio: desired PIO mode
*
* Set the interface PIO mode.
*/
static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
static void it8213_tune_pio(ide_drive_t *drive, const u8 pio)
{
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
......@@ -82,8 +76,6 @@ static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
{ 2, 1 },
{ 2, 3 }, };
pio = ide_get_best_pio_mode(drive, pio, 4);
spin_lock_irqsave(&tune_lock, flags);
pci_read_config_word(dev, master_port, &master_data);
......@@ -113,6 +105,13 @@ static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
spin_unlock_irqrestore(&tune_lock, flags);
}
static void it8213_tuneproc(ide_drive_t *drive, u8 pio)
{
pio = ide_get_best_pio_mode(drive, pio, 4);
it8213_tune_pio(drive, pio);
ide_config_drive_speed(drive, XFER_PIO_0 + pio);
}
/**
* it8213_tune_chipset - set controller timings
* @drive: Drive to set up
......@@ -193,7 +192,12 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
if (reg55 & w_flag)
pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
}
it8213_tuneproc(drive, it8213_dma_2_pio(speed));
if (speed > XFER_PIO_4)
it8213_tune_pio(drive, it8213_dma_2_pio(speed));
else
it8213_tune_pio(drive, speed - XFER_PIO_0);
return ide_config_drive_speed(drive, speed);
}
......@@ -209,13 +213,10 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
static int it8213_config_drive_for_dma (ide_drive_t *drive)
{
u8 pio;
if (ide_tune_dma(drive))
return 0;
pio = ide_get_best_pio_mode(drive, 255, 4);
it8213_tune_chipset(drive, XFER_PIO_0 + pio);
it8213_tuneproc(drive, 255);
return -1;
}
......
......@@ -83,23 +83,10 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
return ATA_CBL_PATA80;
}
static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted)
static void jmicron_tuneproc(ide_drive_t *drive, u8 pio)
{
return;
}
/**
* config_jmicron_chipset_for_pio - set drive timings
* @drive: drive to tune
* @speed we want
*
*/
static void config_jmicron_chipset_for_pio (ide_drive_t *drive, byte set_speed)
{
u8 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5);
if (set_speed)
(void) ide_config_drive_speed(drive, speed);
pio = ide_get_best_pio_mode(drive, pio, 5);
ide_config_drive_speed(drive, XFER_PIO_0 + pio);
}
/**
......@@ -132,7 +119,7 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)
if (ide_tune_dma(drive))
return 0;
config_jmicron_chipset_for_pio(drive, 1);
jmicron_tuneproc(drive, 255);
return -1;
}
......
/*
* linux/drivers/ide/pci/piix.c Version 0.50 Jun 10, 2007
* linux/drivers/ide/pci/piix.c Version 0.51 Jul 6, 2007
*
* Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
* Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
......@@ -109,7 +109,7 @@ static int no_piix_dma;
* piix_dma_2_pio - return the PIO mode matching DMA
* @xfer_rate: transfer speed
*
* Returns the nearest equivalent PIO timing for the PIO or DMA
* Returns the nearest equivalent PIO timing for the DMA
* mode requested by the controller.
*/
......@@ -123,20 +123,14 @@ static u8 piix_dma_2_pio (u8 xfer_rate) {
case XFER_UDMA_1:
case XFER_UDMA_0:
case XFER_MW_DMA_2:
case XFER_PIO_4:
return 4;
case XFER_MW_DMA_1:
case XFER_PIO_3:
return 3;
case XFER_SW_DMA_2:
case XFER_PIO_2:
return 2;
case XFER_MW_DMA_0:
case XFER_SW_DMA_1:
case XFER_SW_DMA_0:
case XFER_PIO_1:
case XFER_PIO_0:
case XFER_PIO_SLOW:
default:
return 0;
}
......@@ -269,6 +263,7 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
case XFER_PIO_4:
case XFER_PIO_3:
case XFER_PIO_2:
case XFER_PIO_1:
case XFER_PIO_0: break;
default: return -1;
}
......@@ -299,7 +294,11 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
}
piix_tune_pio(drive, piix_dma_2_pio(speed));
if (speed > XFER_PIO_4)
piix_tune_pio(drive, piix_dma_2_pio(speed));
else
piix_tune_pio(drive, speed - XFER_PIO_0);
return ide_config_drive_speed(drive, speed);
}
......
......@@ -190,7 +190,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
}
/**
* scc_tuneproc - tune a drive PIO mode
* scc_tune_pio - tune a drive PIO mode
* @drive: drive to tune
* @mode_wanted: the target operating mode
*
......@@ -198,7 +198,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
* controller.
*/
static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted)
static void scc_tune_pio(ide_drive_t *drive, const u8 pio)
{
ide_hwif_t *hwif = HWIF(drive);
struct scc_ports *ports = ide_get_hwifdata(hwif);
......@@ -207,41 +207,25 @@ static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted)
unsigned long piosht_port = ctl_base + 0x000;
unsigned long pioct_port = ctl_base + 0x004;
unsigned long reg;
unsigned char speed = XFER_PIO_0;
int offset;
mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 4);
switch (mode_wanted) {
case 4:
speed = XFER_PIO_4;
break;
case 3:
speed = XFER_PIO_3;
break;
case 2:
speed = XFER_PIO_2;
break;
case 1:
speed = XFER_PIO_1;
break;
case 0:
default:
speed = XFER_PIO_0;
break;
}
reg = in_be32((void __iomem *)cckctrl_port);
if (reg & CCKCTRL_ATACLKOEN) {
offset = 1; /* 133MHz */
} else {
offset = 0; /* 100MHz */
}
reg = JCHSTtbl[offset][mode_wanted] << 16 | JCHHTtbl[offset][mode_wanted];
reg = JCHSTtbl[offset][pio] << 16 | JCHHTtbl[offset][pio];
out_be32((void __iomem *)piosht_port, reg);
reg = JCHCTtbl[offset][mode_wanted];
reg = JCHCTtbl[offset][pio];
out_be32((void __iomem *)pioct_port, reg);
}
ide_config_drive_speed(drive, speed);
static void scc_tuneproc(ide_drive_t *drive, u8 pio)
{
pio = ide_get_best_pio_mode(drive, pio, 4);
scc_tune_pio(drive, pio);
ide_config_drive_speed(drive, XFER_PIO_0 + pio);
}
/**
......@@ -280,26 +264,21 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
switch (speed) {
case XFER_UDMA_6:
idx = 6;
break;
case XFER_UDMA_5:
idx = 5;
break;
case XFER_UDMA_4:
idx = 4;
break;
case XFER_UDMA_3:
idx = 3;
break;
case XFER_UDMA_2:
idx = 2;
break;
case XFER_UDMA_1:
idx = 1;
break;
case XFER_UDMA_0:
idx = 0;
idx = speed - XFER_UDMA_0;
break;
case XFER_PIO_4:
case XFER_PIO_3:
case XFER_PIO_2:
case XFER_PIO_1:
case XFER_PIO_0:
scc_tune_pio(drive, speed - XFER_PIO_0);
return ide_config_drive_speed(drive, speed);
default:
return 1;
}
......@@ -329,7 +308,7 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
* required.
* If the drive isn't suitable for DMA or we hit other problems
* then we will drop down to PIO and set up PIO appropriately.
* (return 1)
* (return -1)
*/
static int scc_config_drive_for_dma(ide_drive_t *drive)
......@@ -338,7 +317,7 @@ static int scc_config_drive_for_dma(ide_drive_t *drive)
return 0;
if (ide_use_fast_pio(drive))
scc_tuneproc(drive, 4);
scc_tuneproc(drive, 255);
return -1;
}
......
......@@ -801,6 +801,7 @@ struct sis_laptop {
static const struct sis_laptop sis_laptop[] = {
/* devid, subvendor, subdev */
{ 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
{ 0x5513, 0x1734, 0x105f }, /* FSC Amilo A1630 */
/* end marker */
{ 0, }
};
......
/*
* linux/drivers/ide/pci/slc90e66.c Version 0.14 February 8, 2007
* linux/drivers/ide/pci/slc90e66.c Version 0.15 Jul 6, 2007
*
* Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
* Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
......@@ -29,20 +29,14 @@ static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
case XFER_UDMA_1:
case XFER_UDMA_0:
case XFER_MW_DMA_2:
case XFER_PIO_4:
return 4;
case XFER_MW_DMA_1:
case XFER_PIO_3:
return 3;
case XFER_SW_DMA_2:
case XFER_PIO_2:
return 2;
case XFER_MW_DMA_0:
case XFER_SW_DMA_1:
case XFER_SW_DMA_0:
case XFER_PIO_1:
case XFER_PIO_0:
case XFER_PIO_SLOW:
default:
return 0;
}
......@@ -136,6 +130,7 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
case XFER_PIO_4:
case XFER_PIO_3:
case XFER_PIO_2:
case XFER_PIO_1:
case XFER_PIO_0: break;
default: return -1;
}
......@@ -156,7 +151,11 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
}
slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
if (speed > XFER_PIO_4)
slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
else
slc90e66_tune_pio(drive, speed - XFER_PIO_0);
return ide_config_drive_speed(drive, speed);
}
......
......@@ -310,7 +310,7 @@ static int pci_default_resume(struct pci_dev *pci_dev)
/* restore the PCI config space */
pci_restore_state(pci_dev);
/* if the device was enabled before suspend, reenable */
retval = __pci_reenable_device(pci_dev);
retval = pci_reenable_device(pci_dev);
/* if the device was busmaster before the suspend, make it busmaster again */
if (pci_dev->is_busmaster)
pci_set_master(pci_dev);
......
......@@ -695,14 +695,13 @@ static int do_pci_enable_device(struct pci_dev *dev, int bars)
}
/**
* __pci_reenable_device - Resume abandoned device
* pci_reenable_device - Resume abandoned device
* @dev: PCI device to be resumed
*
* Note this function is a backend of pci_default_resume and is not supposed
* to be called by normal code, write proper resume handler and use it instead.
*/
int
__pci_reenable_device(struct pci_dev *dev)
int pci_reenable_device(struct pci_dev *dev)
{
if (atomic_read(&dev->enable_cnt))
return do_pci_enable_device(dev, (1 << PCI_NUM_RESOURCES) - 1);
......@@ -1604,7 +1603,7 @@ early_param("pci", pci_setup);
device_initcall(pci_init);
EXPORT_SYMBOL_GPL(pci_restore_bars);
EXPORT_SYMBOL(__pci_reenable_device);
EXPORT_SYMBOL(pci_reenable_device);
EXPORT_SYMBOL(pci_enable_device_bars);
EXPORT_SYMBOL(pci_enable_device);
EXPORT_SYMBOL(pcim_enable_device);
......
......@@ -328,17 +328,15 @@ static int idescsi_check_condition(ide_drive_t *drive, struct request *failed_co
u8 *buf;
/* stuff a sense request in front of our current request */
pc = kmalloc (sizeof (idescsi_pc_t), GFP_ATOMIC);
rq = kmalloc (sizeof (struct request), GFP_ATOMIC);
buf = kmalloc(SCSI_SENSE_BUFFERSIZE, GFP_ATOMIC);
if (pc == NULL || rq == NULL || buf == NULL) {
pc = kzalloc(sizeof(idescsi_pc_t), GFP_ATOMIC);
rq = kmalloc(sizeof(struct request), GFP_ATOMIC);
buf = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_ATOMIC);
if (!pc || !rq || !buf) {
kfree(buf);
kfree(rq);
kfree(pc);
return -ENOMEM;
}
memset (pc, 0, sizeof (idescsi_pc_t));
memset (buf, 0, SCSI_SENSE_BUFFERSIZE);
ide_init_drive_cmd(rq);
rq->special = (char *) pc;
pc->rq = rq;
......
......@@ -57,7 +57,7 @@
#define WARN_ON(condition) \
({ \
typeof(condition) __ret_warn_on = (condition); \
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on)) \
_BUG_OR_WARN(BUGFLAG_WARNING); \
unlikely(__ret_warn_on); \
......
......@@ -36,4 +36,7 @@
#define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70)
#define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78)
#define __reg_MB86943_pci_arbiter *(volatile uint32_t *) (__region_CS2 + 0x01300014)
#define MB86943_PCIARB_EN 0x00000001
#endif /* _ASM_MB86943A_H */
......@@ -74,7 +74,7 @@
#define WARN_ON(x) ({ \
typeof(x) __ret_warn_on = (x); \
int __ret_warn_on = !!(x); \
if (__builtin_constant_p(__ret_warn_on)) { \
if (__ret_warn_on) \
__WARN(); \
......
......@@ -50,7 +50,7 @@
#define BUG() __EMIT_BUG(0)
#define WARN_ON(x) ({ \
typeof(x) __ret_warn_on = (x); \
int __ret_warn_on = !!(x); \
if (__builtin_constant_p(__ret_warn_on)) { \
if (__ret_warn_on) \
__EMIT_BUG(BUGFLAG_WARNING); \
......
......@@ -61,7 +61,7 @@ do { \
} while (0)
#define WARN_ON(x) ({ \
typeof(x) __ret_warn_on = (x); \
int __ret_warn_on = !!(x); \
if (__builtin_constant_p(__ret_warn_on)) { \
if (__ret_warn_on) \
__WARN(); \
......
......@@ -534,7 +534,7 @@ static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val
int __must_check pci_enable_device(struct pci_dev *dev);
int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);
int __must_check __pci_reenable_device(struct pci_dev *);
int __must_check pci_reenable_device(struct pci_dev *);
int __must_check pcim_enable_device(struct pci_dev *pdev);
void pcim_pin_device(struct pci_dev *pdev);
......
......@@ -734,7 +734,6 @@ struct sched_domain {
unsigned long max_interval; /* Maximum balance interval ms */
unsigned int busy_factor; /* less balancing by factor if busy */
unsigned int imbalance_pct; /* No balance until over watermark */
unsigned long long cache_hot_time; /* Task considered cache hot (ns) */
unsigned int cache_nice_tries; /* Leave cache hot tasks for # tries */
unsigned int busy_idx;
unsigned int idle_idx;
......@@ -875,7 +874,7 @@ struct sched_class {
void (*set_curr_task) (struct rq *rq);
void (*task_tick) (struct rq *rq, struct task_struct *p);
void (*task_new) (struct rq *rq, struct task_struct *p);
void (*task_new) (struct rq *rq, struct task_struct *p, u64 now);
};
struct load_weight {
......@@ -905,23 +904,28 @@ struct sched_entity {
struct rb_node run_node;
unsigned int on_rq;
u64 exec_start;
u64 sum_exec_runtime;
u64 wait_start_fair;
u64 sleep_start_fair;
#ifdef CONFIG_SCHEDSTATS
u64 wait_start;
u64 exec_start;
u64 wait_max;
s64 sum_wait_runtime;
u64 sleep_start;
u64 sleep_start_fair;
u64 block_start;
u64 sleep_max;
s64 sum_sleep_runtime;
u64 block_start;
u64 block_max;
u64 exec_max;
u64 wait_max;
u64 last_ran;
u64 sum_exec_runtime;
s64 sum_wait_runtime;
s64 sum_sleep_runtime;
unsigned long wait_runtime_overruns;
unsigned long wait_runtime_underruns;
#endif
#ifdef CONFIG_FAIR_GROUP_SCHED
struct sched_entity *parent;
/* rq on which this entity is (to be) queued: */
......
......@@ -185,7 +185,6 @@
.max_interval = 64*num_online_cpus(), \
.busy_factor = 128, \
.imbalance_pct = 133, \
.cache_hot_time = (10*1000000), \
.cache_nice_tries = 1, \
.busy_idx = 3, \
.idle_idx = 3, \
......
......@@ -132,6 +132,8 @@ struct netlbl_lsm_secattr_catmap {
#define NETLBL_SECATTR_CACHE 0x00000002
#define NETLBL_SECATTR_MLS_LVL 0x00000004
#define NETLBL_SECATTR_MLS_CAT 0x00000008
#define NETLBL_SECATTR_CACHEABLE (NETLBL_SECATTR_MLS_LVL | \
NETLBL_SECATTR_MLS_CAT)
struct netlbl_lsm_secattr {
u32 flags;
......
......@@ -62,6 +62,15 @@ void check_irq_resend(struct irq_desc *desc, unsigned int irq)
*/
desc->chip->enable(irq);
/*
* Temporary hack to figure out more about the problem, which
* is causing the ancient network cards to die.
*/
if (desc->handle_irq != handle_edge_irq) {
WARN_ON_ONCE(1);
return;
}
if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
desc->status = (status & ~IRQ_PENDING) | IRQ_REPLAY;
......
......@@ -637,7 +637,7 @@ static u64 div64_likely32(u64 divident, unsigned long divisor)
#define WMULT_SHIFT 32
static inline unsigned long
static unsigned long
calc_delta_mine(unsigned long delta_exec, unsigned long weight,
struct load_weight *lw)
{
......@@ -657,7 +657,7 @@ calc_delta_mine(unsigned long delta_exec, unsigned long weight,
tmp = (tmp * lw->inv_weight) >> WMULT_SHIFT;
}
return (unsigned long)min(tmp, (u64)sysctl_sched_runtime_limit);
return (unsigned long)min(tmp, (u64)(unsigned long)LONG_MAX);
}
static inline unsigned long
......@@ -678,46 +678,6 @@ static void update_load_sub(struct load_weight *lw, unsigned long dec)
lw->inv_weight = 0;
}
static void __update_curr_load(struct rq *rq, struct load_stat *ls)
{
if (rq->curr != rq->idle && ls->load.weight) {
ls->delta_exec += ls->delta_stat;
ls->delta_fair += calc_delta_fair(ls->delta_stat, &ls->load);
ls->delta_stat = 0;
}
}
/*
* Update delta_exec, delta_fair fields for rq.
*
* delta_fair clock advances at a rate inversely proportional to
* total load (rq->ls.load.weight) on the runqueue, while
* delta_exec advances at the same rate as wall-clock (provided
* cpu is not idle).
*
* delta_exec / delta_fair is a measure of the (smoothened) load on this
* runqueue over any given interval. This (smoothened) load is used
* during load balance.
*
* This function is called /before/ updating rq->ls.load
* and when switching tasks.
*/
static void update_curr_load(struct rq *rq, u64 now)
{
struct load_stat *ls = &rq->ls;
u64 start;
start = ls->load_update_start;
ls->load_update_start = now;
ls->delta_stat += now - start;
/*
* Stagger updates to ls->delta_fair. Very frequent updates
* can be expensive.
*/
if (ls->delta_stat >= sysctl_sched_stat_granularity)
__update_curr_load(rq, ls);
}
/*
* To aid in avoiding the subversion of "niceness" due to uneven distribution
* of tasks with abnormal "nice" values across CPUs the contribution that
......@@ -727,19 +687,6 @@ static void update_curr_load(struct rq *rq, u64 now)
* slice expiry etc.
*/
/*
* Assume: static_prio_timeslice(NICE_TO_PRIO(0)) == DEF_TIMESLICE
* If static_prio_timeslice() is ever changed to break this assumption then
* this code will need modification
*/
#define TIME_SLICE_NICE_ZERO DEF_TIMESLICE
#define load_weight(lp) \
(((lp) * SCHED_LOAD_SCALE) / TIME_SLICE_NICE_ZERO)
#define PRIO_TO_LOAD_WEIGHT(prio) \
load_weight(static_prio_timeslice(prio))
#define RTPRIO_TO_LOAD_WEIGHT(rp) \
(PRIO_TO_LOAD_WEIGHT(MAX_RT_PRIO) + load_weight(rp))
#define WEIGHT_IDLEPRIO 2
#define WMULT_IDLEPRIO (1 << 31)
......@@ -781,32 +728,6 @@ static const u32 prio_to_wmult[40] = {
/* 15 */ 119304647, 148102320, 186737708, 238609294, 286331153,
};
static inline void
inc_load(struct rq *rq, const struct task_struct *p, u64 now)
{
update_curr_load(rq, now);
update_load_add(&rq->ls.load, p->se.load.weight);
}
static inline void
dec_load(struct rq *rq, const struct task_struct *p, u64 now)
{
update_curr_load(rq, now);
update_load_sub(&rq->ls.load, p->se.load.weight);
}
static inline void inc_nr_running(struct task_struct *p, struct rq *rq, u64 now)
{
rq->nr_running++;
inc_load(rq, p, now);
}
static inline void dec_nr_running(struct task_struct *p, struct rq *rq, u64 now)
{
rq->nr_running--;
dec_load(rq, p, now);
}
static void activate_task(struct rq *rq, struct task_struct *p, int wakeup);
/*
......@@ -837,6 +758,72 @@ static int balance_tasks(struct rq *this_rq, int this_cpu, struct rq *busiest,
#define sched_class_highest (&rt_sched_class)
static void __update_curr_load(struct rq *rq, struct load_stat *ls)
{
if (rq->curr != rq->idle && ls->load.weight) {
ls->delta_exec += ls->delta_stat;
ls->delta_fair += calc_delta_fair(ls->delta_stat, &ls->load);
ls->delta_stat = 0;
}
}
/*
* Update delta_exec, delta_fair fields for rq.
*
* delta_fair clock advances at a rate inversely proportional to
* total load (rq->ls.load.weight) on the runqueue, while
* delta_exec advances at the same rate as wall-clock (provided
* cpu is not idle).
*
* delta_exec / delta_fair is a measure of the (smoothened) load on this
* runqueue over any given interval. This (smoothened) load is used
* during load balance.
*
* This function is called /before/ updating rq->ls.load
* and when switching tasks.
*/
static void update_curr_load(struct rq *rq, u64 now)
{
struct load_stat *ls = &rq->ls;
u64 start;
start = ls->load_update_start;
ls->load_update_start = now;
ls->delta_stat += now - start;
/*
* Stagger updates to ls->delta_fair. Very frequent updates
* can be expensive.
*/
if (ls->delta_stat >= sysctl_sched_stat_granularity)
__update_curr_load(rq, ls);
}
static inline void
inc_load(struct rq *rq, const struct task_struct *p, u64 now)
{
update_curr_load(rq, now);
update_load_add(&rq->ls.load, p->se.load.weight);
}
static inline void
dec_load(struct rq *rq, const struct task_struct *p, u64 now)
{
update_curr_load(rq, now);
update_load_sub(&rq->ls.load, p->se.load.weight);
}
static void inc_nr_running(struct task_struct *p, struct rq *rq, u64 now)
{
rq->nr_running++;
inc_load(rq, p, now);
}
static void dec_nr_running(struct task_struct *p, struct rq *rq, u64 now)
{
rq->nr_running--;
dec_load(rq, p, now);
}
static void set_load_weight(struct task_struct *p)
{
task_rq(p)->cfs.wait_runtime -= p->se.wait_runtime;
......@@ -996,18 +983,21 @@ void set_task_cpu(struct task_struct *p, unsigned int new_cpu)
u64 clock_offset, fair_clock_offset;
clock_offset = old_rq->clock - new_rq->clock;
fair_clock_offset = old_rq->cfs.fair_clock -
new_rq->cfs.fair_clock;
if (p->se.wait_start)
p->se.wait_start -= clock_offset;
fair_clock_offset = old_rq->cfs.fair_clock - new_rq->cfs.fair_clock;
if (p->se.wait_start_fair)
p->se.wait_start_fair -= fair_clock_offset;
if (p->se.sleep_start_fair)
p->se.sleep_start_fair -= fair_clock_offset;
#ifdef CONFIG_SCHEDSTATS
if (p->se.wait_start)
p->se.wait_start -= clock_offset;
if (p->se.sleep_start)
p->se.sleep_start -= clock_offset;
if (p->se.block_start)
p->se.block_start -= clock_offset;
if (p->se.sleep_start_fair)
p->se.sleep_start_fair -= fair_clock_offset;
#endif
__set_task_cpu(p, new_cpu);
}
......@@ -1568,17 +1558,19 @@ int fastcall wake_up_state(struct task_struct *p, unsigned int state)
static void __sched_fork(struct task_struct *p)
{
p->se.wait_start_fair = 0;
p->se.wait_start = 0;
p->se.exec_start = 0;
p->se.sum_exec_runtime = 0;
p->se.delta_exec = 0;
p->se.delta_fair_run = 0;
p->se.delta_fair_sleep = 0;
p->se.wait_runtime = 0;
p->se.sleep_start_fair = 0;
#ifdef CONFIG_SCHEDSTATS
p->se.wait_start = 0;
p->se.sum_wait_runtime = 0;
p->se.sum_sleep_runtime = 0;
p->se.sleep_start = 0;
p->se.sleep_start_fair = 0;
p->se.block_start = 0;
p->se.sleep_max = 0;
p->se.block_max = 0;
......@@ -1586,6 +1578,7 @@ static void __sched_fork(struct task_struct *p)
p->se.wait_max = 0;
p->se.wait_runtime_overruns = 0;
p->se.wait_runtime_underruns = 0;
#endif
INIT_LIST_HEAD(&p->run_list);
p->se.on_rq = 0;
......@@ -1654,22 +1647,27 @@ void fastcall wake_up_new_task(struct task_struct *p, unsigned long clone_flags)
unsigned long flags;
struct rq *rq;
int this_cpu;
u64 now;
rq = task_rq_lock(p, &flags);
BUG_ON(p->state != TASK_RUNNING);
this_cpu = smp_processor_id(); /* parent's CPU */
now = rq_clock(rq);
p->prio = effective_prio(p);
if (!sysctl_sched_child_runs_first || (clone_flags & CLONE_VM) ||
task_cpu(p) != this_cpu || !current->se.on_rq) {
if (!p->sched_class->task_new || !sysctl_sched_child_runs_first ||
(clone_flags & CLONE_VM) || task_cpu(p) != this_cpu ||
!current->se.on_rq) {
activate_task(rq, p, 0);
} else {
/*
* Let the scheduling class do new task startup
* management (if any):
*/
p->sched_class->task_new(rq, p);
p->sched_class->task_new(rq, p, now);
inc_nr_running(p, rq, now);
}
check_preempt_curr(rq, p);
task_rq_unlock(rq, &flags);
......@@ -2908,8 +2906,7 @@ static void active_load_balance(struct rq *busiest_rq, int busiest_cpu)
schedstat_inc(sd, alb_cnt);
if (move_tasks(target_rq, target_cpu, busiest_rq, 1,
RTPRIO_TO_LOAD_WEIGHT(100), sd, CPU_IDLE,
NULL))
ULONG_MAX, sd, CPU_IDLE, NULL))
schedstat_inc(sd, alb_pushed);
else
schedstat_inc(sd, alb_failed);
......@@ -5269,8 +5266,6 @@ sd_alloc_ctl_domain_table(struct sched_domain *sd)
sizeof(int), 0644, proc_dointvec_minmax);
set_table_entry(&table[8], 9, "imbalance_pct", &sd->imbalance_pct,
sizeof(int), 0644, proc_dointvec_minmax);
set_table_entry(&table[9], 10, "cache_hot_time", &sd->cache_hot_time,
sizeof(long long), 0644, proc_doulongvec_minmax);
set_table_entry(&table[10], 11, "cache_nice_tries",
&sd->cache_nice_tries,
sizeof(int), 0644, proc_dointvec_minmax);
......@@ -6590,12 +6585,14 @@ void normalize_rt_tasks(void)
do_each_thread(g, p) {
p->se.fair_key = 0;
p->se.wait_runtime = 0;
p->se.exec_start = 0;
p->se.wait_start_fair = 0;
p->se.sleep_start_fair = 0;
#ifdef CONFIG_SCHEDSTATS
p->se.wait_start = 0;
p->se.exec_start = 0;
p->se.sleep_start = 0;
p->se.sleep_start_fair = 0;
p->se.block_start = 0;
#endif
task_rq(p)->cfs.fair_clock = 0;
task_rq(p)->clock = 0;
......
......@@ -44,11 +44,16 @@ print_task(struct seq_file *m, struct rq *rq, struct task_struct *p, u64 now)
(long long)p->se.wait_runtime,
(long long)(p->nvcsw + p->nivcsw),
p->prio,
#ifdef CONFIG_SCHEDSTATS
(long long)p->se.sum_exec_runtime,
(long long)p->se.sum_wait_runtime,
(long long)p->se.sum_sleep_runtime,
(long long)p->se.wait_runtime_overruns,
(long long)p->se.wait_runtime_underruns);
(long long)p->se.wait_runtime_underruns
#else
0LL, 0LL, 0LL, 0LL, 0LL
#endif
);
}
static void print_rq(struct seq_file *m, struct rq *rq, int rq_cpu, u64 now)
......@@ -171,7 +176,7 @@ static int sched_debug_show(struct seq_file *m, void *v)
u64 now = ktime_to_ns(ktime_get());
int cpu;
SEQ_printf(m, "Sched Debug Version: v0.05, %s %.*s\n",
SEQ_printf(m, "Sched Debug Version: v0.05-v20, %s %.*s\n",
init_utsname()->release,
(int)strcspn(init_utsname()->version, " "),
init_utsname()->version);
......@@ -235,21 +240,24 @@ void proc_sched_show_task(struct task_struct *p, struct seq_file *m)
#define P(F) \
SEQ_printf(m, "%-25s:%20Ld\n", #F, (long long)p->F)
P(se.wait_start);
P(se.wait_runtime);
P(se.wait_start_fair);
P(se.exec_start);
P(se.sleep_start);
P(se.sleep_start_fair);
P(se.sum_exec_runtime);
#ifdef CONFIG_SCHEDSTATS
P(se.wait_start);
P(se.sleep_start);
P(se.block_start);
P(se.sleep_max);
P(se.block_max);
P(se.exec_max);
P(se.wait_max);
P(se.wait_runtime);
P(se.wait_runtime_overruns);
P(se.wait_runtime_underruns);
P(se.sum_wait_runtime);
P(se.sum_exec_runtime);
#endif
SEQ_printf(m, "%-25s:%20Ld\n",
"nr_switches", (long long)(p->nvcsw + p->nivcsw));
P(se.load.weight);
......@@ -269,7 +277,9 @@ void proc_sched_show_task(struct task_struct *p, struct seq_file *m)
void proc_sched_set_task(struct task_struct *p)
{
#ifdef CONFIG_SCHEDSTATS
p->se.sleep_max = p->se.block_max = p->se.exec_max = p->se.wait_max = 0;
p->se.wait_runtime_overruns = p->se.wait_runtime_underruns = 0;
#endif
p->se.sum_exec_runtime = 0;
}
......@@ -292,10 +292,7 @@ __update_curr(struct cfs_rq *cfs_rq, struct sched_entity *curr, u64 now)
return;
delta_exec = curr->delta_exec;
#ifdef CONFIG_SCHEDSTATS
if (unlikely(delta_exec > curr->exec_max))
curr->exec_max = delta_exec;
#endif
schedstat_set(curr->exec_max, max((u64)delta_exec, curr->exec_max));
curr->sum_exec_runtime += delta_exec;
cfs_rq->exec_clock += delta_exec;
......@@ -352,7 +349,7 @@ static inline void
update_stats_wait_start(struct cfs_rq *cfs_rq, struct sched_entity *se, u64 now)
{
se->wait_start_fair = cfs_rq->fair_clock;
se->wait_start = now;
schedstat_set(se->wait_start, now);
}
/*
......@@ -425,13 +422,7 @@ __update_stats_wait_end(struct cfs_rq *cfs_rq, struct sched_entity *se, u64 now)
{
unsigned long delta_fair = se->delta_fair_run;
#ifdef CONFIG_SCHEDSTATS
{
s64 delta_wait = now - se->wait_start;
if (unlikely(delta_wait > se->wait_max))
se->wait_max = delta_wait;
}
#endif
schedstat_set(se->wait_max, max(se->wait_max, now - se->wait_start));
if (unlikely(se->load.weight != NICE_0_LOAD))
delta_fair = calc_weighted(delta_fair, se->load.weight,
......@@ -456,7 +447,7 @@ update_stats_wait_end(struct cfs_rq *cfs_rq, struct sched_entity *se, u64 now)
}
se->wait_start_fair = 0;
se->wait_start = 0;
schedstat_set(se->wait_start, 0);
}
static inline void
......@@ -1041,11 +1032,10 @@ static void task_tick_fair(struct rq *rq, struct task_struct *curr)
* monopolize the CPU. Note: the parent runqueue is locked,
* the child is not running yet.
*/
static void task_new_fair(struct rq *rq, struct task_struct *p)
static void task_new_fair(struct rq *rq, struct task_struct *p, u64 now)
{
struct cfs_rq *cfs_rq = task_cfs_rq(p);
struct sched_entity *se = &p->se;
u64 now = rq_clock(rq);
sched_info_queued(p);
......@@ -1072,7 +1062,6 @@ static void task_new_fair(struct rq *rq, struct task_struct *p)
p->se.wait_runtime = -(sysctl_sched_granularity / 2);
__enqueue_entity(cfs_rq, se);
inc_nr_running(p, rq, now);
}
#ifdef CONFIG_FAIR_GROUP_SCHED
......
......@@ -18,8 +18,8 @@ static inline void update_curr_rt(struct rq *rq, u64 now)
delta_exec = now - curr->se.exec_start;
if (unlikely((s64)delta_exec < 0))
delta_exec = 0;
if (unlikely(delta_exec > curr->se.exec_max))
curr->se.exec_max = delta_exec;
schedstat_set(curr->se.exec_max, max(curr->se.exec_max, delta_exec));
curr->se.sum_exec_runtime += delta_exec;
curr->se.exec_start = now;
......@@ -229,15 +229,6 @@ static void task_tick_rt(struct rq *rq, struct task_struct *p)
requeue_task_rt(rq, p);
}
/*
* No parent/child timeslice management necessary for RT tasks,
* just activate them:
*/
static void task_new_rt(struct rq *rq, struct task_struct *p)
{
activate_task(rq, p, 1);
}
static struct sched_class rt_sched_class __read_mostly = {
.enqueue_task = enqueue_task_rt,
.dequeue_task = dequeue_task_rt,
......@@ -251,5 +242,4 @@ static struct sched_class rt_sched_class __read_mostly = {
.load_balance = load_balance_rt,
.task_tick = task_tick_rt,
.task_new = task_new_rt,
};
......@@ -116,6 +116,7 @@ rq_sched_info_depart(struct rq *rq, unsigned long long delta)
}
# define schedstat_inc(rq, field) do { (rq)->field++; } while (0)
# define schedstat_add(rq, field, amt) do { (rq)->field += (amt); } while (0)
# define schedstat_set(var, val) do { var = (val); } while (0)
#else /* !CONFIG_SCHEDSTATS */
static inline void
rq_sched_info_arrive(struct rq *rq, unsigned long long delta)
......@@ -125,6 +126,7 @@ rq_sched_info_depart(struct rq *rq, unsigned long long delta)
{}
# define schedstat_inc(rq, field) do { } while (0)
# define schedstat_add(rq, field, amt) do { } while (0)
# define schedstat_set(var, val) do { } while (0)
#endif
#if defined(CONFIG_SCHEDSTATS) || defined(CONFIG_TASK_DELAY_ACCT)
......
......@@ -113,8 +113,10 @@ struct audit_buffer *netlbl_audit_start_common(int type,
if (audit_info->secid != 0 &&
security_secid_to_secctx(audit_info->secid,
&secctx,
&secctx_len) == 0)
&secctx_len) == 0) {
audit_log_format(audit_buf, " subj=%s", secctx);
security_release_secctx(secctx, secctx_len);
}
return audit_buf;
}
......@@ -2195,9 +2195,10 @@ void xfrm_audit_log(uid_t auid, u32 sid, int type, int result,
}
if (sid != 0 &&
security_secid_to_secctx(sid, &secctx, &secctx_len) == 0)
security_secid_to_secctx(sid, &secctx, &secctx_len) == 0) {
audit_log_format(audit_buf, " subj=%s", secctx);
else
security_release_secctx(secctx, secctx_len);
} else
audit_log_task_context(audit_buf);
if (xp) {
......
......@@ -4658,8 +4658,7 @@ static int selinux_secid_to_secctx(u32 secid, char **secdata, u32 *seclen)
static void selinux_release_secctx(char *secdata, u32 seclen)
{
if (secdata)
kfree(secdata);
kfree(secdata);
}
#ifdef CONFIG_KEYS
......
......@@ -162,9 +162,13 @@ int selinux_netlbl_skbuff_getsid(struct sk_buff *skb, u32 base_sid, u32 *sid)
netlbl_secattr_init(&secattr);
rc = netlbl_skbuff_getattr(skb, &secattr);
if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE)
if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE) {
rc = security_netlbl_secattr_to_sid(&secattr, base_sid, sid);
else
if (rc == 0 &&
(secattr.flags & NETLBL_SECATTR_CACHEABLE) &&
(secattr.flags & NETLBL_SECATTR_CACHE))
netlbl_cache_add(skb, &secattr);
} else
*sid = SECSID_NULL;
netlbl_secattr_destroy(&secattr);
......@@ -307,11 +311,15 @@ int selinux_netlbl_sock_rcv_skb(struct sk_security_struct *sksec,
netlbl_secattr_init(&secattr);
rc = netlbl_skbuff_getattr(skb, &secattr);
if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE)
if (rc == 0 && secattr.flags != NETLBL_SECATTR_NONE) {
rc = security_netlbl_secattr_to_sid(&secattr,
SECINITSID_NETMSG,
&nlbl_sid);
else
if (rc == 0 &&
(secattr.flags & NETLBL_SECATTR_CACHEABLE) &&
(secattr.flags & NETLBL_SECATTR_CACHE))
netlbl_cache_add(skb, &secattr);
} else
nlbl_sid = SECINITSID_UNLABELED;
netlbl_secattr_destroy(&secattr);
if (rc != 0)
......
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